simulators for computer architecture classes
DESCRIPTION
Anastas Misev Marjan Gusev http://twins.ii.edu.mk/. Simulators for computer architecture classes. The need. Computer architecture is a foundational subject for the entire CS education Learning computer architecture can be frustrating if left in theory - PowerPoint PPT PresentationTRANSCRIPT
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Simulators for computer architecture classes
Anastas MisevMarjan Gusev
http://twins.ii.edu.mk/
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The need● Computer architecture is a foundational
subject for the entire CS education● Learning computer architecture can be
frustrating if left in theory● Visualization explains the architectural
concepts in more acceptable way to the students
● Using visual simulators is becoming an irreplaceable element in CS education
● Simulators makes the devices more the accessible
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The simulators● Different products available● Development of own tools● Student projects● Most important
– SuperSim2 – a visual PostRISC simulator– Tomasulo – web based visual simulator of the
popular algorithm– Scoreboard – visual and configurable
simulator for the scoreboard algorithm– 8051 simulator– VDD for an external programmable device
● The advantages of home production
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SuperSim 2.0● User code, pseudo assembler● Syntax checking, error indication● Extensive configuration● Simulation varying from simple RISC to
advanced PostRISC ● Step by step execution● Visualization of the pipeline● Non visual mode for high performance● Vast logging capabilities for performance
analysis● Detailed statistics
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Code editor
● Editing● File management● Syntax check
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RISC runtime
● Basic features● One pipeline● Registers● Data cache
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Configuration 1
● Execution units– Number and type
● Rates– Issue– Dispatch
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Configuration 2
● Usage of shelving● Reservation
stations– Type– Size
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Configuration 3
● Usage of register renaming
● Number of registers
● Access
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Configuration 4
● Usage of out-of-order
● Reorder buffer– Size
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Configuration 5
● Usage of branch processing
● Speculation● Static and
dynamic● Explicit and
implicit● Global
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PostRISC runtime
● Pipeline stages● Animated
instruction flow● Step-by-step
execution● Superscalar
features
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ROB
● Sequential consistency
● Circular buffer– Head– Tail
● Instructions by stage
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Registry file
● Architecture registers
● Rename registers– Mapping– Value– Latest
● Visualizes 32+32 registers
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Branch tables
● Explicit prediction– BHT
● Implicit prediction– BTAC
● Global 2-bit
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Data cache
● 1024 locations● Word addressible● To be extended
to multilevel
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Statistics
● Detailed statistics– Usage %– IPC per stage– Prediction– Renaming– Memory
dependencies– ...
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SuperSim 2.0
● Visualy explains ILP concepts
● Configurable ● Programmable● Easy to use and
students like it
http://twins.ii.edu.mk/supersim/
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Tomasulo
• Student project• Web based• Highly graphical• Configurable• Self explanatory• 1-1 mapping of the
tables used
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Scoreboard
• Also students project
• Windows application
• Fully configurable• Can run user code• Animated or step-
by-step execution• Configurable
operation latencies
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8051 simulator
• 8031/8051 simulator
• Student project• Includes– IDE– Code highlighting – Debugging– Step-by-step
execution
• Modular design
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Virtual Device Driver• Student project• Replaces a single external ISA device (8255
based)• Used for I/O assembler programming classes• Uses windows VDD and a front end application
as I/O
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Conclusion● The simulators used in several courses
covering computer architecture● Students interest and motivation is
much higher● “One device per student” environment● Motivation to continue the
development of new tool, mainly as student projects