silicon vlsi technology fundamentals, practice and modeling by plummer, deal & griffin © 2000...

SILICON VLSI TECHNOLOGYFundamentals, Practice and ModelingBy Plummer, Deal & Griffin

© 2000 by Prentice HallUpper Saddle River NJ

: Silicon VLSI Technology

Fundamentals, Practice and Modeling

by J. D. Plummer, M. D. Deal, and P. B. Griffin

ECE 6466 “IC Engineering”Dr. Wanda Wosik

Chapter 4Cleaning Processes in Si

Technology



FRONT END PROCESSES - CLEANING, LITHOGRAPHY, OXIDATIONION IMPLANTATION, DIFFUSION, DEPOSITION AND ETCHING

• Cleaning belongs to front end processes and is an important part of fabrication.• Reference - ITRS Roadmap for Front End Processes (class website).

Chapter 4

Semiconductor ManufacturingClean Rooms, Wafer Cleaning and Gettering

Importance of Importance of unwanted unwanted impurities impurities increases with increases with shrinking shrinking geometries of geometries of devices. devices.

75% of the yield 75% of the yield loss is due to loss is due to defects caused defects caused by particles by particles (1/2 of the min (1/2 of the min feature size)feature size)

Crystal Crystal originated (45-originated (45-150nm) particles 150nm) particles (COP) (COP) ~1,000Å=void ~1,000Å=void with SiOwith SiOx x -> -> affect GOIaffect GOI

-> anneal in H-> anneal in H22 -> oxide -> oxide decomposes and decomposes and surface surface reconstructs! & reconstructs! & oxide oxide precipitates precipitates from deep depth from deep depth in Si.in Si.

Yield -> 90% at the end -> 99% @ each step

Historical Development and Basic Concepts

Contaminants and their role in devices (various elements, various films)

Na+, Ka+

XOX ~10nm QM≈ 6.5x1011cm-2, VTN=0.1V (equivalent to 6.7*1017 cm-3 or 10 ppm contaminations)

! !

!!Life time killers

Poly-Si, silicides

Particles cause defects

QM



SEMICONDUCTOR MANUFACTURING - CLEAN ROOMS, WAFER CLEANING AND GETTERING

• Modern IC factories employ a three tiered approach to controlling unwanted impurities: 1. clean factories 2. wafer cleaning 3. gettering

• Contaminants may consist of particles, organic films (photoresist), heavy metals or alkali ions.

2003 ITRS Front End processes - see class website

Up till 2018

Dynamic Random Access Memory

Leakage currents discharge the capacitor (mechanism SRH) refresh the charge storage (time ~ a few msec)

Deep-level traps (Cu, Fe, Au etc.)

Pile up at the surface where the devices are located.

Lifetime must be > ~ 25 µsec Use gettering to keep Nt

<1012 cm-3 (Nt< ppb) -> G≈100µsec

write, read Vth~107cm/sec

~10-15cm-2

Role of Surface Cleaning in Processing

Oxide thickness [Å]

Residual contaminants, layers affect kinetics of processes.

Surface effects are very important (MORE) in scaled down devices



Level 1 Contamination Reduction: Clean Factories

• Air quality is measured by the “class” of the facility.

(Photo courtesy of Stanford Nanofabrication Facility.)

Factory environment is cleaned by: • Hepa filters and recirculation for the air, • “Bunny suits” for workers. • Filtration of chemicals and gases. • Manufacturing protocols.

Level 1 Contamination Reduction: Clean Factories

Class 1-100,000 mean number of particles, greater than 0.5 m, in a foot of air

Particles ---> people , machines, supplies

suits

Material filters

Chemicals, water (use DI)

Small particles remain in air (long) coagulate large ones precipitate quickly and deposit on surfaces by (small) Brownian motion and gravitational sedimentation (larger).

Use local clean rooms

from

Ex. Class 100 -> 5 particles/cm, >0.1 µm in 1hr.

Level 2 Contamination Reduction: Wafer Cleaning

Front End Process

Back End

Oxygen plasmaOrganic strippers

(do not attack metals)

5 H20 + H2O2 + NH4OH

SC1

Oxidizes organic films

Oxidizes Si and complexes metals

6H2O : H2O2 : HCl

SC2

Small content reduces Si etch (0.05%)

Removes alkali ions & cations Al3+, Fe3+, Mg3+ (insoluble in NH4OH - SC1)

H2S04 +H2O2

Oxygen plasma

Ultrasonic and now megasonic cleaning for particulates removal (20-50 kHz)

Good clean for high T steps Low T - less critical

DI water is necessary: H2O<-> H++OH-

[H+]=[OH-]=6x10-13cm-3

Diffusivity of: H+≈9.3x10-5cm2s-1 -> µH+=qD/kT=3.59cm2V-1s-1

of : OH-≈5.3x10-5cm2s-1 -> µOH-=qD/kT=2.04cm2V-1s-1



Level 2 Contamination Reduction: Wafer Cleaning

• RCA clean is “standard process” used to remove organics, heavy metals and alkali ions.

• Ultrasonic agitation is used to dislodge particles.

with all contaminants -> H passivation (or F!)

NH4OH small -> reduce surface roughness

Not removed by SC1

HF dip added to remove oxide



Level 3 Contamination Reduction: Gettering• Gettering is used to remove metal ions and alkali ions from device active regions.

• For the alkali ions, gettering generally uses dielectric layers on the topside (PSG or barrier Si3N4 layers).• For metal ions, gettering generally uses traps on the wafer backside or in the wafer bulk.• Backside = extrinsic gettering. Bulk = intrinsic gettering.

Gettering Concepts: contaminants freed diffuse become trapped

Fast Diffusion of Various Impurities

Metal contaminants will be trapped by dislocations and SF (decorate) and far away from ICs

PSG (for alkali ions Na+, K+ and metals) affects E fields (dipoles in PSG) and absorbs water leading to Al corrosion (negative effects)

or Si3N4

Closer to devices than to a backside layer -> high efficiency

metals



• Heavy metal gettering relies on: • Metals diffusing very rapidly in silicon. • Metals segregating to “trap” sites.



• “Trap” sites can be created by SiO2 precipitates (intrinsic gettering), or by backside damage (extrinsic gettering).

• In intrinsic gettering, CZ silicon is used and SiO2 precipitates are formed in the wafer bulk through temperature cycling at the start of the process.

SiO2 precipitates (white dots) in bulkof wafer.

Intrinsic Gettering Oxygen ~ 1018 cm-3; 15-20 ppm

Oi>20ppm -> too much precipitation-> strength decreases and warpage increases

Oi<10ppm -> no precipitation-> no gettering

denuded zone = oxygen free; thickness several tens of µm

50-100 µm in size

Slow ramp

1-3 nm min size of nuclei, concentrations ≈ 1011cm-3

>> Ddopants but D0<< Dmetals

Intrinsic Gettering Due to Oxide Precipitates

Precipitates (size) grow @ high T

Density of nucleation sites grow @ low T

The largest & the most dense defects -> the most efficient gettering

Measurement Methods

Clean factories = particle control. Detect concentrations < 10/wafer of particles smaller than 0.1 µm

Unpatterened wafers (blank)• Count particles in microscope• Laser scanning systems -> maps of particles down to ≈ 0.2 µm

Patterned wafers• Optical system compares a die with a “known good reference” die (adjacent die, chip design - its appearance) • Image processing identifies defects (SEM)• Test structure (not in high volume manufacturing)

Test Structures

Trapped charge

QT VTH change

Dielectric breakdown due to particles, metals etc.

Water – measure water resistivity Deionized Water =18.5 M

H2O H+ + OH-

Models relate type of defects (typical for processes) with yields

Monitoring the Wafer Cleaning Efficiency

Concentrations of impurities determined by surface analysis

Primary beam – e - good lateral resolution

Detected beam – e – good depth resolution and surface sensitivity

X-ray poor depth resolution and poor surface sensitivity

ions (SIMS) excellent

ions (RBS) good depth resolution, reasonable sensitivity (0.1 atomic%)

works with SEM He+ 1-3 MeV

O+ or Cs+ sputtering and mass analyses

•Excite•Identify (unique atomic signature)•Count concentrations

emitted

Electrons in Analytical Methods

Inelastic collision with target electrons, which are then

emitted from the solid

Elastic collision of incoming electrons with atoms (reflected back) ~ the same energy as for the incoming electrons

~ 5 eV

(as in SEM)

Analytical Techniques

kicked out a core electron

This scheme is for lighter elements (Z=33 as is crossover b/w Auger and X-Ray

Several keV

X-Ray Electron Spectroscopy

Electron Microprobe

If X-Ray is at the input:

• el. Emitted= X-ray Photoelectron Spectroscopy (XPS)

• X-ray emitted= X-ray Fluorescence (XRF)

XPS usually more dominant for lighter elements, XRF for heavier

Auger El. Spectroscopy

The core electron energy levels

Several keV

1

3

2

1

2

3

Monitoring of Gettering Through Device Properties and Dielectricp – n leakage, refresh time DRAM junction and

dielectric breakdown, of n-p-n Material properties : G(>>R) in the bulk and on the surface

Photoconductive Decay Measurements ∆n=gopG

•Carriers are generated due to light •Decrease resistivity•Recombine

emission<-> capture

==+

Carrier Generation Lifetime

Deep Depletion - Return to Inversion via Carrier Generation (measure G) and surface recombination (s)

DLinversion

Zerbst technique:

if plotted vs. (Cmin/C)-1

s=f(NST, )

Capture cross section

Lifetime Measurements: Open Circuit Voltage Decay

Diode switched from ON VD when carriers recombine

Measurements include surface and bulk recombination

t=0

≈0.7V

off

Use also DLTS: identifies traps (Et) and concentrationsThermal or photoexcitation processes in voltage

modulable space-charge region (Schottky Diode, p-n, MOS Capacitor)

Measured: capacitance, currents or conductance

for t>4

Excess Carrier Concentrations Decays: minority carriers

x=tL/td

Experiment to calculate the diffusion constant Dp, (n) for minority carriers (pn) -> µp,

(n)

oscilloscope screenPulse

vd-> µ

diffusion

Drift: vd=L/td

µp=vd/E

drift

Mobility of minority carriers



Modeling Particle Contamination and Yield

• Particles of feature size cause defects

• ≈ 75% of yield loss in modern VLSI fabs is due to particle contamination.• Yield models depend on information about the distribution of particles. Yields

models use measured defect density N(dp) and size (dp)

• Particles on the order of 0.1 - 0.3 µm are the most troublesome: • larger particles precipitate easily • smaller ones coagulate into larger particles

• Yields are described by Poisson statistics in the simplest case.

where AC is the critical area and DO the defect density.

• This model assumes independent randomly distributed defects and often underpredicts yields.

Contamination Reduction

Particles 10nm-10 µm

N(dp)=K(dp)-3

Even very small particles leads to failure (pinhole in the oxide )

Models and Simulations

Computer Integrated Manufacturing (CIM) Goal:monitor and control machines, recipes to improve YIELDS

!!



• Use of negative binomial statistics eliminates these assumptions and is more accurate.

where C is a measure of the particle spatial distribution (clustering factor).

Yields depend on defects (D0) density and chip size (Ac) (excluding ares of usual low yields (perimeter)

C ∞

NB P

•Defects are random and independent•Predicts too low yields

NB - less random/independent (ex. Clustering)

Spacial distribution of defects

Yields in ICs

Fraction of failed

ITRS needs



• Vertical lines are estimated chip sizes (from the ITRS).

• Note that defect densities will need to be extremely small in the future to achieve the high yields required for economic IC manufacturing.

Yields in ICs

NB Yield = f(DO)

MONITOR DEFECTS

C=2

Defect density

≈40x40mm2

Overall yield depends on each step in the manufacturing cycle



Modeling Wafer Cleaning• Cleaning involves removing particles, organics (photoresist) and metals from wafer surfaces.• Particles are largely removed by ultrasonic agitation during cleaning.• Organics like photoresists are removed in an O2 plasma or in H2SO4/H2O2 solutions.• The “RCA clean” is used to remove metals and any remaining organics.• Metal cleaning can be understood in terms of the following chemistry.

(5)

(6)

• If we have a water solution with a Si wafer and metal atoms and ions, the stronger reaction will dominate.• Generally (6) is driven to the left and (5) to the right so that SiO2 is formed and M plates out on the wafer.• Good cleaning solutions drive (6) to the right since M+ is soluble and will be desorbed from the wafer surface.

Contamination Reduction: Wafer Cleaning

No models exist but good understanding of cleaning steps

Remove metals by oxidizing (=removing e -> ions) and dissolving in cleaning solutionsSi+2H2O <->SiO2 +4H++4e-

M <-> MZ+ Ze-

Ex. SiO2/Si Fe3+/Fe stronger potential Fe3+ -> Fe. Fe is plating on Si, Si is oxidizingAdd H2O2 stronger potential -> Takes e- from M -> ions soluble in aqueous sol.

Oxidizes SiLarger potential -> reaction to the left all others go to the right

Use OZONE

Manufacturing Methods and Equipment

Wafer Cleaning

High-pH Oxidizes organics -> water soluble compounds and complexes IB IIB and other metals Au, Ag, Cu, Ni, Zn etc.

Low-pHInsoluble in NH4OH

Gettering

All metal atoms mobile (DMi > DMs 10x)

(Fig. 4.8!) DM>> DDopantss

Sol. Sol MI>>MS (Cu, Ni)Sol.Sol. MI<<MS (Au, Pt)

Except of Ti, Mo, etc.

AuS+I Aui kick-out mechanismAus Aui+V dissociative or Frank-Turnbull mech.

I increase improves gettering of AuV increase hinders gettering

Ex. P diffusion, Ion Implant=damage, intrinsic gettering (=I )

“I ” are closer to wafer surface

Metal Diffusion to the Gettering Sites

Long time

Au diffuses to the wafer back side and is trapped

Gettering of Au - the Role of the Back Side Injection of Si-I

Metals diffuse much faster than I (silicon) DSi-I >> DDopants

I are generated at the back and diffuse -> Aui form, diffuse and get trapped

At high T I -> gettering more effective, not limited by the backside injection

Trapping the Metal Atoms at the Gettering SitesTrapped by: ion implantation, P diffusion, laser damage, poly-Si

films, mechanical damage, etc. But HOW?

*Physical damage -> metal trapped at defect sites; binding energy EB depends on

T; Fraction Bound=(1-K1exp-EB/kT)

*Segregation, related to solubility (of substitutional Au) in the silicon perfect crystal and in the gettering regionCAu,Si=NSiexp(-EA1/kT) CAu,G=NGexp(-EA2/kT) -> k0=(CAu,G+CAu,Si)/CAu,Si=1+K2exp-[(EA1-EA2)/kT] --> k0=1+NG/5x1022exp(0.82eV/kT)

*Enhances sol.sol by high dopant concentrations: in “n ” Au=acceptor, “p ” - Au=donorAu+e- Au-, Keq=[Au-]/([Au][e-])=constant, [Au-

i]/[Au]ni= [Au-n]/[Au]n or

[Au-n]/[Au-

i] = n/ni Au acceptor in “n+” Si (100x if N=7.14x1018 -> 1021cm-3

*Ion pairing model -> AuP less strain

* Coulombic attraction Au+P -> Au-P+

* Interaction with point defects V- in “n+” Aui+V- Aus at the trapped site

* Intrinsic gettering - trapping on dislocations and SF which surround precipitates. Dislocations have compressive and tensile stress - accommodate smaller and larger atoms

Limits and Future Trends in Technology and Modeling; Environment

Eliminate defects from wafers: particles, contaminants, clean room -> local=SMIF (standard mechanical interfaceWafer cleaning in future ICs-> less chemicals (liquids, vapors), more diluted (disposal)

New cleaning: •Use ozone• Dry and vapor phase, (Vapors, Plasmas) environment! Cluster tools• Low Energy Physical Processes (sputtering)•Photochemically enhanced clean

Gettering -> intrinsic (less extrinsic), control Oi, Cs, use low T processing, use modeling tool -> point defects engineering, release, diffuse, entrap. Watch for

surface roughness



Summary of Key Ideas

• A three-tiered approach is used to minimize contamination in wafer processing.

• Particle control, wafer cleaning and gettering are some of the "nuts and bolts" of chip manufacturing.

• The economic success (i.e. chip yields) of companies manufacturing chips today depends on careful attention to these issues.

• Level 1 control - clean factories through air filtration and highly purified chemicals and gases.

• Level 2 control - wafer cleaning using basic chemistry to remove unwanted elements from wafer surfaces.

• Level 3 control - gettering to collect metal atoms in regions of the wafer far away from active devices.

• The bottom line is chip yield. Since "bad" die are manufactured alongside "good" die, increasing yield leads to better profitability in manufacturing chips.

silicon vlsi technology fundamentals, practice and modeling by plummer, deal & griffin © 2000...

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