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www.ansys.com ANSYS Advantage © 2009 ANSYS, Inc. Seeing the Future of Channel Design NVIDIA uses VerifEye and QuickEye as an extension to traditional SPICE-level simulation approach to design high-performance graphics solutions. By Chris Herrick, Technical Lead, Ansoft LLC It’s hard to imagine, but there was once a day when slick high-resolution graphics were not the norm. With increasing monitor sizes as well as ever-sharper digital media and spectacular gaming technology, computer graphics have progressed in an amazing way. NVIDIA ® is a world leader in visual computing technologies and the inventor of the GPU, a high-performance processor that generates breathtaking, interactive graphics on work- stations, personal computers, game consoles and mobile devices. NVIDIA serves the entertainment and consumer market with its GeForce ® graphics products, the professional design and visualization market with its Quadro ® graphics products, and the high-performance computing market with its Tesla™ computing solutions products. One of the hardest challenges when designing these high-performance graphics solutions is ensuring that the communication link is clear between the pixel generation and pixel display. That means the signal, representing a zero or one, originating at one part of the system needs to prop- agate undistorted to another area so it may be detected without errors. As data link speeds increase, so do the problems that affect signal quality. Every part of the physical routing channel has some influence on the propagating electro- magnetic fields and, thus, on the detected waveform. The channel could be assembled from many combinations of elements including packages, transmission lines, cables, connectors and vias. A discontinuity or impedance ELECTRONICS images © istockphoto.com/MorganLeFaye, istockphoto.com/macroworld, istockphoto.com/LPETTET, istockphoto.com/FarukUlay

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Page 1: Seeing the Future Channel Design - Ansys · Seeing the Future of Channel Design NVIDIA uses VerifEye and QuickEye as an extension to traditional SPICE-level simulation approach to

www.ansys.comANSYS Advantage • © 2009 ANSYS, Inc.

Seeing the Future of Channel DesignNVIDIA uses VerifEye and QuickEye as an extension to traditional SPICE-level simulation approach to design high-performancegraphics solutions.By Chris Herrick, Technical Lead, Ansoft LLC

It’s hard to imagine, but there was once a day whenslick high-resolution graphics were not the norm. Withincreasing monitor sizes as well as ever-sharper digitalmedia and spectacular gaming technology, computergraphics have progressed in an amazing way. NVIDIA® is aworld leader in visual computing technologies and theinventor of the GPU, a high-performance processor thatgenerates breathtaking, interactive graphics on work-stations, personal computers, game consoles and mobiledevices. NVIDIA serves the entertainment and consumermarket with its GeForce® graphics products, the professionaldesign and visualization market with its Quadro® graphicsproducts, and the high-performance computing market withits Tesla™ computing solutions products.

One of the hardest challenges when designing thesehigh-performance graphics solutions is ensuring that thecommunication link is clear between the pixel generationand pixel display. That means the signal, representing a zeroor one, originating at one part of the system needs to prop-agate undistorted to another area so it may be detectedwithout errors.

As data link speeds increase, so do the problems that affect signal quality. Every part of the physical routingchannel has some influence on the propagating electro-magnetic fields and, thus, on the detected waveform. Thechannel could be assembled from many combinations ofelements including packages, transmission lines, cables,connectors and vias. A discontinuity or impedance

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Page 2: Seeing the Future Channel Design - Ansys · Seeing the Future of Channel Design NVIDIA uses VerifEye and QuickEye as an extension to traditional SPICE-level simulation approach to

www.ansys.comANSYS Advantage • © 2009 ANSYS, Inc.

mismatch to the propagating signal could occur at any pointalong the transmission path.

A common tool for the signal integrity engineer is circuitsimulation. By modeling the channel virtually, engineers areable to predict waveforms not only at the receiver but foreach section of their modeled channel. This level of detailallows engineers to verify signal detection as well as to determine the contribution of signal distortion for eachsection of the channel. To improve or optimize a system, thesections of channel that produce the greatest signal distortion can be identified, and intelligent changes can bemade. These changes could include geometric variations,elimination or addition of components, or material selection.

In order to construct the virtual channel, NVIDIA chosethe Ansoft Designer tool as its simulation environment.Ansoft Designer allows the engineer to assemble eachpiece of the channel as a black box model. These modelsmay comprise measured data, simple circuits, SPICE components or dynamic l inks into any of Ansoft’s circuit extraction tools. These individual models may be rearranged,bypassed or parametrically varied, providing theengineer with the ability to test all possibleconfigurations. This high-level schematicapproach also allows the design to be easilyshared among different groups, which then canquickly see what is being modeled and provideinput into the design.

Under the hood of Ansoft Designer softwarelies the powerful circuit simulator productNexxim. Nexxim technology is a high-capacity,high-accuracy engine for linear networkanalysis, transient analysis, harmonic balance,fast convolution and statistical methods. Withthis array of different simulators, NVIDIA isable to look at channel performance frommany different perspectives, all from within thesame environment.

The traditional signal integrity simulationmethodology is to perform a transient simu-lation. Using this approach, the driver is toggledfor a length of time and the voltage is monitoredat receiver. A common way of viewing thisreceived data is to overlay the voltage versustime for each bit period, or unit interval. The

resulting graph is called an eye diagram, and it canvery clearly show whether the received data is able to bedetected error free.

Transient analysis is the most accurate means of determining signal waveforms, but it is limited by the scopeof the problem. To fully analyze all the variations in a channelwith nonlinear devices can take days to weeks. Trying toachieve low bit error rates (BERs) poses an additional challenge. Using transient analysis, simulating enough bits to satisfy a BER of 10-12 could take years. In order to satisfy these engineering challenges, Nexxim technology has incorporated two specialized solvers, namely QuickEyeand VerifEye.

According to Ting Ku, director of signal integrity atNVIDIA, “The obvious reason for statistical transition is related to simulation coverage. Given there is a finiteamount of time and machine resources, the statisticalapproach gives engineers systematic coverage without

Full channel simulation using the Ansoft Designer tool

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The top image demonstrates the receiver eye on a channel where the data cannot berecovered; the bottom is a clean eye diagram where the data is recoverable.

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Page 3: Seeing the Future Channel Design - Ansys · Seeing the Future of Channel Design NVIDIA uses VerifEye and QuickEye as an extension to traditional SPICE-level simulation approach to

www.ansys.comANSYS Advantage • © 2009 ANSYS, Inc.

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running an astronomical number of simulation corners. Oneother good benefit of the statistical approach is in dealingwith design corner definition by projecting what the finalproduction yield would be. Using the statistical method-ology allows engineers to make judgment calls betweencost and production yield.”

While both QuickEye and VerifEye methods offer significant speedup over transient analysis, each offers adifferent solution to the problem at hand. QuickEye is a fastconvolution-based method that allows the user to explicitlydefine a bit pattern that is sent and to view the resultantwaveforms. VerifEye is a purely statistical-based approachthat characterizes BER of a channel down to 10-16.

Both of these methods begin analysis the same way byfirst computing the transfer function of the channel. Thiscomputed channel response is assumed to be linear–timeinvariant. For QuickEye, the channel response is then convolved with a user-specified bit sequence to obtain atime vs. voltage waveform. For VerifEye, a cumulative distribution function is derived from the step responsebased on the conditional probability of various bit transitions. The main outputs from these analyses would be an eye diagram from QuickEye and a bathtub or astatistical eye contour plot from VerifEye.

Eye contour plot generated with the VerifEye tool

Bathtub curve of feed forward equalization performance generated with theVerifEye tool

While it is critical to fully characterize the entire passivechannel, the scope of the analysis does not stop there. Inorder to compensate for frequency-dependent effects ofthe channel, such as inter-symbol interference (ISI), NVIDIAuses silicon-based compensation. Additionally, there maybe other influences on the signal in the form of jitter thatmust be accounted for. This jitter may be seen at both thedriver and the receiver.

As part of its investigation into silicon-based channelcompensation, NVIDIA can use either QuickEye or VerifEye toevaluate feed forward equalization (FFE) or decision feedbackequalization. If the silicon has already been characterized, thenumber of equalization taps and their respective weights canbe added to either the driver or receiver on the channel. During early stages of design, the Nexxim tool can be used to automatically calculate the ideal weights necessary toinvert the effects of the channel on a bit stream.

Jitter characterization, and its inclusion in simulation, isanother area critical to NVIDIA. Without including all sourcesof noise, accurate BER simulations would be impossible.Random jitter (RJ) and duty cycle distortion (DCD) can alsobe added to each driver. ANSYS also learned from this part-nership with NVIDIA that the inclusion of periodic jitter (PJ)and sinusoidal jitter (SJ) would be useful features so ANSYShas since enhanced the Nexxim tool to include this capability.Deterministic jitter (DJ), based on ISI, will inherently bemodeled by the channel’s transfer function. At the receiver,the source jitter will accumulate with the DJ of the channel tocreate a new jitter distribution. This jitter in combination withthe jitter defined at the receiver, either RJ or a user-defineddistribution, will account for the total jitter (TJ) of the channel.Reducing TJ is the main objective when designing a channelfor low BER.

With ever-increasing bit rates and channel complexity,the landscape of signal integrity analysis is changing drastically. Transient analysis can no longer be relied on asthe sole means of channel simulation, especially when tryingto achieve extremely low BER. This challenge has been methead on at NVIDIA by adopting QuickEye and VerifEye analysis into their design process. ■

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Name X Ym1 0.4997 0.0000m2 0.4997 35.2263m3 0.5003 -34.2387m4 0.6834 0.3292m5 0.3172 0.3292

Name Delta(X) Delta(Y) Slope(Y) InvSlope (Y)d(m1,m2) 0.0000 35.2263 N/A 0.0000d(m1,m3) 0.0007 -34.2387 -51985.7339 -0.0000d(m1,m4) 0.1838 0.3292 1.7916 0.5582d(m1,m5) 0.1824 0.3292 -1.8046 -0.5542

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