s1p2 curtiss fox clemson university

8/19/2019 S1P2 Curtiss Fox Clemson University

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Introduction to the

15 MVA Grid Simulator:Challenges in Fault Ride-Through Testing

Energy Systems Innovation Center

Workshop11/20/2013

J. Curtiss Fox – [email protected]


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• new technologies that must play a significant role in power system stability.• the ability to replicate a complex dynamic system like the electrical grid for testing

purposes.

• extensive testing of hardware and software to meet safety and quality assurance

requirements through ‘fully integrated’ system testing.

• parallel model verification and validation of physical hardware to ensure higher

reliability and stability once deployed on the electrical grid.

Development Demonstration Verification

Advanced Testing Lowers the Risks and Costs of

New Technology Introduction into the Market

Deployment RisksTime to MarketTotal Costs

Transforming the electrical grid into

an energy efficient network requires:


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Grid Integration Evaluations• Power Set Points

• Voltage and Frequency Variations

• Controls Evaluation

Steady State and Envelope

Evaluations

• Voltage Flicker

• Harmonic Evaluations

• Anti-Islanding (Software)Power Quality Evaluations

•Frequency Response

• Active Volt-VAR Control

• Active Frequency RegulationAncillary Services

• Low Voltage Ride-Through (LVRT)

• Unsymmetrical Fault Ride-Through

• High Voltage Ride-Through (HVRT)

Grid FaultRide-Through Testing

• Recreation of field events withcaptured waveform dataOpen Loop Testing

• Simulated dynamic behavior andinteraction between grid and thedevice under test

Hardware-In-the-Loop

Testing

I n c r e a s i n

g l e v e l o f d i f f i c u l t y


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23.9 kV Utility Bus

7.5MW Test Stand

15MW Test Stand

Graduate Education Center

500 kW Solar Array

23.9 kV 20 MVA Test Bus

Experimental Bay #1Experimental Bay #2Experimental Bay #3

15 MVA HIL

Grid Simulator

Up to three independent

grid integration tests can run

simultaneously in each of

the three experimental bay’s

4.16 kV 5 MVA Test Bus


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MV Single Line Diagram

Variable 23.9 kV (50/60 Hz) 5

Main Facility Electrical Bus (23.9 kV)


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Electrical Capabilities

Overall Electrical Capabilities

Main Test Bay

Nominal Voltage 24 kV (50/60 Hz)

Nominal Power 15 MVA (7.5 MVA)

Frequency Range 45 to 65 Hz

Sequence Capabilities 3 and 4 wire operation

Overvoltage capabilities 133% Continuous Overvoltage

Fault Simulation Yes (includes Reactive Divider)Hardware-In-the-Loop Yes

Small Test Bay 1

Nominal Voltage 4160 V (50/60 Hz)

Nominal Power 3.75 MVA (3 MW @ 0.8 PF)




Fault Simulation Limited to Converter Only

Hardware-In-the-Loop YesSmall Test Bay 2

Nominal Voltage 4160 V (50/60 Hz)

Nominal Power 3.75 MVA (3 MW @ 0.8 PF)




Fault Simulation Limited to Converter Only

Hardware-In-the-Loop Yes

Three Independent Test Bays

6


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Series Connected H-Bridge (SCHB) Topology

V A

VB

VC

N

TECO Westinghouse Motor

Company: Power Amplifier

Power Amplifier Specs Installed Power 20 MVA (15 MW @ 0.8 PF)

Rated Power 15 MVA (12 MW @ 0.8 PF)

Cabinet Power Split 4 x 3.75 MVA or 2 x 7.5 MVA

Rated Voltage 0 - 4160 V

Overvoltage 133 % Rated Output Voltage

Multilevel Operation 7 - Levels (9 - Levels Overvoltage)

Frequency Range 3 - 66 Hz

Overload Capability 110% for 60 s (10 min duty cycle)

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Full Power Amplif ier Diagram wi th 8 parallel SCHBs


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• Phase Shifted Carrier PWM – High degree of harmonic cancelationdue to multilevel architecture

– Increased reference sampling fidelity

• Sampling fidelity is further increasedby using asymmetrical sampling of

each individual carrier

8

First noise mode is at 8 times

the switching frequency

Reference resolution also at12 kHz using asymmetrical

sampling

Total Harmonic Distortion:

0.15% THD (0 – 50th)

0.24% THD (0 – 100th)

0.30% THD (0 – 150th)

0.34% THD (0 – 200th)

Synchronous Sampling up to 12 kHz

TECO Westinghouse Motor

Company: Power Amplifier

Power Amplif ier Output Harmonic Spectrum (Fs = 2 kHz)

~260th

Harmonic


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Fault-Ride Through (FRT)

Testing Methods and Requirements

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•ABB Factory Testing (2009)

•FGH Test Systems Field Testing (2006)

Reactive Divider Network Method

•GE Power Conversion (Fr. Converteam)

•Vestas V164 Test Bench (2013)

•NAREC 15 MW Test Bench (Hybrid?) (2014?)

•ABB Test Systems

•NWTC at NREL (4Q-2013)

Voltage Source Converter Method

•Clemson University (1Q-2014)

A Hybrid Method

World Wide FRT Withstand Curves


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Reactive Divider Network Method• Faults created at the PCC to allow fortrue zero voltage faults

• Real inductances provide a worst casescenario for line connected machinery

• Operates at the fixed frequency ofutility connection

• Requires a sufficient fault duty fromthe utility for voltage regulation

Advantages and Challenges

with Existing FRT Technologies

Voltage Source Converter Method

• Faults created behind a step-up transformer

limit true zero voltage faults• Voltage regulation is straight forward given

close electrical coupling with the DUT

• Step-up transformer flux management limitssharp voltage transitions

• Power electronics must handle the fault

current delivered by the DUT 10


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Why a Hybrid Method?Increased flexibility and accuracy of FRT evaluations

– Faulted at the point of common coupling (PCC) – True zero voltage faults (ZVRT)

– Magnetic flux decoupling between transformers

– Real inductive loading for transient time constant analysis

– Backwards compatible with existing methods

– Power electronic switching for point-in-wave studies

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The Hybrid Method:

Operation Cycle

The Operation Cycle1. Open Series

Bypass Switch

2. Close Shunt

Fault Switch3. Open Shunt

Fault Switch

4. Close Series

Bypass Switch

There are only three unique

system states in the operation

cycle.

State 2

State 1 State 3

State 2

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The Time-Variant

Thevenin Equivalent Model

The three unique states of the single phase systemmodel can be compressed into a time-variant

Thevenin equivalent model.

The time-variant Thevenin equivalent model is then

only dependent upon the state of each switch.

The time-variant Thevenin equivalent model is:

where:

and

13


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Development of the Control

Strategy

The basis of control is built using the Internal ModelPrinciple to control at the Point of Common Coupling

The voltage control signals are derived from twocomponents:

1.) The feed-forward, open-circuit voltage reference, K2.) The feedback, closed-circuit voltage compensation, G

K is only dependent on the state of SF

G is only dependent on the state of SB

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16

Fixed Switch

Positions

Shunt Fixed

(mH)

Series Fixed

(mH)

Total

Shunt (mH)

Total

Series (mH)

1-1-1-0 0 25 0-25 25-50

1-1-0-0 0 50 0-25 50-75

1-0-0-0 0 75 0-25 75-100

0-1-1-1 25 0 25-50 0-25

0-1-1-0 25 25 25-50 25-50

0-1-0-0 25 50 25-50 50-75

0-0-1-1 50 0 50-75 0-25

0-0-1-0 50 25 50-75 25-50

0-0-0-1 75 0 75-100 0-25

Table of Fixed Reactance Combinations

Reactive Divider Network• Safety Considerations

– Access controlled room

– Automatic grounding system when not in service

• Voltage Isolation – 35 kV insulation system

– 2500 A (100 MVA) DUT fault duty

• Performance and Flexibility – Remote control of all elements allows for setup and

operation without the need for room access – Individual phase operation allows for thousands of three

phase impedance combinations


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Table of Fixed Reactance Combinations

17

Fixed Switch

Positions

Shunt Fixed

(mH)

Series Fixed

(mH)

Total

Shunt (mH)

Total

Series (mH)

1-1-1-0 0 25 0-25 25-50

1-1-0-0 0 50 0-25 50-75

1-0-0-0 0 75 0-25 75-100

0-1-1-1 25 0 25-50 0-25

0-1-1-0 25 25 25-50 25-50

0-1-0-0 25 50 25-50 50-75

0-0-1-1 50 0 50-75 0-25

0-0-1-0 50 25 50-75 25-50

0-0-0-1 75 0 75-100 0-25

Reactive Divider Network• Safety Considerations

– Access controlled room

– Automatic grounding system when not in service

• Voltage Isolation – 35 kV insulation system

– 2500 A (100 MVA) DUT fault duty

• Performance and Flexibility – Remote control of all elements allows for setup and

operation without the need for room access – Individual phase operation allows for thousands of three

phase impedance combinations


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Controller Design Validation with

Controller Hardware-In-the-Loop Experiments

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National Instruments

Interface Controller Real Time Power

System Simulator

RTDS®

• Controller Hardware-In-the-Loop (CHIL) experiments are designed to evaluate the

controllability and stability of performing fault ride-through evaluations with the HybridMethod

• The RTDS system simulates the Grid Simulator physical system model and the DUT models

• A scale version of the Interface Controller is used to validate the control algorithms

Block Diagram of the CHIL experiments for the Hybrid Method


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Example CHIL Results10 MVA Synchronous Generator:Three Phase Fault – 0% Remaining Voltage


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Magnetic Flux Decoupling During the FaultElectrical distance created by the series impedance decouples the magnetic

flux between the two transformers.

The magnetic flux of the power amplifier step-up transformer is passivelycontrolled by the hybrid method vector controller.

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10 MVA Sync. Gen – 3PF – 0%


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Th k Y

s1p2 curtiss fox clemson university

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