review: mos capacitor with external biasese570/spring2017/handouts/lec5_6u… · lec 5: january 26,...

1

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

Lec 5: January 26, 2017 MOS Operating Regions, pt. 1

Penn ESE 570 Spring 2017 – Khanna

Lecture Outline

!  3 Regions of operation for MOSFET "  Subthreshold "  Linear "  Saturation

!  Level 1 Model

2 Penn ESE 570 Spring 2017 – Khanna

- - - - -

Review: MOS Capacitor with External Bias

!  Three Regions of Operation: "  Accumulation Region – VG < 0 "  Depletion Region – VG > 0, small "  Inversion Region – VG ≥ VT, large

3 Penn ESE 570 Spring 2017 - Khanna

- - - - -

Subthreshold/cut-off Above threshold

- - - - -


!  Three Regions of Operation: "  Accumulation Region – VG < 0 "  Depletion Region – VG > 0, small "  Inversion Region – VG ≥ VT, large


- - - - -


- - - - -


!  Three Regions of Operation: "  Subthreshold/Cut-off Region – VG < VT

"  Above threshold/Inversion Region – VG ≥ VT


- - - - -


VT VT

Review: nMOS = MOS cap + source/drain

6

VSB = 0

-

- - - - - -

- - -

-

VG VD VS

xd =2εSi 2ΦFp −VSB

q ⋅NA

Penn ESE 570 Spring 2017 - Khanna

2

Review: Threshold Voltage

7

for VSB = 0

for VSB != 0 VT =VT 0 +γ 2ΦF −VSB − 2ΦF( )

Penn ESE 570 Spring 2017 - Khanna

γ =2qNAεSiCox

VT =VT 0 =ΦGC −QoxCox

− 2ΦF −QB0Cox

MOSFET – IV Characteristics

VGS

IDS

0

10

20

30

40

50

0 2 4 6 8 10

Dra

in c

urr

ent

[arb

itra

ry u

nit

]

Gate to source voltage [V]

VDS

Define:Vth = Threshold Voltage


MOSFET – IV Characteristics

VDS

IDSVGS -Vth

VDS ≥VGS -VTH

VDS <VGS -VTH


Cutoff Region

10

VGS << VT0

Substrate or Bulk B p

Depletion region

-

-

-

- -

-

- - -

-

Immobile acceptor

ions

VS

VG VD

NMOS TRANSISTOR IN CUTOFF REGION

No depletion or inversion layer under oxide, no current flow


Onset of Inversion Region

11

QB0 QI

-

- -

- - - - - -

-

- - -

-

VG VD

VGS = VT0n + δVDS = 0

Depletion region, and thin inversion layer (aka channel) Thermal equilibrium in channel, no current flow


Linear Region

12

n+ n+ -

- - -

- - - -

- -

-

VGS > VT0 VDS small, VDS < VGS - VT0

Channel acts like voltage controlled resistor Current flows proportional to VDS ( )

As VD increases, channel depth at the drain decreases

ID ∝VDS


3

Channel Voltage

!  Voltage varies along channel !  Channel acts as a resistor

"  Serves as a voltage divider between VS and VD


Voltage along Channel

y=0 y=L

y V(y)

14

!  Voltage divider between VS and VD




y=0 y=L

y V(y)

Vs

Vd




y=0 y=L

y V(y)

Vs

Vd




y=0 y=L

y V(y)

Vs

Vd


Linear/Saturation Region Edge

18

n+ n+ -

- - -

- - - - -

- - -

-

VGS > VT0 VDS = VGS – VT0

Voltage divider along channel, until pinch off As VD increases, channel depth at the drain decreases


4

Channel Field

!  When voltage gap VG - Vy drops below Vth, channel drops out of inversion "  If VDS = VGS – Vth #VGS – VDS =VG – VD = Vth


Saturation Region

20

V(x) = VDSAT

VDS - VDSAT

n+ n+

z -

- -

- - - - -

- - -

-

VGS > VT0 VDS > VGS – VT0


Channel Field

!  When voltage gap VG - Vy drops below Vth, drops out of inversion "  What if VDS > VGS – Vth #VDS – VGS > Vth?

"  Upper limit on current, channel is “pinched off” "  nMOS current saturated


22

zn+ n+



MOSFET IV Characteristics – Linear Region

23

z

Mobile charge in inverted channel:

n+ n+

QI(y) = - Cox [VGS – V(y) - VT0]

V(y)



V(y=0) = VS = 0, V(y=L) = VDS=VD Boundary Conditions:


24

xy

z y

µn = electron mobility = cm2/(V sec)


dR = − dyW ⋅µn ⋅QI (y)


5


25

dVCS

QI(y) = – Cox [VGS – V(y) – VT0] dR = − dyW ⋅µn ⋅QI (y)

dVC = ID ⋅dR = −ID

W ⋅µn ⋅QI (y)dy

−W ⋅µn ⋅QI (y) ⋅dVC = ID ⋅dy

ID ⋅dy0

L

∫ = −W ⋅µn ⋅QI (y) ⋅dVC0

VDS

∫

ID ⋅ L =W ⋅µn ⋅Cox (VGS −VC −VT 0 ) ⋅dVC0

VDS

∫

ID = µn ⋅CoxWL(VGS −VT 0 )VDS −

V 2DS2

⎛

⎝⎜⎜

⎞

⎠⎟⎟

V(y=0) = VS = 0, V(y=L) = VDS Integrate along the channel:



26


V 2DS

2#

$%

&

'(

ID =k22(VGS −VT 0 )VDS −V

2DS( )

k ' = µn ⋅Cox k = k 'WL

ID =k '2WL2(VGS −VT 0 )VDS −V

2DS( )


MOSFET IV Characteristics

27

ID(VDS = VDSAT) and VDSAT = VGS - VT0

Assumptions:



28

ID(VDS = VDSAT) = ID(sat)

@VDS = VDSAT = VGS - VT0

SAT LINEAR ID(sat)

IN GENERAL

IDSAT =µn ⋅Cox

2WLVGS −VT 0( )2


29

VDSAT

n+ n+

VGS > VT0 VDS > VGS – VT0

ΔL

IDSAT =µn ⋅Cox

2WL '

VGS −VT 0( )2 = µn ⋅Cox

2W

L 1− ΔLL

$

%&

'

()VGS −VT 0( )2

ΔL∝ VDS −VDSAT 1− ΔLL≈1−λ ⋅VDS

empirically

If λ$VDS<<1, 1− ΔLL≈1−λ ⋅VDS ≈1+λ ⋅VDS

MOSFET IV Characteristics - Saturation


30

IDSAT =µn ⋅Cox

2WL '

VGS −VT 0( )2 = µn ⋅Cox

2W

L 1− ΔLL

$

%&

'

()VGS −VT 0( )2

ΔL∝ VDS −VDSAT 1− ΔLL≈1−λ ⋅VDS

emprically

If λ$VDS<<1, 1− ΔLL≈1−λ ⋅VDS ≈1+λ ⋅VDS

MOSFET IV Characteristics - Saturation

ID =µn ⋅Cox

2WLVGS −VT 0( )2 (1+λ ⋅VDS )


6

31

ID =µn ⋅Cox

2WLVGS −VT 0( )2 (1+λ ⋅VDS )

λ≠0 λ=0


V 2DS

2#

$%

&

'(

Saturation Region:

Linear Region:



32

ID =µn ⋅Cox

2WLVGS −VT 0( )2 (1+λ ⋅VDS )

λ≠0 λ=0


V 2DS

2#

$%

&

'(

Saturation Region:

Linear Region:


DISCONTINUOUS! @ VDS = VDSAT


33

ID =µn ⋅Cox

2WLVGS −VT 0( )2 (1+λ ⋅VDS )

λ≠0 λ=0


V 2DS

2#

$%

&

'((1+λ ⋅VDS )

Saturation Region:

Linear Region:




34

ID =µn ⋅Cox

2WLVGS −VT 0( )2 (1+λ ⋅VDS )

λ≠0 λ=0


V 2DS

2#

$%

&

'((1+λ ⋅VDS )

Saturation Region:

Linear Region:



Level 1 model λ$VDS<<1


35

ID =µn ⋅Cox

2WLVGS −VT (VSB )( )2 (1+λ ⋅VDS )

ID = µn ⋅CoxWL(VGS −VT (VSB ))VDS −

V 2DS

2#

$%

&

'((1+λ ⋅VDS )

Saturation Region:

Linear Region:

MOSFET IV Characteristics, VSB≠0

VT =VT 0 +γ 2ΦF −VSB − 2ΦF( )

ID = f (VGS,VDS,VSB )


36

ID =

0 VGS ≤VTnµn ⋅Cox

2WL2 VGS −VTn (VSB )( )VDS −V 2

DS( )(1+λ ⋅VDS ) VGS >VTn,VDS <VGS −VTn

µn ⋅Cox

2WLVGS −VTn (VSB )( )2 (1+λ ⋅VDS ) VGS >VTn,VDS ≥VGS −VTn

%

&

'''

(

'''

nMOS IV Characteristics


Cutoff/Subthreshold

Linear/Resistive

Saturation

7

37

ID =

0 VGS ≥VTpµp ⋅Cox

2WL2 VGS −VTp(VSB )( )VDS −V 2

DS( )(1+λ ⋅VDS ) VGS <VTp,VDS >VGS −VTp

µp ⋅Cox

2WLVGS −VTp(VSB )( )

2(1+λ ⋅VDS ) VGS <VTp,VDS ≤VGS −VTp

%

&

'''

(

'''

pMOS IV Characteristics


Cutoff/Subthreshold

Linear/Resistive

Saturation

Measurement of Parameters – k, γ

38

=> SAT

B

S

G

D


Measurement of Parameters – λ

39

=> SAT


Big Idea

!  3 Regions of operation for MOSFET "  Subthreshold "  Linear "  Saturation

"  Pinch Off "  Channel length modulation

!  Level 1 Model "  ID=f (VGS, VDS, VSB) "  Empirical measured parameters: k, γ,λ


Admin

!  HW 3 due Thursday, 2/2 "  Posted tonight after class "  Gets you started with Cadence

"  Make sure you can access Cadence tonight or tomorrow "  Don’t wait until night before homework is due


review: mos capacitor with external biasese570/spring2017/handouts/lec5_6u… · lec 5: january 26,...

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