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13.10.2017

Renesas Synergy ConceptMuch more than a microcontroller family

13.10.2017

Renesas Synergy ConceptMuch more than a microcontroller family

Developers know that time to market is a huge factor in a company’s success. Missed deadlines mean lost opportunities that can often never be replaced. The Renesas Synergy Platform allows developers to save precious design time and get their products to market faster. This session will give you a brief overview of this innovative concept; a game changer in embedded development of both software and hardware.

Presented by:Lou LeenSenior Field Application EngineerAVNET [email protected]

3 13 October 2017 Confidential

Avnet Silica

avnet-silica.com


Embedded Systems Have Changed

￭ Multi-function

￭ Connected with devices via network

￭ Many interrupt sources

Connected Embedded System

Main Task

Graphics TFT

BLE

WiFi

Wired

App1

App2

App3

Touch

￭ Single function

￭ Closed within the device

￭ A few interrupt sources

Legacy Embedded System

Main Task

KeyLCD / LED

Timer


Developers Want to Reduce Development Time

H/WDesign

ApplicationCode

SystemTest

Essential Building Code

Differentiated Code

Development Using Integrated Platform

HardwareDesign

MiddlewareDesign & Test

Driver SoftwareDesign

Integrationw/ RTOS

CloudConnect

ApplicationCode

SystemTest

Traditional Development

H/WDesign

ApplicationCode

SystemTest

Differentiated Code

AdditionalInnovation

ProductDifferentiation


Developers Want to Minimize Total Costs

Visible upfront costs

Underestimated costs

MCU

Purchase

Acquisition

Integration & Optimization

Verification & Qualification

Upgrades & Updates

Development

Training

Support & Maintenance


• How Does Synergy Platform Address These Needs?


An Ideal Platform for Embedded Developers

A complete and qualified platform that accelerates embedded development, inspiring innovation and enabling differentiation.

FasterTime toMarket

ReduceTotal Cost

of Ownership

LowerBarriersto Entry

Our Three ValuesA Solid Platform

SynergyMicrocontrollers

SynergyTools & Kits

SynergySolutions

SynergyGallery

Synergy Software

Software APIs

Synergy Software Package (SSP)

Board Support Package (BSP)

RTOS

HAL Drivers

Middleware & Stacks

Functional Libraries

Application Framework

Qualified Software Add-Ons

(QSA)

Verified Software Add-Ons

(VSA)


What it is: Synergy Platform Elements

• Qualified Synergy Software Package (SSP) for guaranteed operation

• Complete package fully integrated and maintained

• Applications can be written at the Software API level

Software Tools & Kits

• Integrated Solution Development Environment (ISDE) with context-aware documentation

• Starter Kits (SK) and Development Kits (DK) for immediate access to entire software package

Gallery

• Web access to Synergy specific software, tools, licensing plus 3rd pty software & services

• Future growth to complete secure cloud access infrastructure for end-products to use

Solutions

• Product Example (PE) kits: Complete design journeys representative of end-product designs

• Application Example (AE) kits: Technology building-block examples to build upon

• Wide MCU spectrum based on 32bit ARM®

Cortex®-M CPU cores

• Completely scalable and pin compatible

• On-chip Flash memory up to 4 MB

• Security & encryption acceleration

• Ultra low power

Microcontrollers


Renesas Synergy™ Software

Redefining embedded development

Synergy Software

Ver

ified

Sof

twar

eA

dd-O

ns (

VS

A)

Qua

lifie

d S

oftw

are

Add

-Ons

(Q

SA

)





Add-Ons

Software APIs

ThreadX®

RTOSFileX® USBX™ GUIX™

NetX™andNetX

Duo™

Hardware Abstraction Layer (HAL) Drivers

ThreadX ® RTOSMultitasking real time kernel with

preemptive scheduling and small memory

footprint. Stable heartbeat of the

system.

Board Support PackageCustomized for every Synergy hardware kit and MCU. Easily tailored for end-product.

Stacks & MiddlewareX-Ware™ for TCP/IP, USB, color graphics, and file system.

Completely optimized and

integrated.

Hardware Abstraction LayerEfficient drivers for all peripherals and

system services. Eliminates deep study.

Application FrameworkSystem level

services linking RTOS to HAL for

inter-process messaging,

security services, audio playback,

serial comm, power mgmt,

JPEG conversion, touch, and more.

Saves time.

LibrariesSpecialized

software for DSP, touch, security,

safety, and more.

Software APIsStandardized ‘C’ language APIs for X-Ware™, ApplicationFramework, Middleware, Libraries, DSP, HAL, BSP, and

MCU registers. Abstract the dependencies, ensure portability, and accelerate product development.


Renesas Synergy™ Software Package – Block Diagram



ThreadX®

RTOS

Memory Management

Message Queue

Inter-process and Inter-thread

Communication

Advanced Scheduler

FileX®

Very Fast Performance and

Low Footprint

Complete Flash Management

FAT12/16/32, exFAT, SD,

microSD, CF, and MemoryStick

USBX™

Host Stack

Host Controller

Device Stack

Device Controller

Host Classes(Storage, CDC,

HID, Hub)

Device Classes(Storage, CDC,

Audio, HID, Printer)

GUIX™

GUIX Studio

Run Time Library

CanvasDrawing

Screen

System

WidgetWindow

NetX™ and NetX™ DuoFTP

TFTP

Telnet

PPP

SMTP

POP3

HTTP

DNS

SNTP

NATTCP

IPv4/v6

UDP

ICMP

IGMP

ARP

RARPDHCP


CMSIS DSP

Security & Encryption

Hardware Abstraction Layer (HAL) Drivers

CAN

UART

SDHI

QSPI

SPI

IIC

SSI

RTC

Ethernet MAC Controller

Data Transfer Controller

DMA Controller

Clock Management

Graphics LCD Controller

2D Drawing Engine

Segment LCD Controller

And more…

ADC12

ADC14

DAC12

Safety

USBHS

USBFS Timing & ControlSecurity & Encryption


Audio

Console

JPEG

SPI

I2CUART

Touch Panel

External IRQ

Thread Monitor

Power Profile

MessagingCap Touch

Sensing

ADC2D Drawing

Engine

12 13 October 2017 ConfidentialV

erifi

ed

Sof

twar

e A

dd-O

nSynergy Software Package (SSP)

BSP

ThreadX ®

RTOSHAL Drivers

StacksMiddleware

Libraries

ApplicationFramework

Software API

Qua

lifie

d S

oftw

are

Add

-On

BSP BSP

Verified Software Add-ons

VSA Compliance

Proven compatibility with Synergy platform

per Renesas specifications.

Tested on Renesashardware.

Documented Functionality: Test

procedures and results provided.

How to access VSA’s?

VSA evaluation software is downloaded from the

Renesas Synergy™ Gallery.

VSA production software is licensed from the 3rd

party software vendors.

Are VSA’s chargeable?

Case by case.VSA’s can be free-of-charge or chargeable.

Depends on common software market pricing.

How are VSA’s supported?

Synergy is supported by Renesas.For VSA’s, Renesas will support initial assessment and ensure the best possible source of support takes over.


Quality: How Renesas defines software as a product

Established dedicated SDA team, also working with external auditing:

• Software Quality Assurance plan.

• Requirements traceability throughout development.

• SQA metrics & reports available to customers.

Software Quality Assurance (SQA)

Software Development Life Cycle (SDLC):

• Traceability.

• Coding standards.

• Code reviews.

• Continuous integration.

• Professional release process.

Best Practices

Well-respected standards for software development:

• MISRA C:2012 compliant.

• ISO/IEC/IEEE 12207 –Software life cycle processes.

• CERT 2nd Edition –C Programming Language Secure Coding Standard.

Industry Standards

Subject to Change


• For Synergy Software Package (SSP) and QSA:

• Published and maintained on Renesas Gallery.

• Specifications and performance metrics tested and documented.

• Benchmarks, code size, context switch times, latencies, execution times…

• Basis of SSP warranty

Quality: Software data sheets

3488 pages !


Support: Renesas as single point of contact


Technology

Renesas Synergy™ Microcontrollers

Four Microcontroller Series

High Performance

Core FrequencyTo 300 MHz

High Integration


HighEfficiency


Ultra-Low Power

Core FrequencyUp to 32 MHz

�Process:S7 & S5 � 40nm, 2.7V-3.6VS3 & S1 � 130nm, 1.6V-5.5V

�Operating temperature range: -40°C to 105°C

M4240 MHz

4MBS7G2

ARM®

Cortex®

M4120 MHz

2MBS5xx

ARM®

Cortex®

M448 MHz

1MBS3A7

ARM®

Cortex®

S124

M0+32 MHz128KB

ARM®

Cortex®

Flash Density

Per

form

ance

1713 O

ctober 2017C

onfidential

3MB 4MB512KB 1MB 2MB256KB 512KB 1MB64KB 128KB 256KB

Flash Memory Size

Ultra-Low

P

ower

High

Efficiency

High

Integration

High

Perform

ance Synergy M

CU

Packages B

Y M

CU

Group

As of S

EP

2017: S

7G2, S

5D9, S

5D5, S

3A7, S

3A6, S

128, S124 M

CU

Grou

ps

Pin C

ount32

3640

4864

100121

144145

176224

LQF

PB

GA

QF

NLG

A

S7G2

S7G2

S7G2

S7G2

S7G2

S7G2

S7G2 S7G2

S7G2

S7G2 S7G2

S3A7

S3A7

S3A7

S3A7

S3A6

S3A6

S3A6

S3A6

S3A6

S3A6

S3A6

S5D9

S5D9

S5D9

S5D9

S5D9

S5D9

S5D9

S5D9

S5D9

S5D9

S5D5

S5D5

S5D5

S128

S128

S124

S124

S124

S124

S124

S124

S124

S124

S124

S5D5

S5D5

S5D5

S128

S128

S128

S128

Package T

ype

S3A7

S3A7

S3A7

Total of 7 M

CU

Groups

& 56 S

ynergy M

CU

Part

Num

bers


Ultra-Low Power

High Efficiency

High Integration

High Performance

Synergy Platform Roadmapas Of Sep 2017 : Includes MCU, SSP, Tools, Kits, Solutions

Subject to Change

2016 2017

CM4, 48 MHZ, FPU512 KB / 96 KB S3A3

CM4, 48 MHZ, FPU256 KB / 32 KB S3A6

CM4, 48 MHZ, FPU1 MB / 192 KB S3A7

CM0+, 32 MHZ128 KB / 16 KB S124

CM0+, 32 MHZ256 KB / 24 KB S128

CM4, 120 MHZ, FPU2 MB / 640 KB S5D9

CM4, 120 MHZ, FPU1 MB / 384 KB S5D5

CM4, 240 MHZ, FPU4 MB / 640 KB S7G2

S5XX

2018

S5XX NEXT GEN

S3XX NEXT GEN

S7XX NEXT GEN

2019 2020

S3XX

S1XX


Microcontroller Portfolio

Peripheral and Pin Compatibility Across and Between Product Series

Pin Count

PE

RF

OR

MA

NC

EF

lash

Den

sity

4M

3M

2M

1M

512K

256K

128K

64K

36 48 64 100 121 144/145 176 224

Example:LQFP-100 for S7 and S3 are

drop in replacement

What about going from 100pin to 144pin?


Synergy Has Scalable Pin-outs

MF3 Bird's eye view…Alter via "Die_Pads" TabMF3 Bird's eye view…Alter via "Die_Pads" TabMF3 Bird's eye view…Alter via "Die_Pads" TabMF3 Bird's eye view…Alter via "Die_Pads" Tab

☆ ☆ ☆ ☆

☆ ☆ ☆ ☆

☆ ☆ ☆ ☆

☆ ☆ ☆ ☆

☆ ☆ ☆ ☆ ☆：AD input (degital IO area）：　GPIO

★：AD input (Analog IO area）

▲：AD input (Analog IO area）：VCC/VSS/VCL

　＆ DA output

：AVCC0/AVSS0

☆ ☆ ☆ ☆

　：clock/control

　：USB

☆ ☆ ☆ ☆

☆ ☆ ☆ ☆

☆

☆ ☆

☆ ☆ ☆ ☆ ☆ ☆ ☆

☆ ☆ ☆

☆ ☆ ☆

☆ ☆ ☆ ☆

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☆ ☆ ☆ ☆ ☆

☆ ☆ ☆

▲ ▲ ▲ ▲ ▲ ▲ ▲ ▲

▲ ▲ ▲ ▲ ▲ ▲ ▲ ▲ ▲

★ ★ ★ ★ ★ ★ ★ ★ ▲

★ ★ ★ ★ ★ ★ ★ ★ ★ ▲ ☆ ☆

★ ▲ ▲

★ ★ ▲

★ ★ ★ ★ ★ ★ ★ ★ ★ ★ ★

★ ★ ★ ★ ★ ★ ★ ★ ★ ★ ★

★ ★ ★ ★ ★ ★ ★ ★ ★ ★

★ ★ ★ ★ ★ ★ ★

★ ★ ★ ★ ★ ★

★ ★ ★ ★ ★

★ ★ ★ ★ ★

★ ★ ★ ★

★ ★ ★ ★

★ ★ ★

★ ★ ★

★

P2_1

P2_1

P2_1

P2_1

P0 _3/VREFHP0 _3/VREFHP0 _3/VREFHP0 _3/VREFH

P0_2/VREFLP0_2/VREFLP0_2/VREFLP0_2/VREFL

P0_3/VREFHP0_3/VREFHP0_3/VREFHP0_3/VREFH

P2 _9P2 _9P2 _9P2 _9P0 _1P0 _1P0 _1P0 _1 P0 _1P0 _1P0 _1P0 _1P0_1P0_1P0_1P0_1

P0_0P0_0P0_0P0_0

P0_1P0_1P0_1P0_1

P0_ 3/VR EFHP0_ 3/VR EFHP0_ 3/VR EFHP0_ 3/VR EFH

P 0_4 /VREFL0P 0_4 /VREFL0P 0_4 /VREFL0P 0_4 /VREFL0

P0 _5 /VREFH0P0 _5 /VREFH0P0 _5 /VREFH0P0 _5 /VREFH0

VC

LV

CL

VC

LV

CL

P2_0

P2_0

P2_0

P2_0

P2_3

P2_3

P2_3

P2_3

VC

LV

CL

VC

LV

CL

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_1/XC

OU

TP

1_1/XC

OU

TP

1_1/XC

OU

TP

1_1/XC

OU

T

VS

SV

SS

VS

SV

SS

P1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/XTA

L

P1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

L

VC

CV

CC

VC

CV

CC

P2_0

P2_0

P2_0

P2_0

P3_8

P3_8

P3_8

P3_8

QFN

24

P1_11

P1_11

P1_11

P1_11

P1_10

P1_10

P1_10

P1_10

P1_11

P1_11

P1_11

P1_11

P1_6

P1_6

P1_6

P1_6

QFN16

VC

LV

CL

VC

LV

CL

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

T

VS

SV

SS

VS

SV

SS

P1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/XTA

L

P1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

L

VC

CV

CC

VC

CV

CC

P2_0

P2_0

P2_0

P2_0

P1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

T

VC

LV

CL

VC

LV

CL

VSS

VSS

VSS

VSS


P2_12

P2_12

P2_12

P2_12

P3_13

P3_13

P3_13

P3_13

P2_14

P2_14

P2_14

P2_14

VSS

VSS

VSS

VSS

P2_13

P2_13

P2_13

P2_13

P1_8

P1_8

P1_8

P1_8

P1_7

P1_7

P1_7

P1_7

P1_6

P1_6

P1_6

P1_6

P2_14

P2_14

P2_14

P2_14

P2_13

P2_13

P2_13

P2_13

P2_12

P2_12

P2_12

P2_12

P1_8

P1_8

P1_8

P1_8

P2_15

P2_15

P2_15

P2_15

USBUSBUSBUSB

RES#RES#RES#RES#

USBUSBUSBUSB

VCC_USBVCC_USBVCC_USBVCC_USB

USBUSBUSBUSB

USBUSBUSBUSB

USBUSBUSBUSB

VSS_USBVSS_USBVSS_USBVSS_USB

P2_5P2_5P2_5P2_5

USBUSBUSBUSB

VSS

VSS

VSS

VSS

P1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/XTA

L

P1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

L

USBUSBUSBUSB


P4_0P4_0P4_0P4_0

USBUSBUSBUSB


VCC

32 1

48


P2_0

P2_0

P2_0

P2_0

P2_1

P2_1

P2_1

P2_1

5

6

80 3

1 1

2

64 3

1

16 1

240

P2_11P2_11P2_11P2_11

P2_ 11P2_ 11P2_ 11P2_ 11

P5_14P5_14P5_14P5_14

P1_5P1_5P1_5P1_5

P1_15P1_15P1_15P1_15

P1_14P1_14P1_14P1_14

P1_12P1_12P1_12P1_12

P1_13P1_13P1_13P1_13

P1_12P1_12P1_12P1_12VCCVCCVCCVCC

P1_4/MDP1_4/MDP1_4/MDP1_4/MD

RES#RES#RES#RES#

P5_15P5_15P5_15P5_15

P0_1P0_1P0_1P0_1

P0 _2/VREFLP0 _2/VREFLP0 _2/VREFLP0 _2/VREFL

P5_ 12P5_ 12P5_ 12P5_ 12

P5_ 13P5_ 13P5_ 13P5_ 13

P0_0P0_0P0_0P0_0

P0_1P0_1P0_1P0_1


P1_11

P1_11

P1_11

P1_11

P1_10

P1_10

P1_10

P1_10

P1_9

P1_9

P1_9

P1_9

P1_14P1_14P1_14P1_14

P2_15

P2_15

P2_15

P2_15

P1_7

P1_7

P1_7

P1_7

RES#RES#RES#RES#

P1_5P1_5P1_5P1_5

P2_10P2_10P2_10P2_10

P2_7P2_7P2_7P2_7

P1_9

P1_9

P1_9

P1_9

RES#RES#RES#RES# RES#RES#RES#RES#RES#RES#RES#RES#

P2 _8P2 _8P2 _8P2 _8

P1 _4/MDP1 _4/MDP1 _4/MDP1 _4/MD

P1_8

P1_8

P1_8

P1_8

P1_7

P1_7

P1_7

P1_7

P1_6

P1_6

P1_6

P1_6

P1_5P1_5P1_5P1_5


RES#RES#RES#RES#

P1_11

P1_11

P1_11

P1_11

P1_10

P1_10

P1_10

P1_10

P1_7

P1_7

P1_7

P1_7

P1_6

P1_6

P1_6

P1_6

M F3

P1_5P1_5P1_5P1_5

P4_1P4_1P4_1P4_1

P4_0P4_0P4_0P4_0

P2_5P2_5P2_5P2_5

USBUSBUSBUSB

USBUSBUSBUSB

P2_8P2_8P2_8P2_8P1_5P1_5P1_5P1_5 P2 _10P2 _10P2 _10P2 _10

P2_6P2_6P2_6P2_6


VCCVCCVCCVCC

VSSVSSVSSVSS

P2_10P2_10P2_10P2_10

P2_9P2_9P2_9P2_9

P2 _5P2 _5P2 _5P2 _5 P4_1P4_1P4_1P4_1USBUSBUSBUSBUSBUSBUSBUSB

RES#RES#RES#RES#

1

3

2



USBUSBUSBUSB


USBUSBUSBUSB

VCC_USBVCC_USBVCC_USBVCC_USB USBUSBUSBUSB

VSS

36 1 2

20

USBUSBUSBUSB


144 5

4

100 4 5

120 4

P2_1

P2_1

P2_1

P2_1

P5_11

P5_11

P5_11

P5_11

P2_2

P2_2

P2_2

P2_2

VSS

VSS

VSS

VSS

VC

CV

CC

VC

CV

CC

P5_11

P5_11

P5_11

P5_11

P2_1

P2_1

P2_1

P2_1

P2_0

P2_0

P2_0

P2_0

P1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/X

TA

LP1_2/X

TA

LP1_2/X

TA

LP1_2/X

TA

L

P1_3/E

XTA

LP1_3/E

XTA

LP1_3/E

XTA

LP1_3/E

XTA

L

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P2_0

P2_0

P2_0

P2_0

P5_10

P5_10

P5_10

P5_10

P1_1/X

CO

UT

P1_1/X

CO

UT

P1_1/X

CO

UT

P1_1/X

CO

UT

P2_2

P2_2

P2_2

P2_2

P1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/XTA

L

P1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

LP1_3/EXT

AL

P1_3/EXT

AL

P1_3/EXT

AL

P1_3/EXT

AL

VC

CV

CC

VC

CV

CC

VC

CV

CC

VC

CV

CC

VSS

VSS

VSS

VSS

P1_2/XTA

LP

1_2/XTA

LP

1_2/XTA

LP

1_2/XTA

L

P1_3/EXTA

LP

1_3/EXTA

LP

1_3/EXTA

LP

1_3/EXTA

L

VSS

VSS

VSS

VSS

P1_2/XT

AL

P1_2/XT

AL

P1_2/XT

AL

P1_2/XT

AL

P1_3/EX

TA

LP1_3/EX

TA

LP1_3/EX

TA

LP1_3/EX

TA

L

VC

CV

CC

VC

CV

CC

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P2_1

P2_1

P2_1

P2_1

P2_0

P2_0

P2_0

P2_0

P2_3

P2_3

P2_3

P2_3

P2_2

P2_2

P2_2

P2_2

P2_0

P2_0

P2_0

P2_0

P2_1

P2_1

P2_1

P2_1

48

P0_0P0_0P0_0P0_0


P1_11

P1_11

P1_11

P1_11

P5_0

P5_0

P5_0

P5_0

P5_1

P5_1

P5_1

P5_1

P2_4

P2_4

P2_4

P2_4

VB

ATT

VB

ATT

VB

ATT

VB

ATT

P2_11P2_11P2_11P2_11


P0 _2/VREFLP0 _2/VREFLP0 _2/VREFLP0 _2/VREFL P0_2/VREFLP0_2/VREFLP0_2/VREFLP0_2/VREFL

P0 _0P0 _0P0 _0P0 _0P0_0P0_0P0_0P0_0 P0 _0P0 _0P0 _0P0 _0

P0 _5/VREFH0P0 _5/VREFH0P0 _5/VREFH0P0 _5/VREFH0 P0 _14P0 _14P0 _14P0 _14

P0_14P0_14P0_14P0_14

P0 _5/VREFH0P0 _5/VREFH0P0 _5/VREFH0P0 _5/VREFH0

P0 _15P0 _15P0 _15P0 _15

P0_5/VREFH0P0_5/VREFH0P0_5/VREFH0P0_5/VREFH0

AVSS0AVSS0AVSS0AVSS0

P0_5/VREFH0P0_5/VREFH0P0_5/VREFH0P0_5/VREFH0P0_4/VREFL0P0_4/VREFL0P0_4/VREFL0P0_4/VREFL0

80

P5_12P5_12P5_12P5_12

64

P5_14P5_14P5_14P5_14

P5_15P5_15P5_15P5_15

P5_ 15P5_ 15P5_ 15P5_ 15

P2_13

P2_13

P2_13

P2_13

1

1

16 1

24

P3_14

P3_14

P3_14

P3_14

P3_13

P3_13

P3_13

P3_13

P3_10

P3_10

P3_10

P3_10

VSS

VSS

VSS

VSS

VC

CV

CC

VC

CV

CC


P1_6

P1_6

P1_6

P1_6

P1_8

P1_8

P1_8

P1_8

P3_15

P3_15

P3_15

P3_15

P1_6

P1_6

P1_6

P1_6

P1_7

P1_7

P1_7

P1_7

P1_6

P1_6

P1_6

P1_6


USBUSBUSBUSB

VSSVSSVSSVSS

P0_0P0_0P0_0P0_0

P0_1P0_1P0_1P0_1



P4_15P4_15P4_15P4_15

VCCVCCVCCVCC

P5_13P5_13P5_13P5_13

P4_13P4_13P4_13P4_13



AVCC0AVCC0AVCC0AVCC0AVCC0AVCC0AVCC0AVCC0


P0 _1P0 _1P0 _1P0 _1

P0 _0P0 _0P0 _0P0 _0

P0 _4/VREFL0P0 _4/VREFL0P0 _4/VREFL0P0 _4/VREFL0P0_4/VREFL0P0_4/VREFL0P0_4/VREFL0P0_4/VREFL0

P0_ 14P0_ 14P0_ 14P0_ 14

P0_ 15P0_ 15P0_ 15P0_ 15


P0_ 11P0_ 11P0_ 11P0_ 11


P0_9P0_9P0_9P0_9

P0_15P0_15P0_15P0_15

P0_ 12P0_ 12P0_ 12P0_ 12

P0_ 13P0_ 13P0_ 13P0_ 13

P0_13P0_13P0_13P0_13

P0_14P0_14P0_14P0_14

P0 _4/VREFL0P0 _4/VREFL0P0 _4/VREFL0P0 _4/VREFL0


P0_4/VREFL0P0_4/VREFL0P0_4/VREFL0P0_4/VREFL0


AVCC0AVCC0AVCC0AVCC0

P0_0P0_0P0_0P0_0

P0_1P0_1P0_1P0_1












VB

ATT

VB

ATT

VB

ATT

VB

ATT

P0_10P0_10P0_10P0_10

P0_15P0_15P0_15P0_15

P5_3

P5_3

P5_3

P5_3

P5_4

P5_4

P5_4

P5_4

P5_5

P5_5

P5_5

P5_5

P6_0

P6_0

P6_0

P6_0

P6_1

P6_1

P6_1

P6_1

P6_2

P6_2

P6_2

P6_2

VB

ATT

VB

ATT

VB

ATT

VB

ATT

P5_3

P5_3

P5_3

P5_3

P5_1

P5_1

P5_1

P5_1

P5_2

P5_2

P5_2

P5_2

P5_3

P5_3

P5_3

P5_3

VB

ATT

VB

ATT

VB

ATT

VB

ATT

VB

AT

TV

BA

TT

VB

AT

TV

BA

TT

P5_4

P5_4

P5_4

P5_4

P5_5

P5_5

P5_5

P5_5

P0_15P0_15P0_15P0_15

P5_2

P5_2

P5_2

P5_2

P0_11P0_11P0_11P0_11

P5_10

P5_10

P5_10

P5_10

P5_11

P5_11

P5_11

P5_11

P2_3

P2_3

P2_3

P2_3

P2_2

P2_2

P2_2

P2_2

P2_1

P2_1

P2_1

P2_1

P2_0

P2_0

P2_0

P2_0

P1_3/EXT

AL

P1_3/EXT

AL

P1_3/EXT

AL

P1_3/EXT

AL

VC

CV

CC

VC

CV

CC

P6_9

P6_9

P6_9

P6_9

P6_10

P6_10

P6_10

P6_10

P5_8

P5_8

P5_8

P5_8

P5_9

P5_9

P5_9

P5_9

P5_6

P5_6

P5_6

P5_6

P5_7

P5_7

P5_7

P5_7

P5_11

P5_11

P5_11

P5_11

P2_3

P2_3

P2_3

P2_3

P2_2

P2_2

P2_2

P2_2

P5_8

P5_8

P5_8

P5_8

P5_9

P5_9

P5_9

P5_9

P5_10

P5_10

P5_10

P5_10

P1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

LP1_3/EXTA

L

P5_6

P5_6

P5_6

P5_6

P5_7

P5_7

P5_7

P5_7

VC

CV

CC

VC

CV

CC

P4_6P4_6P4_6P4_6

P4_5P4_5P4_5P4_5

P4_4P4_4P4_4P4_4

P4_3P4_3P4_3P4_3

P4_2P4_2P4_2P4_2

VSSVSSVSSVSS

P4 _3P4 _3P4 _3P4 _3

P4 _2P4 _2P4 _2P4 _2

P4 _1P4 _1P4 _1P4 _1

P4 _0P4 _0P4 _0P4 _0

P4 _14P4 _14P4 _14P4 _14

P1_9

P1_9

P1_9

P1_9

P1_11

P1_11

P1_11

P1_11

P1_10

P1_10

P1_10

P1_10

P1_9

P1_9

P1_9

P1_9

P2_15

P2_15

P2_15

P2_15

P2_15

P2_15

P2_15

P2_15

VCCVCCVCCVCC

VSSVSSVSSVSS

P1_11

P1_11

P1_11

P1_11

P2_10P2_10P2_10P2_10

P2_9P2_9P2_9P2_9

P2_8P2_8P2_8P2_8

P2_7P2_7P2_7P2_7

P2_6P2_6P2_6P2_6

P1_5P1_5P1_5P1_5

P2_10P2_10P2_10P2_10

P2_9P2_9P2_9P2_9

P2_15

P2_15

P2_15

P2_15

P3_0

P3_0

P3_0

P3_0

VC

CV

CC

VC

CV

CC

P3_14

P3_14

P3_14

P3_14

P1_8

P1_8

P1_8

P1_8

P1_7

P1_7

P1_7

P1_7

P4_14P4_14P4_14P4_14

P4_13P4_13P4_13P4_13

P4_12P4_12P4_12P4_12

P4_11P4_11P4_11P4_11

P4_10P4_10P4_10P4_10

P4_9P4_9P4_9P4_9

P1_5P1_5P1_5P1_5

P2_10P2_10P2_10P2_10

P2_9P2_9P2_9P2_9

P2_8P2_8P2_8P2_8

P2_7P2_7P2_7P2_7

P2_12

P2_12

P2_12

P2_12

P1_8

P1_8

P1_8

P1_8

P3_10

P3_10

P3_10

P3_10

P3_15

P3_15

P3_15

P3_15

P3_1

P3_1

P3_1

P3_1

P3_0

P3_0

P3_0

P3_0

P2_12

P2_12

P2_12

P2_12

P2_13

P2_13

P2_13

P2_13

P1_7

P1_7

P1_7

P1_7

P3_2

P3_2

P3_2

P3_2

P2_13

P2_13

P2_13

P2_13

P2_12

P2_12

P2_12

P2_12

P1_10

P1_10

P1_10

P1_10

P1_7

P1_7

P1_7

P1_7

P1_6

P1_6

P1_6

P1_6

VC

CV

CC

VC

CV

CC

VS

SV

SS

VS

SV

SS

P7_13P7_13P7_13P7_13

VCCVCCVCCVCC

VSSVSSVSSVSS

P0 _0P0 _0P0 _0P0 _0

P0 _1P0 _1P0 _1P0 _1


P4_ 15P4_ 15P4_ 15P4_ 15

P2_15

P2_15

P2_15

P2_15

P1_9

P1_9

P1_9

P1_9

P1_11

P1_11

P1_11

P1_11

P2_14

P2_14

P2_14

P2_14

P1_10

P1_10

P1_10

P1_10

P0 _0P0 _0P0 _0P0 _0

P0 _1P0 _1P0 _1P0 _1


P7_ 12P7_ 12P7_ 12P7_ 12

VCCVCCVCCVCC

VSSVSSVSSVSS

P2_11P2_11P2_11P2_11

32

P5_12P5_12P5_12P5_12

40

36

P5_13P5_13P5_13P5_13

P5_13P5_13P5_13P5_13

P5_14P5_14P5_14P5_14

P5_15P5_15P5_15P5_15

P4_15P4_15P4_15P4_15

P7_12P7_12P7_12P7_12

120

P7_10P7_10P7_10P7_10

P7_11P7_11P7_11P7_11

P2_11P2_11P2_11P2_11

P7_8P7_8P7_8P7_8

P7_9P7_9P7_9P7_9

P7_8P7_8P7_8P7_8

P7_9P7_9P7_9P7_9

P5_ 12P5_ 12P5_ 12P5_ 12

P5_ 13P5_ 13P5_ 13P5_ 13

P5_ 14P5_ 14P5_ 14P5_ 14

P5_12P5_12P5_12P5_12 P2_ 11

P2_ 11P2_ 11P2_ 11

P0_15P0_15P0_15P0_15

VSSVSSVSSVSS

P0_9P0_9P0_9P0_9

P0_10P0_10P0_10P0_10

P0_11P0_11P0_11P0_11

P0_12P0_12P0_12P0_12

P0_13P0_13P0_13P0_13

P0_14P0_14P0_14P0_14

P0_12P0_12P0_12P0_12

P0_13P0_13P0_13P0_13

P0_14P0_14P0_14P0_14

P0_15P0_15P0_15P0_15

P0_14P0_14P0_14P0_14

P0_15P0_15P0_15P0_15

P0_ 14P0_ 14P0_ 14P0_ 14

P0_ 15P0_ 15P0_ 15P0_ 15

P7_ 14P7_ 14P7_ 14P7_ 14

P7_ 15P7_ 15P7_ 15P7_ 15

P0_ 10P0_ 10P0_ 10P0_ 10

P0_ 11P0_ 11P0_ 11P0_ 11

P0_ 12P0_ 12P0_ 12P0_ 12

P0_10P0_10P0_10P0_10

P0_11P0_11P0_11P0_11

P0_12P0_12P0_12P0_12




P0 _4/VREFL0P0 _4/VREFL0P0 _4/VREFL0P0 _4/VREFL0


P0_8P0_8P0_8P0_8

P0_13P0_13P0_13P0_13




P0_7P0_7P0_7P0_7

P0_ 13P0_ 13P0_ 13P0_ 13

P0_9P0_9P0_9P0_9

P0_6P0_6P0_6P0_6

P0_7P0_7P0_7P0_7



P0_7P0_7P0_7P0_7

P0_8P0_8P0_8P0_8 P0_8P0_8P0_8P0_8

P0_9P0_9P0_9P0_9

P5_5

P5_5

P5_5

P5_5

P6_0

P6_0

P6_0

P6_0

P6_1

P6_1

P6_1

P6_1

P6_2

P6_2

P6_2

P6_2

P6_3

P6_3

P6_3

P6_3

VCCVCCVCCVCC

P5_1

P5_1

P5_1

P5_1

P5_2

P5_2

P5_2

P5_2

P5_3

P5_3

P5_3

P5_3

P5_4

P5_4

P5_4

P5_4

P7_14P7_14P7_14P7_14

P7_15P7_15P7_15P7_15

P2_4

P2_4

P2_4

P2_4

P2_4

P2_4

P2_4

P2_4

P5_0

P5_0

P5_0

P5_0

P5_1

P5_1

P5_1

P5_1

P5_2

P5_2

P5_2

P5_2

P2_4

P2_4

P2_4

P2_4

P5_0

P5_0

P5_0

P5_0

P5_1

P5_1

P5_1

P5_1

P2_4

P2_4

P2_4

P2_4

P5_0

P5_0

P5_0

P5_0

P2_4

P2_4

P2_4

P2_4

P5_0

P5_0

P5_0

P5_0

P5_11

P5_11

P5_11

P5_11

P2_3

P2_3

P2_3

P2_3

P2_2

P2_2

P2_2

P2_2

P6_8

P6_8

P6_8

P6_8

P6_10

P6_10

P6_10

P6_10

P5_6

P5_6

P5_6

P5_6

P5_7

P5_7

P5_7

P5_7

P5_8

P5_8

P5_8

P5_8

P5_9

P5_9

P5_9

P5_9

P5_10

P5_10

P5_10

P5_10

P1_2/X

TA

LP1_2/X

TA

LP1_2/X

TA

LP1_2/X

TA

L

P1_3/E

XTA

LP1_3/E

XTA

LP1_3/E

XTA

LP1_3/E

XTA

L

VC

CV

CC

VC

CV

CC

P6_6

P6_6

P6_6

P6_6

P6_7

P6_7

P6_7

P6_7

P6_9

P6_9

P6_9

P6_9

P6_4

P6_4

P6_4

P6_4

VB

AT

TV

BA

TT

VB

AT

TV

BA

TT

VC

LV

CL

VC

LV

CL

P1_0/X

CIN

P1_0/X

CIN

P1_0/X

CIN

P1_0/X

CIN

P1_1/X

CO

UT

P1_1/X

CO

UT

P1_1/X

CO

UT

P1_1/X

CO

UT

VSS

VSS

VSS

VSS

P6_5

P6_5

P6_5

P6_5

P4_1P4_1P4_1P4_1

P4_0P4_0P4_0P4_0

P2_5P2_5P2_5P2_5

USBUSBUSBUSB


P2_0

P2_0

P2_0

P2_0

VSSVSSVSSVSS

P6_13P6_13P6_13P6_13

P6_12P6_12P6_12P6_12

P6_11P6_11P6_11P6_11

P4_6P4_6P4_6P4_6

P4_5P4_5P4_5P4_5

P4_4P4_4P4_4P4_4

P4_3P4_3P4_3P4_3

P4_2P4_2P4_2P4_2

USBUSBUSBUSB


USBUSBUSBUSB

USBUSBUSBUSB


P2_5P2_5P2_5P2_5

P2 _5P2 _5P2 _5P2 _5

USBUSBUSBUSB


P4_1P4_1P4_1P4_1

P4_0P4_0P4_0P4_0

USBUSBUSBUSB

1

1

P1_13P1_13P1_13P1_13

USBUSBUSBUSB


P2_13

P2_13

P2_13

P2_13

P2_6P2_6P2_6P2_6P1_5P1_5P1_5P1_5

P4_14P4_14P4_14P4_14

P1 _5P1 _5P1 _5P1 _5

P2 _9P2 _9P2 _9P2 _9

P2 _8P2 _8P2 _8P2 _8


P2_10P2_10P2_10P2_10

P4 _13P4 _13P4 _13P4 _13

P4 _12P4 _12P4 _12P4 _12

P4 _11P4 _11P4 _11P4 _11

P2 _7P2 _7P2 _7P2 _7

P2 _6P2 _6P2 _6P2 _6

P4_8P4_8P4_8P4_8


P1 _5P1 _5P1 _5P1 _5

P2 _10P2 _10P2 _10P2 _10

VCCVCCVCCVCC


RES#RES#RES#RES#

P2_10P2_10P2_10P2_10

P2_9P2_9P2_9P2_9

P2_7P2_7P2_7P2_7

P2_6P2_6P2_6P2_6

P4_8P4_8P4_8P4_8

P4_7P4_7P4_7P4_7

P4_13P4_13P4_13P4_13

P4_12P4_12P4_12P4_12

P4_11P4_11P4_11P4_11

P4_10P4_10P4_10P4_10

P4_9P4_9P4_9P4_9

P2_8P2_8P2_8P2_8

P6_15P6_15P6_15P6_15

P6_14P6_14P6_14P6_14

RES#RES#RES#RES#RES#RES#RES#RES#

VCCVCCVCCVCC

P4 _10P4 _10P4 _10P4 _10

P1 _4/MDP1 _4/MDP1 _4/MDP1 _4/MD

P1_8

P1_8

P1_8

P1_8

P1_7

P1_7

P1_7

P1_7

P2_13

P2_13

P2_13

P2_13

P2_12

P2_12

P2_12

P2_12

P3_2

P3_2

P3_2

P3_2

P3_1

P3_1

P3_1

P3_1

P3_0

P3_0

P3_0

P3_0


VS

SV

SS

VS

SV

SS

VC

CV

CC

VC

CV

CC

P7_4

P7_4

P7_4

P7_4

P3_5

P3_5

P3_5

P3_5

VSS

VSS

VSS

VSS

VC

CV

CC

VC

CV

CC

P3_3

P3_3

P3_3

P3_3

P3_3

P3_3

P3_3

P3_3

P2_13

P2_13

P2_13

P2_13

P1_6

P1_6

P1_6

P1_6

P7_5

P7_5

P7_5

P7_5

P7_1

P7_1

P7_1

P7_1

P7_0

P7_0

P7_0

P7_0

P3_1

P3_1

P3_1

P3_1

P3_0

P3_0

P3_0

P3_0

P1_6

P1_6

P1_6

P1_6

P1_5P1_5P1_5P1_5

P7_4

P7_4

P7_4

P7_4

P7_3

P7_3

P7_3

P7_3

P7_2

P7_2

P7_2

P7_2

P3_5

P3_5

P3_5

P3_5

P3_4

P3_4

P3_4

P3_4

P3_3

P3_3

P3_3

P3_3

P3_2

P3_2

P3_2

P3_2

P4_14P4_14P4_14P4_14

P2_12

P2_12

P2_12

P2_12

P2_12

P2_12

P2_12

P2_12

P1_8

P1_8

P1_8

P1_8

P1_7

P1_7

P1_7

P1_7

P1_6

P1_6

P1_6

P1_6

P1_8

P1_8

P1_8

P1_8

P1_7

P1_7

P1_7

P1_7

P7_3

P7_3

P7_3

P7_3

P7_2

P7_2

P7_2

P7_2

P3_4

P3_4

P3_4

P3_4

P3_2

P3_2

P3_2

P3_2

P3_1

P3_1

P3_1

P3_1

P3_0

P3_0

P3_0

P3_0

P3_5

P3_5

P3_5

P3_5

P3_4

P3_4

P3_4

P3_4

P1_9

P1_9

P1_9

P1_9

P2_15

P2_15

P2_15

P2_15

P2_14

P2_14

P2_14

P2_14

P3_15

P3_15

P3_15

P3_15

P3_14

P3_14

P3_14

P3_14

P3_13

P3_13

P3_13

P3_13

P3_9

P3_9

P3_9

P3_9

P3_10

P3_10

P3_10

P3_10

100

P3_15

P3_15

P3_15

P3_15

P3_14

P3_14

P3_14

P3_14

P3_13

P3_13

P3_13

P3_13

P1_10

P1_10

P1_10

P1_10

P1_9

P1_9

P1_9

P1_9

P2_15

P2_15

P2_15

P2_15

P2_14

P2_14

P2_14

P2_14

144

P3_14

P3_14

P3_14

P3_14

P3_13

P3_13

P3_13

P3_13

P3_10

P3_10

P3_10

P3_10

P3_9

P3_9

P3_9

P3_9

P1_9

P1_9

P1_9

P1_9

P2_15

P2_15

P2_15

P2_15

P2_14

P2_14

P2_14

P2_14

P3_15

P3_15

P3_15

P3_15

P1_11

P1_11

P1_11

P1_11

P1_10

P1_10

P1_10

P1_10

P3_12

P3_12

P3_12

P3_12

P3_11

P3_11

P3_11

P3_11

P3_7

P3_7

P3_7

P3_7

P3_6

P3_6

P3_6

P3_6

P7_7

P7_7

P7_7

P7_7

P7_6

P7_6

P7_6

P7_6

P3_3

P3_3

P3_3

P3_3

VB

ATT

VB

ATT

VB

ATT

VB

ATT

VC

LV

CL

VC

LV

CL

P3_8

P3_8

P3_8

P3_8

P3_7

P3_7

P3_7

P3_7

P3_6

P3_6

P3_6

P3_6

P7_7

P7_7

P7_7

P7_7

VSS

VSS

VSS

VSS

VC

CV

CC

VC

CV

CC

P3_7

P3_7

P3_7

P3_7

P3_9

P3_9

P3_9

P3_9

P3_8

P3_8

P3_8

P3_8

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

VB

ATT

VB

ATT

VB

ATT

VB

ATT

VC

CV

CC

VC

CV

CC

P5_9

P5_9

P5_9

P5_9

P2_12

P2_12

P2_12

P2_12

P2_14

P2_14

P2_14

P2_14

P1_10

P1_10

P1_10

P1_10

P1_9

P1_9

P1_9

P1_9

VC

LV

CL

VC

LV

CL

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

T

VSS

VSS

VSS

VSS

P1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/XTA

L

P1_9

P1_9

P1_9

P1_9

P1_8

P1_8

P1_8

P1_8

P1_11

P1_11

P1_11

P1_11

P1_10

P1_10

P1_10

P1_10

P1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

T

VSS

VSS

VSS

VSS

P1_2/XTA

LP1_2/XTA

LP1_2/XTA

LP1_2/XTA

L


P1_11

P1_11

P1_11

P1_11

P1_10

P1_10

P1_10

P1_10

VC

LV

CL

VC

LV

CL

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_0/XC

IN

P1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

T

VC

LV

CL

VC

LV

CL

P1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

TP1_1/XC

OU

T

P1_0/X

CIN

P1_0/X

CIN

P1_0/X

CIN

P1_0/X

CIN

VC

LV

CL

VC

LV

CL

VC

LV

CL

VC

LV

CL

VSS

VSS

VSS

VSS

144

100

121

64

48

36

144 100

Board rework minimized going from 100pin to 144pin package

Pin-outs for several Synergy packages


Synergy Has Scalable Peripherals

R64CNT4004 4000h

RYRCNT4004 400EhRSECAR4004 4010h

RYRAREN4004 401EhRSECAR4004 4010h

RYRAREN4004 401EhRCR14004 4022h

RADJ4004 402EhRCR14004 4022h

RADJ4004 402Eh

...

...

...

...

...

RTCCRy4004 4040h

RMONCPy4004 405Ch...

R64CNT4004 4000h

RYRCNT4004 400EhRSECAR4004 4010h

RYRAREN4004 401EhRSECAR4004 4010h

RYRAREN4004 401EhRCR14004 4022h

RADJ4004 402EhRCR14004 4022h

RADJ4004 402Eh

...

...

...

...

...

RTCCRy4004 4040hRMONCPy4004 405Ch

...

ClockDividerLOCO

Calendar Count

ReducedAlarm

Function

InterruptController

BUS INTERFACE

RTC implementation

Sub-Clock

￭ Physical features of the peripheral in the S1 MCU is a pure orthogonal subset of the features in the S7 MCU

￭ The control registers have no dependencies as they are scaled down to a lower feature set

￭ The control register address offsets are constant even as features are removed

RTC implementation

ClockDividerLOCO

Calendar Count

AlarmFunction

InterruptController

BUS INTERFACESub-Clock

Time Capture

Tamper Detect


Synergy MCU S7 Series

Code Flash (4 MB)Data Flash (64 KB)

SRAM (640 KB)Flash Cache

MPUs

Memory Mirror Function

Memory

12-Bit D/A Converter x2

PGA x6

Temperature Sensor

DMA Controller (8 ch.)


Event Link ControllerLow Power Modes

Switching Regulator

Analog Timing & Control HMI

Connectivity System & PowerManagement Safety Security &

Encryption

WDT

Graphics LCD Controller2D Drawing Engine

JPEG Codec

Parallel Data Capture Unit

Ethernet MAC Controller x2

Ethernet DMA ControllerEthernet PTP Controller

CAN x2 SDHI x2

USBHS USBFS

QSPI SPI x2IIC x3 SSI x2

Sampling Rate ConverterExternal Memory Bus

Multiple ClocksPort Function Select

RTC

SysTick

SRAM Parity Error Check

Flash Area ProtectionADC Diagnostics

CRC Calculator

Data Operation Circuit

Port Output Enable for GPT

IWDT

128-Bit Unique IDTRNG

AES (128/192/256)3DES/ARC4

RSA/DSASHA1/SHA224/SHA256

240-MHz ARM® Cortex®-M4 CPU

IrDA Interface

General PWM Timer 32-Bit x6

FPU | ARM MPU | NVIC | ETM | JTAG | SWD | Boundary Scan

GHASH

12-Bit A/D Converter x2(25 ch.)

High-Speed AnalogComparator x6

Asynchronous General Purpose Timer x2

General PWM Timer 32-Bit Enhanced x4

Capacitive Touch Sensing Unit (18 ch.)

Serial Communications Interface x10

Clock Frequency Accuracy Measurement Circuit

General PWM Timer 32-BitEnhanced High Resolution x4


Memory Analog Timing & Control HMI

Connectivity System & PowerManagement Safety Security&

Encryption

Code Flash (4 MB)

Data Flash (64 KB)

SRAM (640 KB)

Flash Cache

MPUs




PGA x6

Temperature Sensor


Graphics LCD Controller

2D Drawing Engine

JPEG Codec




Event Link Controller

Low Power Modes

128-bit Unique ID

TRNG

AES (128/192/256)

3DES/ARC4

SHA1/SHA224/SHA256Multiple Clocks

Port Function Select

RTC

SysTick


Flash Area Protection

ADC Diagnostics

CRC Calculator



IWDT

Ethernet MAC Controller x2

Ethernet DMA Controller

Ethernet PTP Controller

CAN x2 SDHI x2

USBHS USBFS

QSPI SPI x2

IIC x3 SSI x2

Sampling Rate Converter

External Memory Bus

IrDA Interface



WDT





FPU | ARM MPU | NVIC | ETM JTAG | SWD | Boundary Scan 240 MHz ARM® Cortex®-M4 CPU

High Speed AnalogComparator x6

RSA/DSA

GHASH

Flash Density

Per

form

ance

M4240 MHz

2.7 V-3.6 V

Technology

ARM®

Cortex®

� 40-nm high-performance processes

� Operating temperature range: -40°C to 105°C

� GPIO pins: Up to 172

� Package LQFP: 100, 144, 176

� Package BGA: 176, 224

� Package LGA: 145

ARM®

Cortex®

ARM®

Cortex®

ARM®

Cortex®

Example - Synergy S7 Series MCUS – High End


Flash Density

Per

form

ance

� 40-nm high-performance process

� Operating temperature range:

-40°C up to 105°C

� GPIO pins: up to 110

� Package LQFP: 100, 144


M4120 MHz

2.7 V-3.6 V

Technology

ARM®

Cortex®

ARM®

Cortex®

ARM®

Cortex®

ARM®

Cortex®

1 µA (Battery Backup function)117 µA/MHz(Normal Mode)



Encryption

FPU | ARM MPU | NVIC | ETM JTAG | SWD | Boundary Scan 120 MHz ARM® Cortex®-M4 CPU

Code Flash (512KB or 1 MB)

Data Flash (32 KB)

SRAM (384 KB)

Flash Cache

MPUs




High Speed AnalogComparator x8

Temperature Sensor


WDT






Ethernet MAC Controller

Ethernet DMA Controller

CAN x2 SDHI x2

QSPI SPI x2

IIC x3 SSI x2

Sampling Rate Converter

External Memory Bus

IrDA Interface


USBFS Host/Device




Low Power Modes

Multiple Clocks


RTC

SysTick

ECC in SRAM



ADC Diagnostics

CRC Calculator



IWDT


128-bit Unique ID

TRNG

AES (128/192/256)

3DES/ARC4

RSA/DSASHA1/SHA224/SHA256

GHASH

Example - Synergy S5 Series MCUS – Mid Range


Flash Density

Per

form

ance

M448 MHz

1.6 V-5.5 V

Technology

ARM®

Cortex®

ARM®

Cortex®

ARM®

Cortex®

ARM®

Cortex®



Encryption

FPU | ARM MPU | NVIC | ETB JTAG | SWD | Boundary Scan

� 130-nm processes



� Package LQFP: 48, 64, 100


� Package QFN: 40, 48, 64

48 MHz ARM® Cortex®-M4 CPU

Code Flash ( 256 KB)

Data Flash (8 KB)

SRAM (32 KB)

Flash Cache

Memory Protection Unit

General PWM Timer 32-Bitx2

WDT


14-Bit A/D Converter (28 ch.)

12-Bit D/A Converter

OPAMP x4

Low-Power Analog Comparator x2


Segment LCD Controller

Capacitive TouchSensing Unit (27 ch.)

128-Bit Unique ID

TRNG

AES (128/ 256)

GHASH

ECC in SRAM



ADC Diagnostics

CRC Calculator



IWDT





Low Power Modes

Multiple Clocks


RTC

SysTick

USBFS

QSPI SPI x2

IIC x2 SSI

CAN SDHI/ MMC

Serial Communications Interface

Low Voltage Detection

Temperature Sensor

Example - Synergy S3 Series MCUS – Mid Range



NVIC | SWD | MTB


Encryption

Flash Density

Per

form

ance

M0+32 MHz

1.6 V-5.5 V

Technology

ARM®

Cortex®

� 130-nm processes



� Package QFN: 40,48,64

� Package LQFP: 48, 64

� Package LGA: 36

ARM®

Cortex®

ARM®

Cortex®

ARM®

Cortex®

32 MHz ARM® Cortex®-M0+ CPU

Code Flash (up to 128 KB)

Data Flash (4 KB)

SRAM ( 16 KB) Low-Power Analog Comparator x2

14-Bit A/D Converter (18 ch.)

WDT

General PWM Timer 32-Bit



Capacitive TouchSensing Unit (31 ch.)12-Bit D/A Converter

CAN

USBFS


SPI x2

IIC x2



Low Power Modes

Multiple Clocks


RTC

SysTick

128-Bit Unique ID

TRNG

AES (128/ 256)



ADC Diagnostics

CRC Calculator



IWDT


Temperature Sensor

Example - Synergy S1 Series MCUS – Low End


Synergy Enabling Confidentiality, Integrity & Avail ability

￭ Enabling confidential data and secure authentication● World class cryptography for secure communications● Secure authentication and identification

￭ Delivering platform integrity to enable trusted services● Root of trust to manage keys securely● Isolation of critical code to restrict attacks● Authenticated boot capability● Secure JTAG (Debug) access

￭ Safeguarding critical system availability● Isolation of critical system to help ensure uptime● Management of applications & system behaviour● Lifecycle management & secure updates

AvailabilityIntegrity

Confidentiality


IDE vs. Synergy ISDE – New Age Development Environme nt

Solution -orientedcomponents

+ = ISDE

Integrated Solutions

Development Environment

IDE Integrated

Development Environment


®

Synergy Tools

Renesas Synergy™ Tools

Preparation Phase

Plug-Ins

Plug-Ins

BuildPhase

Plug-Ins

DebugPhase

Plug-Ins

ISDEConfiguration Tools

Within the ISDE there is a Pin Configurator (includes Package View), Clock Configurator, Interrupt Control Unit (ICU) Configurator, and SSP Module Selector/Configurator.

Smart ManualThere are Smart Manuals for the MCUs and SSP. The SSP Secure Source can be viewed.

ThreadX ® DebugBuilt-in ThreadX® RTOS awareness, ThreadX®

Execution Profile Kit (EPK), TraceX® support, and GUIXTM Studio support.

DebugThere is integration for Segger J-Link and a debug viewer for the SSP Secure Source.

CompileBoth the GNU ARM tool chain and the IAR ARM tool chain have been integrated.


Synergy MCU Smart Manual is within the e 2 studio ISDE

…brings up detailed information…

Highlight the MCU register name…


Synergy Software Smart Manual is within the e 2 studio ISDE

Highlight the API name…

…brings up detailed information…


Renesas Synergy™ Kits


Renesas Synergy™ Solutions

Starting points that you can count on

Human Machine Interface(PE-HMI1)

To be planned.Data

Acquisition(PE-DAQ1)

Smart Network Sensor

(PE-SNS1)Pro

duct

E

xam

ples

App

licat

ion

Exa

mpl

es

Cloud Connected

System(AE-IOT)

Capacitive Touch

AE-CAP2

Cloud Connected System(AE-IOT)

Industrial(AE-IND1)

� Custom hardware which is a design instance of an end product

� Contains design journey document describing design considerations

� Includes e2studio project, BOM, schematics, and board layout files

� Example code running on standard Renesas Synergy hardware kit showcasing specific hardware and software components

� Contains Application Note document� Includes e2studio project

Product Examples

Application Examples


HMI Product Example

� Represents one design instance of an HMI product

� PE + design journey documentation = jump start for application

� Reference platform to show graphics performance of S7G2 MCU + SSP

� Software demo thermostat� Extension to include audio

framework for alarm sound� Extension to include a Pmod

peripheral � Extension to control backlight

using the ambient light sensor ALS

PE-HMI1 KitHuman Machine Interface


• Platform -Based Development


Typical Embedded Development Process Today

Development Process

Focused on features, hardware design, software integration

Select processor based on features

Develop application software

Test

Focus is on development process

Product = Thermostat

Example -

Design specific hardware modules around processor

Select, integrate and test various software modules


Synergy Changes the Development Process

Focus shifts to product experience and added value

Development Process

Focus is on customer’s product experience, product innovations

Synergy Product Example

HMI & Connectivity is important for this application!

Software, stacks ready and available!

Develop application softwareHow will my

customer use their thermostat?

Instead -


• Summary


Summary

The only fully qualified Microcontroller platform solution available today

￭ Fully qualified, integrated and professional software platform design to work on synergy microcontrollers

￭ You can download it and use it today, with no upfront or license costs

13.10.2017

Thank you!

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