prototype hft readout system

33
Michal Szelezniak LBL-IPHC meeting 14-18 May 2007 Prototype HFT readout system Telescope prototype based on three Mimostar2 chips

Upload: alan-joseph

Post on 30-Dec-2015

52 views

Category:

Documents


0 download

DESCRIPTION

Prototype HFT readout system. Telescope prototype based on three Mimostar2 chips. Outline. Motivation for the prototype telescope Realization of the telescope System architecture Hardware Firmware Calibration results for MimoStar2 chips Test results with 1.5 GeV electrons - PowerPoint PPT Presentation

TRANSCRIPT

Page 1: Prototype HFT readout system

Michal Szelezniak – LBL-IPHC meeting – 14-18 May 2007

Prototype HFT readout system

Telescope prototype based on three Mimostar2 chips

Page 2: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

22

Outline

Motivation for the prototype telescope Realization of the telescope

– System architecture– Hardware– Firmware

Calibration results for MimoStar2 chips Test results with 1.5 GeV electrons

– Full-frame readout– Normal readout mode (data after cluster-finder)

Page 3: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

33

Motivation for the telescope

The telescope is a small prototype and contains all elements easily scalable to meet the requirements of the HFT

test functionality of a prototype MIMOSTAR2 detector in the environment at STAR 2006-2007:

Charged particle environment near the interaction region in STAR.

The noise environment in the area in which we expect to put the final HFT.

Performance of the MIMOSTAR2 sensors. Performance of our cluster finding algorithm. Performance of our hardware / firmware as a system. Functionality of our tested interfaces to the other STAR

subsystems.

Page 4: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

44

Realization of the telescope

MIMOSTAR

2

MIMOSTAR

2

MIMOSTAR

2

Motherboard

Analog signalsClock & controlJTAGLU prot. Power

Analog signalsClock & controlCluster FIFOHot Pixel MapMemory Access(for full frame)Trigger infoPower

Stratix

Daughtercard

Trigger, Clockfrom MWPC

Powerfrom MWPC

JTAGx3 for MIMOSTARx1 for daughtercard

Latch upmonitor and reset

powerDDL to Linux PC

serial / ip connection

JTAG

Trigger, ClockCluster FIFOBusy to trigger

PC(WIN)

control conectionto PC in DAQ room

STRATIX

DAUGHTER CARD

RORC SIU

MimoStar2 chips on kapton cables

MOTHERBOARD

Acquisition Server (Linux)

Control PC (Win)

Page 5: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

55

Realization of the telescope

STRATIX

DAUGHTER CARD

RORC SIU

MimoStar2 chips on kapton cables

MOTHERBOARD

Acquisition Server (Linux)

Control PC (Win)

(2) TCD trigger

(0) Data acquisition

(1) CDS, sorting, CF

(4) Formatted Event

(3) Building event

(5) Transfer data for this event

complex Hardware

and Firmware

development

Continuous MimoStar2 readout

Page 6: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

66

Hardware – telescope head

TELESCOPE HEAD

Power, clk, sync, jtag

analog

1st pixel marker

3 MimoStar2 chips as TELESCOPE

Kapton cable:•2 Cu layers•Thickness 25μm (kapton only)

DONE & UNDER TEST

Page 7: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

77

Hardware components I

Mother board Trigger interface to TCD Latch up protection on all power

supplies Remote FPGA programming

Daughter Card 50 MHz 12bit ADCs with serial readout SRAM Accept and respond to triggers Data resorter (because sub-arrays of

MimoStar2 are multiplexed) CDS Cluster finder Cluster FIFO Event builder

DONE & WORKING

Daughter card form the previous stage of development – in the future probably integrated into MB

Page 8: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

88

Hardware components II

STRATIX development board DDL control interface JTAG config for MimoStar2

ALICE DDL-RORC system Optic fiber link to the remote DAQ PC Half duplex connection

Part of the DAQ1000 Upgrade

DONE & WORKING

Page 9: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

99

12 bit ADC

MimoStar2

SRAM

ADCcontrol

MimoStarcontrol SRAM

controller

CDS

SORTER

DDL

FIF

O

JTAG

Con

tro

lin

terf

ace

Con

tro

lin

terf

ace

DDLcontrol

ControlSM

Trigger

Con

tro

lin

terf

ace

FIF

O

FIFO

STRATIX BoardDaughter CardSTAR

Hardware

Firmware

Daughter CardDaughter Card

ADCcontrol

9 pixelClusterFinder

Cluster FIFO [5]

smp m,n-1smp m,n

address18 bit

WriteDelegater

ControlStateMachine

Firmware – overview

scalable

DONE & WORKING

Page 10: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1010

8-bit post-CDSdata

pixel address

18204,800counter

Cluster Finding for HFT Saving Address Only

50 MHz datastream.2 streams / detector

Cluster sensor operateson these 9 pixels

Load

ToClusterFIFO

From CDS

Firmware - Cluster Finder

320 pixels deep shift register

Data examined per high threshold crossing

columnn

columnn-1

columnn+1

row nrow n-1 row n+1

highthresh.

DONE & WORKING

on line cluster finding will allow to reduce data flow at HFT by about three orders of magnitude

Page 11: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1111

Firmware – Event builder

Eve

nt F

IFO

Eve

nt F

IFO

Eve

nt F

IFO

Eve

nt F

IFO

Eve

nt F

IFO

Cluster data from Cluster Finder

trigger handler

delay/gate Enable for 1 frame

trigger/DAQ

1 sectordata stream

1 2 3 4 5

SIU

DAQDATA FORMAT header includes:• 4 byte start tag• 12 bit Token (from TCD)• Mimostar position on ladder

Each Trigger enables an empty Event FIFO for 1 frame (204,800 clocks = 4ms) with an offset to the enable that aligns the event start time with the location of the first pixel in the event.

Each event FIFO is a separate trigger event stream and can be enabled independently. This allows events to be triggered at ~1 ms intervals with our 4 ms latency.

Each sector event FIFO is emptied by the SIU at the end of it’s triggered frame.

DONE & WORKING

Page 12: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1212

Test setup @ STAR

Page 13: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1313

East Pole Tip installation

H. Wieman

Page 14: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1414

Current status and future plans

Firmware:Testing interface JTAGFull frame RDO (CDS) DDL – RORCCluster finder, cluster FIFO Full functionality interface

Infrastructure

55Fe calibrations

Analysis and evaluation

Gain adjustment

ALS

(1.2 GeV electrons)

Tests, evaluation, tuning

BNL

Tests outside and inside the magnet

Software: lab tests – 55Fe calibrations Complete system control

Hardware:Mother boardDaughter cardStratix cardDDL3 MimoStar2 telescope

DONE & WORKING DONE & WORKING

Page 15: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1515

Telescope Calibration Results

Fe55 calibrations after assembling the telescope head

setup sub array Peak [ADC] Noise [ADC]

(no markers)

ENC [e-]

Chip 4 Std 353 6.4 29.7

Rad 305 6.4 34.4

Chip 5 Std 349 6.4 30.0

Rad 304 6.5 35.0

Chip 6 Std 360 6.5 29.6

Rad 314 6.6 34.5

Page 16: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1616

Noise @ ALS (no markers)

ENC 33.9 e- ENC 37.5 e-

ENC 34.6 e- ENC 39.1 e-

ENC 33.5 e- ENC 37.9 e-

Page 17: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1717

beam tests @ DESY 2006

Page 18: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1818

Full-frame readout (complete array 12b/pixel)

C1 > 40 ADC

C2 > 14 ADC

C1 > 30 ADC

C2 > 14 ADC

C1 > 25 ADC

C2 > 14 ADC

C1 > 25 ADC

C2 > 0 ADC

C1 > 10 ADC

C2 > 0 ADC

C1 > 20 ADC

C2 > 14 ADC

STD diode expected MPV 46 ADC measured MPV 49 ADC

Page 19: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

1919

Full-frame readout (complete array 12b/pixel)

C1 > 40 ADC

C2 > 14 ADC

C1 > 30 ADC

C2 > 14 ADC

C1 > 25 ADC

C2 > 14 ADC

C1 > 25 ADC

C2 > 0 ADC

C1 > 10 ADC

C2 > 0 ADC

C1 > 20 ADC

C2 > 14 ADC

RADTOL diode expected MPV 40 ADC measured MPV 43 ADC

Page 20: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2020

Hit correlations

Page 21: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2121

Hit correlations

Page 22: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2222

Simple tracking results

Page 23: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2323

Simple tracking results

Page 24: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2424

Simple tracking results

Page 25: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2525

Simple tracking results

Page 26: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2626

Telescope @ BNL

Tests outside of magnet– Noise at the same level as in ALS

Page 27: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2727

Conclusions

Next step: install telescope head in the STAR magnet

We’re all set and waiting for the data taken in the STAR environment

The end

Page 28: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2828

Backup slides

Event data format Data rate reduction in the system

Page 29: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

2929

Firmware – overview

scalable

Another schematic will go here

Page 30: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

3030

Proposed event data format per data stream from MimoStar output

Fixed Length Header (64 bytes)Byte1-4 AAAAAAAA tag for beginning of event5-6 3-bit control shell command, 5 bit argument7-8 Trig command bit0-3, DAQ command bit 0-3 (from TCD)9-10 12 bit Token (from TCD)11-12 snapshot of FE/NIOS commands and status bits.13-14 Mimostar position on ladder, ladder address15-64 reserved (for future use, possible comment space?)

All set to 0 unless specified

The termination word is the one used for the RORC/SIU and consists of EEEEEEEE.

In the data taking in STAR, we will deliver events on a ladder/MB basis where the data has the form (per ladder)

Page 31: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

3131

Data Rates

APSSensors

123 GB/s

ADCsADCs

ADCs

AnalogSignals

CDS

98 GB/s DAQ EVENT

BUILDER

HitFinder

+ address

90 MB/sec

(As in 2006)

100 hits/cm2 Inner Layer, 20 hits/cm2 Outer Layer (L = 1027) Average event size = 90 KB Event size = 90 MB/sec at 1KHz 24 fibers 12 RORC (4 readout PCs)

Page 32: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

3232

SOFTWARE

Lab tests: Readout mode (raw/cds data, event based readout) Raw data analysis (offline noise calculation and cluster

finding for calibrations with Fe55

Full system: Remote control (readout mode, status monitoring)• Noise calculations for finding a hot pixel map• Online monitoring (hits display, simple track association)• Integration with STAR DAQ

DONE & WORKING• Under development

Page 33: Prototype HFT readout system

Michal Szelezniak - LBL-IPHC meeting - 14-18 May 2007

3333

Lab verification

Fe55 calibrations

The noise doesn’t come from the DAQ system (~1 ADC)

setup sub array Peak [ADC] Noise [ADC] ENC [e-]

IPHC

(40°C)

Std - - 17.8

Rad - - 25.3

Mezz. full Std 260 5.2 32.8

Rad 222 5.4 40.0

Mezz. part Std 286 5.1 29.2

Rad 247 5.2 34.8

Flex 1 Std 268 4.2 25.7

Rad 227 4.8 34.7

Flex 2a Std 304 5.6 32.0

Rad 266 5.8 35.7

Flex 2b Std 183 3.9 34.9

Rad 162 4.0 40.5

IPHC – results from Strasbourg

Mezz. Full – chip bonded on a mezzanine card

Mezz. Part – chip bonded on a mezzanine card with part of the bonds (like for a flex cable)

Flex1 – only on flex cable in the hft system

Flex2 – two chips in parallel in the hft system