position sensitive dual-layer silicon diode micro-array detector andrew taylor, yoonseok yang, gwan...

Position Sensitive Dual-Layer Silicon Diode

Micro-Array Detector

Andrew Taylor, Yoonseok Yang, Gwan ChoiDept. of Electrical and Computer Engineering, Texas A&M University

Position Sensitive Dual-Layer Silicon Diode Micro Arrays Detector•Can determine the incident angle at the resolution of 0.006 degrees with dual-layer position sensitive detector arrays

•Detection time resolution can be set to 1nS or faster

•Can estimate the energy level of the particle

•No expensive/special

fabrication processes

(cheapest 2-metal layer

CMOS processing)

•Wireless communication

Using latest

“cooperative modulation”

•Reconfigurable and redundant design to filter manufacturing defects w/o testing

Position Sensitive Dual-Layer Silicon Diode Micro Arrays Detector•Over 91% active area for efficiency

•Novel DSP to handle over 250 quintillion pixels per second (compared to 120+Giga pixels per second for State-of-the-art Canon DIGIC4 CMOS High-Definition Image Sensor)

•Passive sensing for Ultra-Low Power operation

•Signal processing and transmission doesn’t start until detection event

•Diode current leakage is the only dominant source standby power

•Battery life orders of magnitude lower than

that of active sensors

•Array is dense (1M detection elements per 1mm2)

•Reconfigurable NOC will support manufacturing

of wafer-scale detector with high yield

•e.g. ~approximately $20-25(today) for

8 inch wafer detection

•Total cost approximately $110 for mass produced

2 x 124.6billion – element detector Figure 2. Array detector Architecture

Photodiode array designThis array design has similarities to a CMOS image sensor array

The traditional CMOS image sensor precharges a photodiode and reads the output every clock cycle. This requires overhead transistors as seen in the diagram below. Although the CMOS image sensor can be used for the position sensitive detection of nuclear particles, they constantly consume power and are best left to be used in cameras

We expect particles to strike the array at random locations and random times. Rather than read signals synchronously like the CMOS image sensor, an asynchronous passive-mode solution is ideal for this application. A current spike flows through one row and one column of our array design below when a photodiode is stuck by radiation.

1x1 micron element array has over 91% visible active area

Metal layer 2

Metal layer 1

Polysilicon

N-P active area

Layout Illustraion (Not to scale)

Traditional charge-particle model is used to simulate photodiode current caused by a radiation strike. LET (Linear Energy Transfer) values quantify the extent of radiation strike. We studied LET values from 1 to 20, 1 being a weak strike and 20 being a strong strike. The graph below shows that we have a 14X difference between the magnitude of a LET1 and LET20 current. Due to this wide range of current that we want to detect, a novel differential pairs are developed to amplify the signal.

•The amplifiers connected to row and column to amplify voltage across a resistor to a bias sourceThe circuit was simulated with SPICE•Results show that LET1 currents (weakest) are detectable by an output inverter for both the NMOS and PMOS differential pairs•Output inverters were sized to sit at the threshold and trigger with a small voltage as shown in the graphs

Input and Output Voltage Response of NMOS Differential Pair Row Amplifier with Weak Voltage Spike

Input and Output Voltage Response of PMOS Differential Pair Row Amplifier with Weak Voltage Spike

Figure 3. Large-area bidirectional serial link for array-detector architecture

Circuit simulations are conducted to simulate LET1 current spikes with varying photodiode sizes (60nm – 1um width) and varying array sizes. From these batch simulations, we were able to determine design constraints for the array. The graph below shows maximum array size for each photodiode width.

Detection signal processing : Draft 1. Monitor each pixel??

Detection signal processing : Draft 2.

Data compression before sending it to main controller

Run length coding or Huffman coding?Data decompression

Main controller has a few decompression blocks and share them to decompress received data

Pros: HW is simple and robust for detection

Architecture(Block and MB size) is reconfigurable

Compression of data is done on stable condition

Cons: Lossy approach (1 detection on a MB)

It still needs a bunch of signals (Ex.1000 signals)

Initial block logic diagram

Address generation Resolution generation

Detection process

Detection Simulation Result

Design Synthesis Result

****************************************

Report : area

Design : rd_top

Version: C-2009.06-SP2

Date : Mon Nov 23 12:45:59 2009

****************************************

Library(s) Used:

NangateOpenCellLibrary_PDKv1.2_v2008_05 (File: /../../project/LIB/Nangate_typical_ccs.db)

Number of ports: 1041

Number of nets: 34451

Number of cells: 31249

Number of references: 55

Combinational area: 26513.017812

Noncombinational area: 14106.512474

Net Interconnect area: undefined (No wire load specified)

Total cell area: 40619.530286

Total area: undefined

Position Sensitive Dual-Layer Silicon Diode Micro Arrays DetectorS. “Gwan” Choi [email protected], Associate

Professor

Electrical & Computer Engineering Department

Texas A&M University ph)979-820-2553

•B.S., M.S., Ph.D. all in Electrical and Computer Engineering, all from University of Illinois at Urbana

•Radiation susceptibility analysis and design experiences over 20 years

•NSF CAREER award recipient

•Taught and conducted CMOS VLSI research at Texas A&M for the past 15 years

•Patent for a low-power communication architecture

Key Claims of the presented microarray detector

•Can determine the incident angle at the resolution of 0.006 degrees with dual-layer detector arrays

•Can estimate the energy level of the particle

•Detection time resolution can be set to 1nS or faster

•No expensive/special fabrication steps (cheapest 2-metal layer CMOS processing) to manufacture these detectors

•Wireless communication using latest “cooperative modulation” using MIMO technology

•Reconfigurable and redundant design to filter manufacturing defects w/o testing

Attributes of the detector design•Over 91% active area for efficiency•Novel DSP to handle over 250 quintillion pixels per second •Passive sensing for Ultra-Low Power operation•Array is dense (1M detection elements per 1mm2)•Reconfigurable NOC will support manufacturing of wafer-scale detector with high yield

e.g. ~approximately $20-25(today) for 8 inch wafer detection

•Total cost approximately $110 for mass produced 2 x 124.6billion – element detectors

position sensitive dual-layer silicon diode micro-array detector andrew taylor, yoonseok yang, gwan...

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