metryx mass metrology for tsv - sematech mass...mass metrology is an effective technique for...


Using Mass Metrology for Process Monitoring and Control During 3D Stacking of IC’s

SEMATECH 3D Interconnect Workshop

11th July 2012


Mass Metrology

More MassLess Mass

� All process steps create a wafer mass change

� This mass change reflects all aspects of process performance within a wafer

� Metryx Mass Metrology provides passive data collection on product wafers to assess process performance


Mass Metrology

More MassLess Mass




Etch


Mass Metrology

More MassLess Mass




Deposition


Measurement Capability

� 1σ thickness repeatability for blanket films on 200mm & 300mm wafers� Thickness sensitivity improves with patterned wafers and increased surface area� Atomic level accuracy maintained (or improved) with smaller feature sizes and more

complex structures

H He

Li Be B C N O F Ne

Na Mg Al Si P S Cl Ar

K Ca Sc Ti V Cr Mn Fe Co Ni Cu Zn Ga Ge As Se Br Kr

Rb Sr Y Zr Nb Mo Tc Ru Rh Pd Ag Cd In Sn Sb Te I Xe

Cs Ba La Hf Ta W Re Os Ir Pt Au Hg Tl Pb Bi Po At Rn

Ti 2.5ǺTiN 2.5Ǻ

Cr 1.6Ǻ

Co 1.3ǺCoSi 2.6ǺCoWP 1.2Ǻ

Ni 1.3ǺNiSi 5.0Ǻ

Cu 1.3Ǻ

Al 4.2ǺAlCu 3.8ǺAlN 3.5Ǻ

Si 4.9ǺSiO2 4.9ǺSiN 4.5ǺSiON 4.7ǺSiOC 7.5Ǻ

Zr 1.7Ǻ

Hf 0.9ǺHfO2 1.2Ǻ

Ta 0.7ǺTaN 1.3Ǻ

W 0.6Ǻ

Mo 0.6Ǻ

Pt 0.5Ǻ Au 0.6Ǻ

Ag 1.1Ǻ


Mass ≠ Weight

� Weight Measurement

� Unstable, irreproducible, not designed for

semiconductor measurement use

� Mass Measurement� Load-cell utilising complex

force measurement

� Real-time corrections for internal and external forces influencing measurement

� Fully automatic wafer handling and host communication compliant


3D IC Metrology Challenges

TSV Formation M & I Challenges

• Via CD, depth & profile (optical/mass/interferometry/)

• Etch defects/residues (BF- DF pattern inspection)

Via Fill M & I Challenges

• Barrier and Seed continuity (Electrical)

• Void detection in filled TSV’s (Mass/Electrical)

Temporary Carrier Processing M & I Challenges

• Glue layer void/defect & thickness variations (optical (IR/SAM))

Thinning process M & I Challenges

• Wafer thickness and shape (Optical(IR)/capacitance)

• Post thinning/recess etch backside defects ( Optical BF/DF)

• Cu TSV co-planarity (Interferometry/confocal)

• Edge defects (optical )

Debonding I challenges

• Thin wafer inspection on FFC(BF/DF inspection)

• Thin die inspection on FFC (BF/DF inspection)

Dicing and Stacking M& I challenges

• Die alignment (Optical (IR) X-ray )

• Underfill integrity (X-ray)

• Edge boundary violation (BF- pattern recognition software)

TSV module

Wafer thinning module

Debonding and stacking module


3D IC Metrology Challenges

TSV Module

� Via CD, depth & profile

� Etch defects/residues

� Barrier and Seed

� Via filling

� Void detection in filled TSV’s

Wafer Thinning Module

� Glue layer void & thickness

� Wafer thickness & shape

� Post thinning/recess etch

� Cu TSV co-planarity

� Edge defects

Debonding & Stacking Module

� Thin wafer inspection

� Thin die inspection

� Die alignment

� Underfill integrity

� Edge boundary violation


TSV Etch – Mass vs Depth

y = -0.0003x2

+ 0.2343x - 0.1731

R2 = 0.9992

0

5

10

15

20

25

30

0 20 40 60 80 100 120 140 160 180

Mass Loss (mg)

Via

Dep

th (

um

s)

Via Depth

5 um Diameter Vias

PoR 25 µm Depth

y = -0.0003x2

+ 0.2343x - 0.1731

R2 = 0.9992

0

5

10

15

20

25

30

0 20 40 60 80 100 120 140 160 180

Mass Loss (mg)

Via

Dep

th (

um

s)

Via Depth

5 um Diameter Vias

PoR 25 µm Depth


TSV Etch

� Mass is used as a monitor of etch process stability

� Out of spec lots usually have deeper TSV’s etch

� Depth variations in TSV has implications in the TSV grinding and reveal process


Liner/Barrier/Seed

� Highly topographical layer

� Difficult to measure optically as most of film is on sidewalls, or bottom of features

� Surface area increase improves sensitivity of mass change.

� Etch variations produce surface area variations so mass after TSV etch and mass of L/B/S are related.

0

100

200

300

400

500

600

700

800

1 2 3 4 5

Aspect Ratio (AR)

Ma

ss

(u

g)

Sidewall

Top Surface

1:1 5:1 10:1 20:1 50:10

100

200

300

400

500

600

700

800

1 2 3 4 5

Aspect Ratio (AR)

Ma

ss

(u

g)

Sidewall

Top Surface

1:1 5:1 10:1 20:1 50:1


Via Filling and Voids

� Theoretical calculations reveal possibility to detect voids in Cu vias

� Assuming void width = via diameter

� More than 6600 TSVs with 100nm height voids need to be present to be detected (50µ x 5µ TSV)



Wafer TSV etch Liner B/S Cu fill Anneal

MetryxMetryx Metryx MetryxMetryx Metryx

CMP

Metryx

� Mass of wafers with voids is

less than mass of wafers without voids

� Difficult to separate “mass”of voids from mass of over etch, or over burden


y = 0.9882x + 0.0141

R2 = 0.9994

-18

-15

-12

-9

-6

-3

0

3

6

9

12

15

18

-18 -16 -14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 16 18

Mass Deposited Deviation (mg)

Mass R

em

oved

Devia

tio

n (

mg

)

CMP (PoR)

Outliers

Linear (CMP (PoR))

CMP Stability

�The correlation between the mass added (Barrier + Fill) is very well correlated to the mass removed during CMP.

�Therefore the CMP is well controlled. Over or under-polish in the CMP results in data scatter.

�The over and under polish splits are clearly distinguished.

Under Polish

Over Polish

(M n+4 - M n+3)

(M n+3 - M n+1)



Wafer TSV etch Liner B/S Cu fill Anneal

MetryxMetryx Metryx MetryxMetryx Metryx

CMP

Metryx

� Mass change of wafers with voids is less than mass change of wafers without voids

� The difference is related to the loss of plating liquid from the void during the anneal process

� Mass can therefore indicate the presence of voids in the TSV


Wafer Thickness Measurement

� Wafer thickness by micrometer

� Correlates well with mass data

� Mass metrology provides average wafer thickness quickly (<60s/wafer) compared to micrometer (manual) and acoustic reflection probing (time consuming) methods

Carrier Mass vs Thickness

y = 0.0414x + 0.6173

R2 = 0.9764

28.3

28.4

28.5

28.6

28.7

28.8

28.9

29.0

670 672 674 676 678 680 682 684

Thickness (um)

Mas

s (

g)

� Wafer thickness by acoustic reflection data

� Correlates well with mass calculated thickness


Summary

� Mass Metrology is an effective technique for monitoring process excursions during

� TSV etch

� Barrier/Seed Deposition

� Cu plating

� Wafer grinding

� Acknowledgements

� Co Authors

� Sandip Halder, Peter leunissen, Andy Miller, Mirielle Maenhoudt, Eric BeyneIMEC, Kapeldreef 75, B-3001 Leuven, Belgium

� Adrian Kiermasz, Gary DitmerMetryx, 1240 Park Avenue, Aztec West, Bristol, UK

� Additional thanks to

� Augusto Redolfi, Eddy Kunnen, Sarasvathi Thangaraju, Harold Philipson


Metryx

metryx mass metrology for tsv - sematech mass...mass metrology is an effective technique for...

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