pcb design & process challenges...pcb design trends • topography: – overall miniaturization,...

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PCB Design & Process Challenges

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Page 1: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

PCB Design & Process Challenges

Page 2: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

PCB Design Trends

• Topography: – Overall miniaturization, smaller components placed closer together.

– Overall PCB footprint reduction.

– Reduced PCB footprints, drive test-pad size and spacing reductions.

– 39m and 50m center-line test-points are common.

– Test-pad diameters: .020 and below.

– Dual sided test is common place.

– Thinner PCB’s.

• Manufacturing Process:– Lead Free Solder

– No Clean

– 0SP

Page 3: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

Challenges:Today’s PCB trends:

• Topography:– Overall miniaturization,

smaller components placed closer together.

– Overall PCB footprint reduction.

– Reduced PCB footprints, drive test-pad size and spacing reductions.

– 39m and 50m center-line test-points are common.

– Test-pad diameters: .020 and below.

– Dual sided test is common place.

– Thinner PCB’s.

• Less area for UUT constraints. Damage due to placement errors is high.

• Fixture milling requires more precession.

• Technology to test small tightly spaced test-pads is required.

• Need to test thinner boards without inducing damage.

• Fixture design needs to be quantified before fabrication.

• DFT tools required early in process.

Page 4: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

Challenges: Today’s PCB Process Trends:

• Manufacturing Process:– Lead Free Solder

– No Clean

– 0SP

• Brittle solder, UUT flex could fracture solder joints.

• Lead free solder is harder than its lead counterpart. Higher probe forces are required. Higher initial pre-loads required.

• Lead Free solder flux leaves behind hard sticky resins.

• Residue from no-clean difficult to penetrate.

• OSP, contamination and penetration issues.

Page 5: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

Statistical Models

Figure (1)

False Failure Rate vs. Target Size

0

25

50

75

100

125

0.017 0.018 0.019 0.020 0.021 0.022 0.023 0.024 0.025 0.026 0.027 0.028 0.029 0.030 0.031 0.032 0.033 0.034 0.035

Pad Diameter (in)

Fals

e F

ailu

re R

ate

(P

PM

)

Conventional Recept Align Plate Guided Probe - Sm Guided Probe - Diamond TP EC-1

Page 6: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

Guided Probe & Zeroflex.

Page 7: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

Automated Board Processing Automated Stop Finger Placement

User will specify

clearance values.

Accommodates

the arcing motion

of the gate.

Sometimes the entire UUT will

be contained in a relief mill.

This information defaults to information provided by SMARTCAP

Page 8: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

Automated Board Processing Real time DRC for fixture

Red hatched squares indicate

the probability of unacceptable

board stress levels.

Try lowering the spring force

of the probes in these regions.

Push Finger UUT Hard Stop

Page 9: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

Board Stress AnalysisStrain Gauge Analysis.

Page 10: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

CAD & BOM Merged

Page 11: PCB Design & Process Challenges...PCB Design Trends • Topography: – Overall miniaturization, smaller components placed closer together. – Overall PCB footprint reduction. –

ECT’s “Quick Six” Bullets for Attacking PBFree in Test:

1. New Proprietary Plating: 550-650 Knoop vs. 130-200 Knoop hardness to resist abrasion, and less porous to resist solder (contamination) transfer.

2. Improved Spring Rate: Higher pre-load with the same force at test height results in improved initial penetration upon fixture actuation.

3. Spring Force Selection: 6oz – 12oz for effective penetration.

4. Bias Ball Design: Lower average resistance, lower standard CRES deviations, and higher current carrying capacity.

5. Double Roll Close: Optimal pointing accuracy.

6. Wide Selection Tips: 6- .050” tips, 6- .075” tips, and 10- .100” tips

(widest selection of lead-free, no-clean, or OSP products on the market!!!)