parallel portability and heterogeneous programming stefan möhl, co-founder, cso, mitrionics

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Parallel Portability and Heterogeneous Parallel Portability and Heterogeneous programming programming Stefan Möhl, Co-founder, CSO, Stefan Möhl, Co-founder, CSO, Mitrionics Mitrionics

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Page 1: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

Parallel Portability and Heterogeneous Parallel Portability and Heterogeneous programmingprogramming

Stefan Möhl, Co-founder, CSO,Stefan Möhl, Co-founder, CSO,MitrionicsMitrionics

Page 2: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 2

The Mitrion Virtual Processor

• Massively fine-grain MIMD parallel– Instruction level parallel– 10’s of thousands of PEs

• A configurable processor design– The processing elements suitable

for the application– Processing elements adapted to

bit-width– Ad-hoc fused instructions

• Allows software programming for FPGAs– You program the MVP rather than

design HW– Programmed in inherently parallel

programming language Mitrion-C

int:48<30> main(){ int:48 prev = 1; int:48 fib = 1;

int:48<30> fibonnacci = for(i in <1..30>) { fib = fib+prev; prev = fib; } ><fib;

} fibonnacci;

Page 3: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 3

The Mitrion Platform

Page 4: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 4

An experiment at Mitrionics

• Allow Mitrion-C code to run efficiently across a Hybrid machine– FPGA– Multi-Core/Many-Core– Clusters– And more to follow (GPU, vector and others)

• Letting FPGA code out of the FPGA box– The FPGA acceleration market suffers from users afraid

of locking their code into FPGA acceleration technology

Page 5: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

Many core will require code re-writesMany core will require code re-writes

Page 6: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 6

Code Re-Writes have happened many times…

• Scalar processors• Vector processors• Thinking Machines and MasPar• SMPs/ccNUMA• MPPs• Clusters• Grids• FPGAs and GPGPUs• Many-core processors

Page 7: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 7

A new take on the problem

• Running sequential code in parallel is hard• Running parallel code sequentially is easy• Automatically parallelizing for the different

paradigms was not possible– Code re-writes

• Automatically sequentializing for different parallel paradigms is comparatively easy– Less, or maybe even No Code Re-Writes

Page 8: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 8

Some properties of Mitrion-C

• Fine-grain (instruction-level) MIMD parallel– The MVP requires fine-grain MIMD for performance– A limit-case of parallelism– Currently scales to 10’s of thousands of PEs in the MVP,

no scalability limit yet visible.

• Memory and bandwidth are taken seriously– FPGAs typically sit on data buses made for 1/10 the

performance

• Though Imperative style syntax, semantics are purely Functional– Very amenable to compiler optimizations and theoretical

treatment

Page 9: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 9

Mitrion-C takes Memory, Locality and Bandwidth seriously

• Memory– No illusion of single address space (we haven’t had that since

the introduction of caches 20 years ago)

– Different memory spaces for different bandwidth and latency requirements

– Careful control of memory usage (the MVP has limited access to fast memory)

• Bandwidth– Separate memory spaces implies separate data buses. This

allows programming for bandwidth

– Streaming data types that help conserve bandwidth

– Highlighting of bandwidth consumption in debugger

• Parallelism allows latency to be hidden

Page 10: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

2009-09-08, by Stefan Möhl 10

Does it have to be a new language?

• Not completely, Mitrion-C is a C-family language– Syntax is as similar to C as Java is similar to C

» But with inherently parallel language semantics

– A pragmatic language with five years field-experience

• Learning a new language isn’t hard– Most programmers know 10+ different languages

• Designing parallel algorithms is hard– Figuring out how to make a sequential algorithm parallel

• A language should support the hard task– Do for Parallelism what Object-Oriented languages did

for state

Page 11: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

Multi-Core, Clusters and others aren’t the Multi-Core, Clusters and others aren’t the primary focus for Mitrionics (yet)primary focus for Mitrionics (yet)

• But this approach for a portable parallel heterogeneous But this approach for a portable parallel heterogeneous language shows promiselanguage shows promise

–It has at least not yet proven hopeless

• If anyone is interested in supporting us, please contact If anyone is interested in supporting us, please contact me!me!

Page 12: Parallel Portability and Heterogeneous programming Stefan Möhl, Co-founder, CSO, Mitrionics

Questions? Offers of Questions? Offers of Support?Support?

[email protected]@mitrionics.com

Mobile: +46 703-00 66 08Mobile: +46 703-00 66 08