Optimization of a RF CMOS technology for High-Q-InductorsGerhard Metzger-Brückl1, Dr. Volker Mühlhaus2, Christophe Holuigue3

1. Landshut Silicon Foundry GmbH, Jenaer Str. 1, 84034 Landshut, Germany

2. Dr. Mühlhaus Consulting and Software GmbH, Drosselweg 11, 58455 Witten, Germany3. Analog Alchemy GmbH, Agnes-Pockels-Bogen 1, 80992 München, Germany

1. IntroductionLFoundry is developing an on-chip spiral inductor technology based on their advanced

150nm RF CMOS process. An electromagnetic (EM) analysis based inductor design flow

is applied to optimize the performance of the inductors towards high quality factor at radio

frequencies, by providing a large conductor cross section while at the same time minimizing

the substrate induced losses. The effect of these technology parameters on the inductor Q

factor in the frequency range 2.4 and 5.8GHz is discussed in detail and compared to results

obtained with standard technologies. To verify the analysis, simulation results are compared

to measurements.

2. LFoundry LF150 CMOS process as basis for High-Q-InductorsThe user-friendly process design kit PDK has as base technology a 19 mask standard

CMOS process with 150nm physical gate length and the shallow trench isolation concept.

The transistor variety is set for three I/O voltages (1.8/3.3/5V) and for a low leakage and also

a high speed option.

The High-Q-Inductors are a further step in broadening the PDK options fitting well to the

already available extra thick top metal (up to 6µm thickness) and the poly- metal- and

diffusion resistors, MIM and MOS-Cap capacitors, special RF performance devices, etc.

Cadence Database IC 5.141 or IC 6.1

matl technology fileSonnet EM View

Sonnet model file

Sonnet model editor

Sonnet EM solver

Result as S/Y/Z param, SPICE model, RLCG model,

lumped element extraction

Cadence Schematic, Spectre, SPICE Sonnet Data Display

Symbol utility

Sonnet Interface for Cadence Virtuoso

* Pre-configured by

LFoundry

*

Sonnet *.son model file

Sonnet model editor

Sonnet EM solver

Result as S/Y/Z param, SPICE model, RLCG model,

lumped element extraction

Material template file

Cadence Schematic, Spectre

Symbol utility

Sonnet Data Display

Spiral Inductor Assistant

Virtuoso

GDSII

layoutOptimization

* pre-defined by

LFoundry*

2.5 GHz 5.8 GHz

1.7µm2.5GHz

0.9µm10GHz

1.2µm5 GHz

2.8µm1GHz

Skin depth /µm for AlFrequency

Sonnet is a high precision full wave EM simulator for planar structures, which can capture all

physical effects in our simulation models. Sonnet can be used stand-alone or integrated into

major EDA frameworks.

Sonnet Cadence Integration

When an inductor layout does not yet exist, the Spiral Inductor Assistant tool can be used to

estimate the required inductor shape, and create a Sonnet simulation model for accurate

analysis.

Inductor on demand workflow with Sonnet

5. Improving the inductor Q-factor

• At low frequency, the Q factor is limited by the conductor loss.

• The 6µm Al thick metal option for conductor improves the Q factor in the low GHz

frequency range, where the skin depth is large and current is taking advantage of

the additional metal cross section.

• Due to skin effect and current crowding, there is a limit where increasing the

conductor cross section further gives no improvement in Q factor.

6. Substrate Back Etching

• With the standard technology, increasing the metal cross section by wider lines

or by adding lower metal layers in parallel means increased capacitance to

the substrate, so that the frequency of maximum Q decreases.

• With the substrate back etch option, the substrate is removed below the

inductor and replaced by PIQ dielectric. This reduces the substrate induced losses.

• Now, we can make the lines wider or add lower metal levels in parallel.

This is only limited by the skin effect and proximity effect, where bigger metal

cross sections give no further improvement.

• The influence of the back etch area is plotted below. Etching the substrate below

the inductor gives a strong effect in Q factor. Some improvement at very high

frequency is possible by a larger back etch area.

10S/m metal to represent the

substrate around the back etching region

1.0 nH

2.0 nH

3. Simulation flow for inductor EM analysis

Results are for inductor with pads, not de-embedded

4. Simulation and measured comparison

Current distribution plot for 2.5GHz and 5.8GHz

450µm

750µm

Inductor diameter 390µm

Substrate back etching size 450µm … 750µm

• At high frequency, the Q factor is limited by coupling to the substrate.

• If we increase the metal cross section, by wider lines or multiple metal layers

in parallel, we increase the capacitance to the substrate and thus the

substrate losses -> frequency of maximum Q decreases

• The LF150 technology with the 6 layer option offers a large distance from

the thick metal to the substrate, reducing the substrate induced loss.

Copyright 2009 - Landshut Silicon Foundry GmbH

LFoundry’s analog / mixed signal technology based on a 0,15µm CMOS process ‘LF150’

LFoundry

0,15µm

Analog / MS

Technology

Leading analogdevice performance

•low leakage transistor• high speed transistor

• high current resistors

• low power applications

Variety of device options

• high voltage (LDMOS)•MIM, MOS Cap

• extra thick top metal

Constantly increasing IP

Portfolio• NVM

• µControler

•ADC, LDO, ...

User-friendly PDK•GPIO library

• 370 digital std. cells

LFoundry

0,15µm

Analog / MS

Technology

Leading analogdevice performance

•low leakage transistor• high speed transistor

• high current resistors

• low power applications

Variety of device options

• high voltage (LDMOS)•MIM, MOS Cap

• extra thick top metal

Constantly increasing IP

Portfolio• NVM

• µControler

•ADC, LDO, ...

User-friendly PDK•GPIO library

• 370 digital std. cells