novel packaging concepts for power electronic solutions€¦ · inverter trends & technology...

www.ats.net

Novel Packaging Concepts for Power Electronic Solutions

2nd Wangener Automotive Symposium: Inverter Trends & Technology

Rainer Frauwallner, Teamleader Application Analysis

07.11.2019

Novel Packaging Concepts Power Electronics / R. Frauwallner / Wangen, Germany / 07.11.2019 1

Agenda

▪ AT&S at a Glance

▪ State of the Art Power Packaging

▪ ECP® - The Embedding Technology

▪ Use Case: GaN-based Half-Bridge Module


AT&S – A World Leading High-tech PCB & IC Substrates Company

* For CY 2018 Source: Prismark

** For AT&S FY 2018/19


Market Segments & Product Applications served by AT&S

Computer, Communication,

Consumer

Smartphones, Tablets, Wearables, Ultrabooks,

Solid State Drives, Microserver

Industrial

Machine-2-Machine Communication,

Robots, Industrial Computer,

X2X Communication

Automotive

Advanced Driver Assistance Systems,

Emergency-Call, X2X Communication,

Powertrain Electrification

Medical

Patient Monitoring, Hearing Aids,

Pacemaker, Neurostimulation, Drug

Delivery, Prosthesis

IC substrates

High Performance Computer, Microserver

Segment Mobile Devices & Substrates Segment Automotive, Industrial, Medical


Global Footprint Ensures Proximity to Supply Chain & CostEfficiency

974* 404* 1,241* 2,369* 4,461* 289*

Shanghai China

AnsanKorea

ChongqingChina

Leoben, HeadquartersAustria

FehringAustria

NanjangudIndia

AT&S plant & sales office

AT&S sales office

AT&S Headquarters

*Staff, Average, FTE, FY 2018/19; 73 employees in other locations


Agenda






Discrete vs. Module?… a technology tradeoff for power applications

Inverter

Power

Frequency

Cost

▪ Electrical isolation▪ Different configurations

▪ Design flexibility▪ Reduced stray inductance▪ Standardization

*Source: Infineon


Discrete vs. Module?… a technology tradeoff for power applications

Inverter

Power

Frequency

Cost

*Source: Infineon, YOLE Développement

▪ Electrical isolation▪ Different configurations

▪ Design flexibility▪ Reduced stray inductance▪ Standardization


Discrete + Module = Small-size ModulesMerging advantages of technologies

Infineon HybridPACK™ DSC S2 Danfoss Half-bridge IGBT Module

▪ High design flexibility▪ Low thermal resistance▪ Low inductance▪ Increased reliability

… what‘s next?*Source: Infineon, Danfoss


Agenda






What is ECP®?AT&S ECP®: Embedded Component Packaging

ECP® uses the free space in an organic, laminate substrate (Printed Circuit Board) for active and/or passive component integration

Components are embedded in the core of the PCB and connected by copper plated micro

vias to the surrounding metal layers


From Concept to Mass-productionEmbedding technology development and industrialization

1970First concepts for passive

component embedding introduced.

2000First step of AT&S into embedded

components. Research and

development on printed resistors and

capacitors inside the PCB.

2006First silicon bare die

followed by an IC

integrated. 2004Embedding of discrete

capacitors and

resistors in an organic

laminate substrate.

AT&S is part of various

development projects.

2012AT&S starts serial production of

ECP® products at the plant in

Leoben.

2010Industrialization of the AT&S

embedding technology ECP®

within the project “HERMES”.

Several product demonstrators

manufactured.

2018Second generation embedding

technology „Center Core ECP®“

qualified for mass production.

2016Project “empower” successfully

finished with prototypes for

electromobility.

2020New power concepts in

development:

▪ Lower Rth

▪ High current

▪ High voltages


CCE: Center Core EmbeddingManufacturing process flow

Core manufacturing Lamination Structuring

• Core preparation• Cavity cutting• Carrier lamination• Component assembly

• Soft lamination• Carrier removal• Final lamination

• Laser drilling • Mechanical drilling • Plating and structuring• Testing


Key Requirements ComponentsLine-up for production facilities in Hinterberg (AT) and Shanghai (CN)

Feature Passive components Active components

AT&S location Hinterberg1 Shanghai Hinterberg1 Shanghai

Type Resistor, Capacitor Resistor, Capacitor Bare DIE Bare silicon DIE with

RDL layer

Size 0201,0402 01005,0201,0402 max 8x8mm max 8x8mm

Thickness 60-300µm 100-330µm 60-300µm 100-330µm

Pad surface only Copper only Copper only Copper only Copper

Copper thickness min. 6µm min. 6µm min. 6µm min. 6µm

Pad diameter min. 200um min. 130um min. 200um min. 110µm

Thickness tolerance ±10µm ±15µm ±10µm ±15µm

Packing method T&R T&R T&R,Wafer T&R

1) The location Hinterberg, Austria, is dedicated to embedding of power components due to capabilities for via filling and thick copper.


ELECTRICALPERFORMANCE

EMI SHIELDING

SYSTEM COSTREDUCTION

THERMAL PERFORMANCE

MECHANICALPERFORMANCE

MINIATURIZATIONMODULARIZATION

Advantages of CCE in a NutshellEnabling technology for next gen applications


Advantages of CCE in a NutshellEnabling technology for next gen applications

Electrical Thermal Mechanical

Stan

dar

dEm

bed

din

g

Performance

Tech

no

logy


Agenda






Use Case: 650V GaN-based Half-Bridge ModuleCombining GaN and Embedding in one package

Yoda is half bridge module including 650VGaN-HEMT power transistors, bootstrapcircuit, driver for high- and low side as wellas a thermal measurement device packed inone laminate based device. Switchingfrequencies of up to 1 MHz.


Use Case: 650V GaN-based Half-Bridge Module

Comparison between AT&S ECP® SMT package and embedded bare die transistor power modules show outstanding performance differences.

Combining GaN and Embedding in one package

VS.

Standard Embedding


Use Case: 650V GaN-based Half-Bridge ModuleCombining GaN and Embedding in one package

AT&S paper available on request

Stan

dar

d S

MT

Loop area: 12,4 mm²Loop resistance: 2,2 mΩ

Loop area: 7,74 mm²Loop resistance: 1,3 m Ω

Emb

edd

ed

Module thickness: 0,75 mm

Module thickness: 1,3 mm Ringing voltage: 17,5V

Ringing voltage: < 1V

Module losses

Temperature

Output power

Thermal conductivity @ 4 W losses

1385 W

47,5 °C

8,8 W

16,6 W/K

Module losses

Temperature

Output power 1385 W

42 °C

5,4 W

13,6 W/K

Build up Commutation loop Double pulse test Performance

Thermal conductivity @ 4 W losses


Challenges & OutlookProviding sophisticated technologies for future inverter solutions

▪ Reduction of loop & gate inductance

▪ Decrease of Rth,j-a

▪ Electric isolation die to heatsink

▪ Reliability (JESD22 → AEC-Q101 → AQG 324)

▪ Material development FR4

▪ Enhanced embedding of WBG devices

▪ Integration of thick copper

▪ Alternative heat sink attachment

▪ Improved double sided cooling

▪ Heterogenous integration of driver + transistor + passives

▪ System solutions: control + power

… quote of YOLE Développement in their latest „Status of the Power Module Packaging Industry 2019“ report

„The only thing we know for sure is that ED (embedded die) technology has a bright future.“


Contact

Rainer Frauwallner

Contact details

Teamleader Application Analysis / Team Leader Test Development

AT&S Austria Technologie und Systemtechnik Aktiengesellschaft

Fabriksgasse 13, 8700 Leoben

Austria

Tel.: +43 3842 200 5412

Mob.: +43 676 8955 5412

Email: [email protected]


www.ats.net

AT & S Austria Technologie &Systemtechnik Aktiengesellschaft

(Headquarters)Fabriksgasse 13,

8700 Leoben, AustriaTel.: + 43 3842 200-0

AT&S – First choice for advanced applications


This presentation is provided by AT & S Austria Technologie & Systemtechnik Aktiengesellschaft, having its headquarter at Fabriksgasse 13, 8700 Leoben, Austria, or one of its affiliatedcompanies (“AT&S”), and the contents are proprietary to AT&S and for information only.

AT&S does not provide any representations or warranties with regard to this presentation or for the correctness and completeness of the statements contained therein, and no reliancemay be placed for any purpose whatsoever on the information contained in this presentation, which has not been independently verified. You are expressly cautioned not to place unduereliance on this information.

This presentation may contain forward-looking statements which were made on the basis of the information available at the time of preparation and on management‘s expectations andassumptions. However, such statements are by their very nature subject to known and unknown risks and uncertainties. As a result, actual developments, results, performance or eventsmay vary significantly from the statements contained explicitly or implicitly herein.

Neither AT&S, nor any affiliated company, or any of their directors, officers, employees, advisors or agents accept any responsibility or liability (for negligence or otherwise) for any losswhatsoever out of the use of or otherwise in connection with this presentation. AT&S undertakes no obligation to update or revise any forward-looking statements, whether as a resultof changed assumptions or expectations, new information or future events.

This presentation does not constitute a recommendation, an offer or invitation, or solicitation of an offer, to subscribe for or purchase any securities, and neither this presentation noranything contained herein shall form the basis of any contract or commitment whatsoever. This presentation does not constitute any financial analysis or financial research and may notbe construed to be or form part of a prospectus. This presentation is not directed at, or intended for distribution to or use by, any person or entity that is a citizen or resident or locatedin any locality, state, country or other jurisdiction where such distribution, publication, availability or use would be contrary to law or regulation or which would require any registrationor licensing within such jurisdiction.

Disclaimer

novel packaging concepts for power electronic solutions€¦ · inverter trends & technology...

Documents