multiphase buck converter 7

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SRR ENGINEERING COLLEGE Design And Implementation Of Current Self- Balance Mechanism in Multiphase Buck Converter Internal guide: Miss.Ramaporselvi M.E Batch members Roll no P.Rajasekar 32007105044 P.Sudakar 32007105054 S.Venkateasan 32007105056 Department of Electrical and Electronics Engineering

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Page 1: multiphase buck converter 7

SRR ENGINEERING COLLEGE

Design And Implementation Of Current Self- Balance Mechanism in Multiphase

Buck Converter

Internal guide: Miss.Ramaporselvi M.E

Batch members Roll no

P.Rajasekar 32007105044P.Sudakar 32007105054S.Venkateasan 32007105056

Department of Electrical and Electronics Engineering

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LITERATURE SURVEY X. Zhou, X. Zhang, J. Liu, P. L. Wong, J. Chen, H. P. Wu, L. Amoroso, F. C. Lee,

and D. Y. Chen, “Investigation of candidate VRM topologies for future microprocessors,” in Proc. IEEE Appl. Power Electron. Conf. (APEC), 1998, pp. 145–150.

From these paper we know about the Dynamic response of voltage regulator modules.

A. Consoli, G. Scarcella, G. Giannetto, and A. Testa, “A multiphase DC/DC converter for automotive dual voltage power systems,” presented at the Power Convers. Intell. Motion (PCIM), Nuremberg, Germany, 2001.

Dynamic response of voltage regulator modules (VRMs) is improved with it

also, automotive 42/14 V systems use it to reduce the size of input and output capacitors .

J. Li, C. R. Sullivan, and A. Schultz, “Coupled inductors design optimization for fast response low voltage DC/DC converters,” in Proc. IEEE Appl. Power Electron. Conf. (APEC), 2002, pp. 817–823.

From these paper we taken the points as how the inductors are used to balance the flowing current.

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Abstract Some of the recent applications in the field of the power supplies use multiphase converters to achieve fast

dynamic response, smaller input/output filters

current imbalance among phases is solved by buck converter using MOSFET switch .

The purpose of this paper is to demonstrate that, in CCM, with a proper design, there is an intrinsic mechanism of self-balance that reduces the current imbalance.

Thus, in the buck converter, if natural zero-voltage switching (ZVS) is achieved in both transitions, the instantaneous inductor current compensates partially the different dc currents through the phases.

The need for using n current loops will be finally determined by the application but not by the converter itself.

Using the buck converter as a base, a multiphase converter has been developed.

Several tests have been carried out in the laboratory and the results show clearly that, when the conditions are met, the phase currents are very well balanced even during transient conditions.

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INTRODUCTION Objective: Achieve the current balance mechanism with low ripple content and less

no of filters.

INTERLEAVING technique was proposed a long time ago. In the past years, some applications make use of this technique to improve the performance of the dc–dc conversion.

Dynamic response of voltage regulator modules (VRMs) is improved with it also, automotive 42/14 V systems use it to reduce the size of input and output capacitors and the conduction losses and other applications take advantage of this technique to improve a particular characteristic.

Multiphase converters may allow improvements in the bandwidth. The synchronous buck converter is one of the more appropriate topologies to implement this technique.

This topology can achieve higher bandwidth, using voltage mode control instead of current mode.

Since each current loop needs several components, the cost of the power supply is increased.

Due to this, the number of phases is limited to 3 to 5 typically and commercial ICs offer a compact solution.

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CONCEPT In continuous conduction mode (CCM), the current unbalance depends mainly on duty cycle differences and

parasitic resistance.

In most cases, these parameters are under certain limits, therefore allowing the operation of the converter without the aforementioned current loops.

Since the duty cycle is the main factor responsible for the current unbalance, it is especially important to use digital control, which reduces the inequalities of the driving signals of the power MOSFETs.

The use of a high number of phases together with digital control without current loops has been used successfully in static conditions.

The objective of this paper is to propose a design for the power stage in CCM that improves the current

balance without using current loops.

.

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BLOCK DIAGRAM

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BLOCK DESCRIPTION

The microcontroller is used to monitor the current imbalance condition at the time when the multi phase buck converter is under process.

Whenever the current imbalance criteria occurs the control moves on to microcontroller.

these converters have several paralleled power stages, with a current loop in each phase and a single voltage loop.

The presence of the current loops avoids current imbalance among phases.

In the microcontroller there is an intrinsic mechanism of self-balance that reduces the current imbalance.

Thus, in the buck converter, if natural zero-voltage switching (ZVS) is achieved in both transitions, the instantaneous inductor current compensates partially the different dc currents through the phases.

when the conditions are met, the phase currents are very well balanced even during transient conditions.

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OPERATION

• In buck converter output voltage Vo is lesser than the input voltage Vi.

• When the switch pictured above is closed ,the voltage across the inductor is VL = Vi − Vo. The current through the inductor rises linearly. As the diode is reverse-biased by the voltage source V, no current flows through it;

• When the switch is opened ,the diode is forward biased. The voltage across the inductor is VL

= − Vo (neglecting diode drop). Current IL Decreases. Disadvantage: Inorder to achieve a current self balance mech. We have to increase the ripple

current 200% more than the average phase current.This is not possible in buck converter.so we are using synchronous buck converter.

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Syn. Buck converter

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Operations Each buck converter has two switches .The onethat connects the input to the inductor (high side MOSFET orHSM) ; and the one that connects the inductor to ground (lowside MOSFET or LSM). ZVS is achieved naturally in the turnonof LSM with a proper timing of the gate signals of thesetransistors. In typical designs, the turn-on of the HSM isdissipative since the inductor current is always positive andthere is no way to charge/discharge the parasitic capacitances.

In case of designing the converter to have negative current inthat transition, ZVS is achieved, with a similar mechanism. Itwill be seen that this also helps to improve the current balancewithout current loops.

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Continued… To explain the auto-balance of the currents, several imagesof the turn-off of the LSM taken with the oscilloscope areshown in figure 4. In four different conditions, VGS_LSM,VDS_LSM and iL are shown.

When the turn-on of HSM takes place with ZVS, the speedof the charge/discharge of the parasitic capacitances isdetermined by the instantaneous inductor current and not bythe gate-source signal of HSM. Therefore, a more(instantaneous) negative current produces a quicker transitionincreasing the voltage·second balance on the inductor and thenincreasing the average inductor current. This mechanism triesto compensate current unbalances since the phase with thesmallest dc current, polarizes more its inductor and, as aconsequence, the dc current is increased.

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Continued… On the other hand, the smaller (but negative) the

instantaneous current, the higher the switching interval.

A well-known issue but the important thing is that this fact helps to compensate different dc currents in a multiphase converter. Thus, the phase with the most negative current changes its inductor voltage faster and, therefore, it tries to

increase its average current value.

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Microcontroller pin configuration 8051

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Circuit diagram

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CIRCUIT DESCRIPTION The figure shows the power stage of a four-phase synchronous buck converter and its main waveforms.

The main advantage of this approach is that phase currents are partially cancelled obtaining advantage in filter reduction and dynamic response (because L can be reduced).

Including a current loop is relatively expensive because of the required electronic circuitry (sensor or resistor plus differential amplifier or current transformer) and a more complex control (M current loops).

Therefore, the use of a high number of phases is not cost-effective.

The fact of having M current loops limits the existence of multiphase converters with a high number of phases.

If current loops are not included, it is necessary to oversize all the phases to foresee certain current unbalance, depending on some parameters, especially parasitic resistance and duty cycle.

An interesting option that helps reduce current unbalance is to design the converters with a phase current ripple higher than twice the average current value (k > 200%).

This option is possible only if the buck converter is synchronous.

Although there is a higher current ripple per phase, the interleaving technique considerably reduces the current ripple at the output.

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SIMULATION OUTPUT

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RS 232

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REFERENCES [1] D. R. Garth, W. J. Muldoon, G. C. Benson, and E. N. Costague, “Multiphase, 2 kiloWatt, high voltage,

regulated power supply,” in Proc. IEEE Power Conditioning Spec. Conf., 1971, pp. 110–116.

[2] B.A.Miwa, D. M. Otten, and M. F. Schlecht, “High efficiency power factor correction using interleaving techniques,” in Proc. IEEE Appl. Power Electron. Conf. Expo., (APEC 1992), pp. 557–568.

[3] X. Zhou, X. Zhang, J. Liu, P. L. Wong, J. Chen, H. P. Wu, L. Amoroso, F. C. Lee, and D. Y. Chen, “Investigation of candidate VRM topologies for future microprocessors,” in Proc. IEEE Appl. Power Electron. Conf. (APEC), 1998, pp. 145–150.

[4] J. Li, C. R. Sullivan, and A. Schultz, “Coupled inductors design optimization for fast response low voltage DC/DC converters,” in Proc. IEEE Appl. Power Electron. Conf. (APEC), 2002, pp. 817–823.

[5] M. Lee, D. Chen,K.Huang, L. Chih-Wen, and Tai Ben, “Modeling and design for a novel adaptive voltage positioning (AVP) Scheme formultiphase VRMs,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1733–1742, Jul.2008.

[6] T. C. Neugenbauer and D. J. Perrault, “Computer aided optimization of DC/DC converters for automotive applications,” IEEE Trans. Power Electron., vol. 18, no. 3, pp. 775–783, May 2003.

[7] A. Consoli, G. Scarcella, G. Giannetto, and A. Testa, “A multiphase DC/DC converter for automotive dual voltage power systems,” presented at the Power Convers. Intell. Motion (PCIM), Nuremberg, Germany, 2001.

[8] J. Czogalla, J. Li, and C. R. Sullivan, “Automotive application of multiphase coupled-inductor DC–DC converter,” Proc. Ind. Appl. Conf., 2003, vol. 3, pp. 1524–1529, Paper AUT3.