mstm-s3-tr stratum 3 timing module · 2009-03-13 · application the connor-winfield mstm-s3-tr...

ApplicationThe Connor-Winfield MSTM-S3-TR

Simplified Control Timing Module acts as acomplete system clock module for Stratum 3timing applications in accordance with GR-1244, Issue 2 and GR-253, Issue 3.

Connor Winfield’s Stratum 3 timing moduleshelps reduce the cost of your design byminimizing your development time andmaximizing your control of the system clockwith our simplified design.

Features• 5V Miniature Timing

Module

• RedundantReferences

• 2 SynchronousOutputs AvailableFrom 8 kHz to77.76MHz

• 40 sec., Filtered,Hold Over History

• Operational StatusFlags

MSTM-S3-TRStratum 3Timing Module

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630- 851- 4722

Fax: 630- 851- 5040

www.conwin.com

Bulletin TM027 of 16Revision P05Date 02 DEC 02Issued By MBatts

Data Sheet #: TM027 of 16 Rev: P05 Date: 12 / 02 / 02© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice

General DescriptionThe Connor-Winfield Stratum 3 Simplified Control Timing Mod-ule acts as a complete system clock module for general Stratum3 timing applications. The MSTM is designed to replace similarunits from TF Systems (TF118B) and Raltron (SY0001B).

Full external control input allows for selection and monitoringof any of four possible operating states: 1) Holdover, 2) ExternalReference #1, 3) External Reference #2, and 4) Free Run. Table#1 illustrates the control signal inputs and corresponding opera-tional states.

In the absence of External Control Inputs (A,B), the MSTMenters the Free Run mode and signals an External Alarm. TheMSTM will enter other operating modes upon application of aproper control signal. Mode 1 operation (A=1, B=0) results in anoutput signal that is phase locked to the External ReferenceInput #1. Mode 2 operation (A=0, B=1) results in an output sig-nal that is phase locked to External Reference Input #2. Hold-over mode operation (A=1, B=1) results in an output signal at ornear the frequency as determined by the latest (last) locked-signal input values and the holdover performance of the MSTM.Free Run ModeFree Run mode operation (A=0, B=0) is a guar-anteed output of 4.6 ppm of the nominal frequency.

Alarm signals are generated at the Alarm Output during Hold-over and Free Run operation. Alarm Signals are also generatedby Loss-of-Lock and Loss-of-Reference conditions. A high levelindicates an alarm condition. Real-time indication of the opera-tional mode is available at unique operating mode outputs onpins 1-4.

Control loop 0.1 Hz filters effectively attenuate any referencejitter, smooth out phase transients, comply with wander transferand jitter tolerances.

Absolute Maximum RatingTable 2

Symbol Parameter Minimum Nominal Maximum Units Notes

VCC Power Supply Voltage -0.5 7.0 Volts 1.0

VI Input Voltage -0.5 VCC + 0.5 Volts 1.0

Ts Storage Temperature -55 100 deg. C 1.0

Functional Block DiagramFigure 1

Stratum3OCXO

Stratum3OCXO

HoldoverFIFO

HoldoverFIFO

DACDAC

PhaseBuild Out

Circuit

PhaseBuild Out

Circuit

Tuning Voltage Monitor

Tuning Voltage Monitor

1

2

3

4

Free Run

Ref #1

Ref #2

Hold Over

CNTL A

CNTL B

Sync_Out

RefControl

RefControl

Ex Ref 1

Ex Ref 2

PLL_TVL

Free Run

Hold Over

LOL & LOR

Alarm_Out

÷N

DPLL

Reference Clock

Opt_Out*

*Only one Opt_Out option is available per module

CNTL CNTL Operational Ref 1 Ref 2 Hold Over Free Run PLL Unlock Alarm Out A B Mode

0 0 Free Run (Default Mode) 0 0 0 1 0 1

External Normal 1 0 0 0 0 01 0 Reference PLL_Unlock 1 0 0 0 1 0

#1 LOR 0 0 1 0 0 1

External Normal 0 1 0 0 0 00 1 Reference PLL_Unlock 0 1 0 0 1 0

#2 LOR 0 0 1 0 0 1

1 1 Hold Over 0 0 1 0 0 1

Function Control TableTable 1


NOTES:

1.0: Stresses beyond those listed under Absolute Maximum Rating may cause damageto the device. Operation beyond Recommended Conditions is not implied.

2.0: Logic is 3.3V CMOS

3.0 GR-1244-CORE 3.2.1

Recommended Operating ConditionsTable 3

Symbol Parameter Minimum Nominal Maximum Units Notes

Vcc Power supply voltage 4.75 5.00 5.25 Volts

VTH Reset threshold voltage 4.25 4.5 Volts

VIH High level input voltage - TTL 2.0 VCC Volts

VIL Low level input voltage - TTL 0 0.8 Volts

tIN Input signal transition - TTL 250 ns

CIN Input capacitance 15 pF

VOH High level output voltage, 2.4 5.25 Volts 2.0 IOH = -4.0mA, VCC = min.

VOL Low level output voltage, 0.4 Volts IOL = 12.0 mA, VCC = min.

tTRANS Clock output transition time 4.0 ns

tPULSE 8kHz input reference pulse 30 nswidth( positive or negative)

TOP Operating temperature 0 70 °C

SpecificationsTable 4

Parameter Specifications Notes

Frequency Range (Sync_Out) 8 kHz to 77.76 MHz

Frequency Range (Opt_Out) 8 kHz to 77.76 MHz

Supply Current 250 mA typical, 400 mA during warm-up (Maximum)

Timing Reference Inputs 8 kHz - 19.44 MHz 3.0

Jitter, Wander and Phase Transient Tolerances GR-1244-CORE 4.2-4.4, GR-253-CORE 5.4.4.3.6

Wander Generation GR-1244-CORE 5.3, GR-253-CORE 5.4.4.3.2

Wander Transfer GR-1244-CORE 5.4

Jitter Generation GR-1244-CORE 5.5, GR-253-CORE 5.6.2.3

Jitter Transfer GR-1244-CORE 5.5, GR-253-CORE 5.6.2.1

Phase Transients GR-1244-CORE 5.6, GR-253-CORE 5.4.4.3.3

Free Run Accuracy 4.6 ppm over TOP

Hold Over Stability ±0.37 ppm for initial 24 hrs 4.0

Inital Offset ±0.05 ppm

Temperature ±0.28 ppm

Drift ±0.04 ppm

Maximum Hold Over History 40 seconds

Pull-in/ Hold-in Range ±13.8 ppm minimum 5.0

Lock Time 30 seconds typical

DPLL Bandwidth < 0.1 Hz

4.0: Hold Over stability is the cumulative fractional frequency offset as described byGR-1244-CORE, 5.2

5.0: Pull-in Range is the maximum frequency deviation from nominal clock rate on thereference inputs to the timing module that can be overcome to pull into synchronizationwith the reference


Ordering Information

MSTM-S3-TR-(Input Reference Frequency)(Opt_Out Frequency)-(Primary Output)

1= 1.544 MHz Primary Output ÷ N option: 02.048M = 2.048MHz2= 2.048 MHz 2= 2.048 MHz 016.384M = 16.384 MHz8= 8 kHz 8= 8 kHz 019.44M = 19.44 MHz9= 19.44 MHz N= No output 032.768M = 32.768 MHzS= Other S= Other 038.88 M = 38.88 MHz

Reference Clock Out option: 077.76 M = 77.76 MHz6= 16.384 MHz9= 19.44 MHz

Example: MSTM-S3-TR-88-038.88M

Pin DescriptionTable 5

Pin # Connection Description

1 Hold Over Indicator output. High output when Hold Over mode is selected by control pins.

2 Ref 1 Indicator output. High output when Ref 1 mode is selected by control pins.

3 Ref 2 Indicator output. High output when Ref 2 mode is selected by control pins.

4 Free Run Indicator output. High output when Free Run mode is selected by control pins.

5 GND Ground

6 Alarm _Out Alarm output. High output if module is in Free Run, or Hold Over, or LOR.

7 CNTL A Mode control input

8 CNTL B Mode control input

9 PLL_Unlock Indicates that the PLL is not locked to a reference.

10 Tri-State/GND 0 = Normal operation, 1= Tri-State. Pin is pulled low internally.Ground pin for normal operation.

11 Sync_Out Primary timing output signal. Signal is sychronized to reference.

12 GND Ground

13 Opt_Out Secondary output signal. Signal is derived from Sync_Out or from an internalreference clock depending upon the choosen configuration.

14 GND Ground

15 Ex_Ref_2 External Input Reference #2

16 GND Ground

17 Ex_Ref_1 External Input Reference #1

18 Vcc +5V dc supply


Typical ApplicationFigure 2

Typical System Test Set-upFigure 3

Input Select

MUX

MUX

MUX

MUX

System Select

BITSSystemSignal

CW’s STM/MSTM module

CW’s STM/MSTM module

CW’s SCG2000/4000

CW’s SCG2000/4000

A

B

S

Y

A

BY

S

A

B

A

B

S

Y

S

Y

Timing Card #N

Line Card 1

RCV

RCV

Clock out

Clock out

Line Card N

T a rg e t S y s te m U n d e r T e s t

P o s s ib le C h o ic e s In c lu d eS ta n fo rd R e s e a rc h M o d e l: F S 7 0 0T ru e t im e M o d e l X X X

A rb itra ryW a v e fo rmG e n e ra to r

E x te rn a lR e fe re n c eIn p u t

A rb itra ryW a v e fo rmG e n e ra to r

[N o is eS o u rc e ]

D S 1 ra te R Z (1 .5 4 4 M H z ), E 1 ra te R Z o r 8 k H zc lo c k R Z w ith n o is e m o d u la t io n

T E K T R O N IX S J 3 0 0 E

C lo c k o r B IT S lo g ic le v e lc lo c k in p u t (T T L , C M O S ,e tc .)

H P 5 3 3 1 0 AM o d u la t io n A n a ly z e r / T im e In te rv a l A n a ly z e r

D S 1 ra te [1 .5 4 4 M H z ] B IT S B ip o la r

P h a s e E rro r d a ta o u tp u t

S a m p l e W a n d e r G e n e r a t i o n ( T D E V ) f o r S T M / M S T M - S 3

1 0 0 .0 E - 1 2

1 .0 E - 9

1 0 .0 E - 9

1 0 0 .0 E - 9

1 .0 E - 6

1 0 .0 E -3 1 0 0 .0 E - 3 1 .0 E + 0 1 0 .0 E + 0 1 0 0 .0 E + 0 1 .0 E + 3

I n t e g r a t i o n T i m e ( s e c )

TD

EV

(s

ec

T D E V

G R 1 2 4 4 - F ig 5 . 1

G R 1 2 4 4 - F ig 5 - 3

T yp ic a l re s p o n s e - 3 0 0 0 s e c o n d te s t - J itt e r a p p l ie d ( 2 U I @ 1 0 H z )re f d a te A P R 2 2 1 9 9 8k dh

C o p yr ig h t 1 9 9 8 C o n n o r - W in f ie ld a ll l rig h ts r e s e rv e d

S a m p l e M T I E D a t a f o r S T M - S 3 / M S T M - S 3

1 .0 E -9

1 0 .0 E -9

1 0 0 .0 E -9

1 .0 E -6

1 0 0 .0 E - 3 1 .0 E + 0 1 0 .0 E + 0 1 0 0 .0 E + 0 1 .0 E + 3 1 0 .0 E + 3

O b s e r v a t io n T im e ( s )

MT

IE (

s

M T IE

1 2 4 4 - 5 . 2 M a s k ( A )

1 2 4 4 - 5 . 2 M a s k ( B )

1 2 4 4 - 5 . 6 M a s k

G R 2 5 3 - 5 . 4 . 4 .3 . 2

C o p y rig h t 1 9 9 8 C o n n o r - W in f ie ld a ll r ig h ts re s e r v e d

T yp i c a l r e s p o n s e - 3 0 00 s e c o n d te s t - J it t e r a p p lie d ( 2 U I @ 1 0 H z )re f d a t e A P R 2 2 1 9 9 8

k dh

S ta n d a rd sC o m p lia n c eD o c u m e n ts

T im e -s ta m p e d e n s e m b leb a s e d o n a b s o lu te t im ere fe re n c e (1 0 M H z in p u t)

D S -1 , O C -3 , O C -1 2 e le c tr ic a l o r o p t ic a l s ig n a ls

W a n d e r A n a ly z e r d a ta ( IE E E -4 8 8 )

1 0M H z

T h is d e v ic e s u p p lie s s y s te m t im ein fo rm a t io n . I t c a n b e th o u g h t o f a ss u p p ly in g "a b s o lu te t im e " re fe re n c ein fo rm a t io n

1 0M H z


Noise M

odulation Input

1 0M H z


IE E E -4 8 8 C o n tro lle rP la t fo rm fo r s o f tw a reH P 5 3 3 0 5 A P h a s e A n a ly z e rH P E 1 7 4 8 A S y n cM e a s u re m e n tT e k t ro n ix W a n d e r A n a ly z e r

1 0M H z


Tim

ing

Car

d

Line

Car

d

Tim

ing

Car

d

OC

-3 L

ine

Car

d

OC-

12 L

ine

Card

OC-

48 L

ine

Card

DS-1

Lin

e C

ard

. . . . . . .

M T IE , T D E V , W a n d e r T ra n s fe r ,a n d W a n d e r G e n e ra tio n P lo ts

T e k tro n ixS J 3 0 0 E

G P S o r L O R A NT im in g S o u rc e


MSTM-S3-TR Typical Current DrawFigure 4

Typical Calibrated Wander Transfer TDEVFigure 5

TYPICAL CURRENT DRAW STS/MSTS-S3-T2

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0 10 20 30 40 50 60

TIME (Sec)

CU

RR

EN

T (A

)

1

10

100

1000

10000

0.01 0.1 1 10 100

1000

1000

0

Integration Time (Sec.)

TDEV

(ns)

TDEV (ns)GR1244, Fig 5.3


Typical Wander Generation MTIEFigure 6

1 0

1 0 0

1 0 0 0

0.1 1 10 100

1000

1000

0

1000

00

1000

000

O b s e r v a t i o n T i m e ( s e c . )

MTI

E (n

s)

G R 1 2 4 4 , F i g 5 . 2 ( A )G R 1 2 4 4 , F i g 5 . 2 ( B )G R 2 5 3 - 5 . 4 . 4 . 3 . 2 , F i g 5 . 1 7M T I E ( n s )

Typical Wander Generation TDEVFigure 7

0 .1

1

1 0

1 0 0

0.1 1 10 100

1000

1000

0

In te g ra tio n T im e (s e c .)

TDEV

(ns)

T D EV (n s)

G R 1244, F ig 5 .1


Typical Phase Transient MTIEFigure 9

1

1 0

1 0 0

1 0 0 0

1 0 0 0 0

0 .0 1 0 .1 1 1 0 1 0 0 1 0 0 0

O b s e rv a tio n T im e (s e c )

MTI

E (n

s) G R -253, F ig . 5 -19 , R e q u ire m e n tM T IE (n s)

1µµµµµs Phase Transient TIEFigure 8

-200

0

200

400

600

800

1000

1200

0 1 2 3 4 5 6 7 8 9 10

Time (sec)

TIE

(ns)


Entry Into Hold OverFigure 10

1

1 0

1 0 0

1 0 0 0

1 0 0 0 0

0 .0 0 1 0 .0 1 0 .1 1 1 0 1 0 0 1 0 0 0

O b s e rv a tio n T im e (s e c o n d s )

MTI

E (n

s)

G R -1 2 4 4 O b je c tive , F ig . 5 -8G R -1 2 4 4 R e q uire m e nt, F ig . 5 -8G R -2 5 3 , F ig . 5 -1 9 , R e q uire m e ntTyp ica l M TIE

Return from Hold OverFigure 11

1

10

100

1000

10000

0.001 0.01 0 .1 1 10 100 1000

O b se rva tio n T im e (se c . )

MTI

E (n

s)

G R -1244 R equ irem ent , F ig . 5 -7G R -253 , F ig . 5 -19 , R equ irem entTy p ic a l M TIE


2 msec < t < 4.125 msec∆ m

Change in Operational Mode

Operational Mode Indicator

∆tm

MSTM-S3-TR Mode Indicator DelayFigure 12

10 usec < ∆tm < 65 usec


Loss of Reference Timing DiagramFigure 13

Power on Reset LevelsFigure 14

VRange

TH

VCC

Normal OperationReset Reset

ExternalReference

Input

Alarm

t onA t offA

125 usec < t on < 250 usec t off 500 msec

A

A z


Solder ClearanceFigure 15

.030"PIN LAND

ALL SOLDER AND/OR WIRE TAGSSHALL NOT EXTEND MORE THAN .020"BELOW PC BOARD BOTTOM SURFACE

.020"

.020" MAX.


VIA KEEP OUT AREA:It is recommended that there be no vias or feed

throughs underneath the main body of the modulebetween the pins. It is suggested that the traces inthis area be kept to a minimum and protected by alayer of solder mask. See Figure 17.

SOLDER MASK:A solder mask is recommended to cover most the

top pad to avoid excessive solder underneath theshoulder of the pin to avoid rework damage. SeeTable 6 and Figure 18.

PAD CONSTRUCTION:The recommended pad construction is shown in

Figure 17. For the pin diameter of .040” a holediameter of .055” is suggested for ease of insertionand rework. A pad diameter of .150” is alsosuggested for support. This leaves a spacing of.050” between the pads which is sufficient for mostsignal lines to pass through.

PAD ARRAY AND PAD SPACING:The pins are arranged in a dual-in-line

configuration as shown in Figure 17. There is .2”space between the pins in-line and each line isseparated by 1.6”. See Figures 16 & 17 and Table6.

MECHANICAL OUTLINE:The mechanical outline of the MSTM-S3-TR is

shown in Figure 16. The board space required is 2” x2”. The pins are .040” in diameter and are .150” inlength. The unit is spaced off the PCB by .030”shoulders on the pins. Due to the height of thedevice it is recommended to have heat sensitivedevices away where the air flow might not beblocked.

MODULE BAKEOUT:Do not bakeout the MSTM-S3-TR

WASHING RECOMMENDATIONS:The MSTM-S3-TR is not in a hermetic enclosure.

It is recommended that the leads be hand cleanedafter soldering. Do not completely immerse themodule.

SOLDERING RECOMMENDATIONS:Due to the sensitive nature of this part, hand

soldering or wave soldering of the pins isrecommended after reflow processes.

POWER SUPPLY REGULATION:Good power supply regulation is recommended for

the MSTM-S3-TR The internal oscillators areregulated to operate from 4.75 - 5.25 volts. Largejumps within this range may still produce varyingdegrees of wander. If the host system is subject tolarge voltage jumps due to hot-swapping and the like,it is suggested that there be some form of externalregulation such as a DC/DC converter.

GROUND AND POWER SUPPLY LINES:Power specifications will vary depending primarily

on the temperature range. At wider temperatureranges starting at 0 to 70 deg. C., an ovenizedoscillator, OCXO, will be incorporated. The turn-oncurrent for an OCXO requires a peak current ofabout .4A for about a minute. The steady statecurrent will the vary from 50-150 mA depending onthe temperature. It is suggested to plan for the peakcurrent in the power and ground traces pin 18 andpin 5. The other four ground pins 10, 12, 14, and 16are intended for signal grounds.


Package DimensionsFigure 16

Recommended Footprint DimensionsFigure 17

Side Assembly ViewFigure 18

Characteristic MeasurementsTable 6

Characteristic Item Measurement (inches)

Pad to Pad Spacing 0.200

Solder pad top O.D. 0.150

Solder pad top I.D. 0.055

Solder pad bottom O.D. 0.150

Solder pad bottom I.D. 0.055

Solder mask top dia. 0.070

Solder mask bottom dia. 0.155

Pin row to row spacing 1.600

TOP SIDESOLDER RESIST(OVER PAD)

PCB

SIDE VIEWBOTTOM SIDESOLDER RESIST(UP TO PAD)


Revision Revision Date Note

P00 7/27/01 Preliminary Release

P01 8/01/01 Added POR figure and Tri-state pin

P02 8/14/01 Added new input frequency

P03 4/9/02 Added Opt_Out information

P04 4/9/02 Updated Pin descriptions

P05 12/2/02 Corrected Table 1

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630- 851- 4722

Fax: 630- 851- 5040

www.conwin.com

mstm-s3-tr stratum 3 timing module · 2009-03-13 · application the connor-winfield mstm-s3-tr...

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