ms esd syllabus

Click here to load reader

Post on 22-Oct-2014




11 download

Embed Size (px)


MS AES(Syllabus)

Syllabus for MS Embedded System DesignFirst Semester Subject Code ESD 601 ESD 603 ESD 605 ESD 607 ESD 609 ESD 611 Subject Name Embedded System Design Real Time Operating Systems Signals & Systems Digital Signal Processing Digital System & VLSI Design Data Structures and Algorithms Term Paper - I TOTAL Second Semester Systems Software Embedded Control Systems Embedded Software Engineering Device Drivers Control Systems Modeling & Simulation Design using Microcontrollers Term Paper - II TOTAL Third & Fourth Semester Project Work Theory Credits 03 03 03 03 03 03 -18 03 03 03 03 03 03 -18 -Lab Credits 01 01 01 01 01 01 -06 01 01 01 01 01 01 -06 -Total Credits 04 04 04 04 04 04 01 25 04 04 04 04 04 04 01 25 40 90

ESD 608 ESD 610 ESD 612 ESD 614 ESD 616 ESD 618

Total Number of Credits to Award Degree

Page 1 of 19

MS AES(Syllabus)

First Semester ESD 601 Embedded System Design 1.0 Introduction: 3 Hrs 1.1 Embedded Systems Overview 1.2 Design Challenges: Common Design Metrics, Time-to-Market Design Metric, NRE and Unit cost Design Metrics, Performance Design Metric 1.3 Processor Technology: General Purpose Processors Software, Single Purpose Processors Hardware, Application Specific Processors. Custom Single Purpose Processors 8 Hrs 2.1 Introduction 2.2 Combinational Logic: Transistors and Logic Gates, Basic Combinational Logic Design, RT Level Combinational Components 2.3 Sequential Logic: Flip Flops, RT Level Sequential Components, Sequential Logic Design. 2.4 Custom Single Purpose Processor Design 2.5 RT Level Custom Single Purpose Processor Design 2.6 Optimizing Custom Single Purpose Processors: Optimizing the original Program, Optimizing the FSMD, Optimizing the Data path, Optimizing the FSM. Standard Single Purpose Processors Peripherals: 8 Hrs 3.1 Introduction 3.2 Timers, Counters and Watchdog Timers: Reaction Timer and ATM timeout using watchdog timer. 3.3 UART 3.4 Pulse Width Modulators: Controlling DC Motor using a PWM 3.5 LCD Controllers: LCD Initialization 3.6 Keypad Controllers 3.7 Stepper Motor Controllers: Controlling a stepper motor directly and using a driver. 3.8 Analog-to-Digital Converters: Successive Approximation ADC. 3.9 Real-Time Clocks. Memory 8 Hrs 4.1 Introduction, Memory Write ability and Storage permanence 4.2 Common Memory types: Introduction to ROM, MaskProgrammed ROM, One-Time Programmable ROM, EPROM, EEPROM, Flash Memory, Introduction to RAM: Static RAM, Pseudo-Static RAM, NVRAM, HM6264 and 27C256 RAM/ROM devices, TC55V2325FF-100 Memory Device. 4.3 Composing Memory




Page 2 of 19

MS AES(Syllabus)

4.4 4.5

Memory Hierarchy and Cache: Cache Mapping Techniques, Cache-Replacement Policy, Cache Write Techniques Advanced RAM: Basic DRAM, Fat Page Mode DRAM, Extended Data Out DRAM, Synchronous and Enhanced Synchronous DRAM, DRAM Integration Problem, Memory Management Unit.


Interfacing 8 Hrs 5.1 Introduction 5.2 Communication Basics: Basic Terminologies, Basic Protocol Concepts, ISA Bus Protocol Memory Access. 5.3 Microprocessor Interfacing (I/O Addressing): Port and Bus Based I/O, Memory mapped I/O and standard I/O, ISA Bus Protocol Standard I/O, A Basic Memory protocol, A complex memory protocol. 5.4 Microprocessor Interfacing (Interrupts) 5.5 Microprocessor Interfacing (DMA) 5.6 DMA I/O and ISA Bus Protocol 5.7 Arbitration: Priority Arbiter, Daisy-Chain Arbitration 5.8 Advanced Communication Principles: Parallel, Serial, Wireless communications, Layering, Error detection and correction 5.9 Serial Protocols: I2C, CAN, Firewire, USB 5.10 Parallel Protocols: PCI Bus, ARM Bus 5.11 Wireless Protocols: IrDA, Bluetooth, IEEE 802.11 State 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 6.12 6.13 6.14 6.15 6.16 Machine and concurrent Process Models 5 Hrs Introduction Models vs. Languages, Text vs. Graphics An Introductory Example A Basic State Machine Modem (FSM) FSM with Datapath Model (FSMD) Using State Machines: Describing a System as a State Machine, Comparing State Machines and Sequential Program Models, Capturing State Machines in Sequential Programming Language HCFSM and the statecharts Language Program-State Machine Model (PSM) The roll of an approapriate Model and Language Concurrent Process Model Concurrent Processes: Process Create and Terminate, Process Suspend and Resume, Process Join Communication among Processes: Shared Memory, Message Passing. Synchronization among Processes: Condition Variables, Monitors. Implementation: Creating and Terminating Processes, Suspending and Resuming Processes, Joining a Process, Scheduling Processes. Data Flow Model Real Time Systems: Windows CE, QNX.


Page 3 of 19

MS AES(Syllabus)


Control Systems 5 Hrs 7.1 Introduction 7.2 Open-Loop and Closed Loop Control Systems: Overview, An Open-Loop Automobile Cruise Control, A Closed-Loop Automobile Cruise Control 7.3 General Control Systems and PID Controllers: Control Objectives, Modeling Real Physical Systems, Controller Design 7.4 Software Coding of a PID Controller 7.5 PID Tuning 7.6 Practical Issues Related to Computer-Based Control: Quantization and Overflow effects, Aliasing, Computation Delay. 7.7 Benefits of Computer-Based Control Implementations: Repeatability, Reproducibility and Stability, Programmability. Total No. of Hours: 45

Reference Books

Embedded System Design Vahid Frank & Tony Givargis Embedded Microcomputer Systems Jonathan W. Valvano An Embedded Software Primer David E. Simon Programming for Embedded Systems Dreamtech Software Team Fundamentals of Embedded System Software Daniel W Lewis Designing Embedded Hardware John Catsoulis An Introduction to the design of Small Scale Embedded Systems Tim Wilmshurst

Page 4 of 19

MS AES(Syllabus)

ESD 603 Real Time Operating Systems 1. Introduction 1.1 types of real-time systems (hard, soft, firm), 1.2 need for a real-time system 1.3 different kinds (reactive, time driven, deadline driven, etc.,) 1.4 aspects of real-time systems (timeliness, responsiveness, concurrency, predictability, correctness, robustness, fault tolerance and safety, resource limitations, RTOS necessity) 1.5 examples 2. Partitioning a system 2.1 need for partitioning 2.2 criteria for partitioning (performance, criticality, development ease, robustness, fault tolerance and safety, resource limitations, etc.,) 2.3 various kinds (combination of software & hardware partitions on a (i) single processor, (ii) multiple processors (iii) distributed systems, hardware-only partitions (ASIC, FPGA etc.,)); the rationale/criteria for selecting a particular scheme, advantages and disadvantages 2.4 Tradeoffs and pros-cons of various methods mentioned above. 3. Subsystem/partition interconnections/communications 3.1 different kinds of subsystem/partition interconnection/communication schemes (eg., communication bus, point-to-point connection, system bus, shared memory, backplane etc.,) 3.2 criteria for selecting a scheme (based on determinism, response times, round-trip times, throughput, criticality, available bandwidth, protocol overheads, latencies, etc.,) 3.3 synchronizing clock/time among various subsystems 3.4 realtime communication protocols 3.5 device driver models and its interface with RTOS 3.6 reliability and fault-tolerance techniques 3.7 architecture/design patterns for interconnection/communication and their tradeoffs 3.8 architecture/design patterns for communication resource management and their tradeoffs 4. Parallelism/Concurrency on an SBC (software perspective) 4.1 Introduction to traditional sequential-programming employed in smaller systems (sequential control flow, while loops without schedulers etc.,), advantages and disadvantages. 4.2 Advantages of multiprogramming/multi-tasking, parallelism and concurrency (multi-threading). 4.3 Multi-tasking and multi-threading support provided by an RTOS (Process mgmt, thread mgmt, schedulers, different kinds of

Page 5 of 19

MS AES(Syllabus)


scheduling, deterministic scheduling, RMA, static/dynamic scheduling, scheduling periodic/a-periodic tasks, slack stealing, analyses methods to determine whether the scheduling policy meets the timing constraints) Design patterns for addressing multi-tasking, multi-threading & determinism

5. Process/Task synchronization on an SBC (software perspective) 5.1 Process/Task Synchronization (need, different methods) 5.2 Mutual Exclusion (defn of race condition, deadlock & starvation, live locks etc., need for mutual exclusion) 5.3 IPC (need, different kinds), 5.4 RTOS support for Mutual Exclusion and IPC (Semaphores, spin locks, mutex, messaging, events/signals etc.,) 5.5 Design patterns for addressing mutual exclusion 5.6 Design patterns for addressing IPC 6. Embedded System Design requirement & Analysis 6.1 6.2 6.3 6.4 real-time requirement specification modeling/verifying design (tools (realtime UML, state charts, etc.,), techniques) Programming language with realtime support ADA multitasking

Reference Books 1. 2. 3.4.

5.6. 7.


Operating System Concepts and Design ,Milan Milenkovic,Tata Mcgraw Hill Real Time Operating Systems,Allen Berggse and Richard Wellings Operating System Concepts by Siberschatz,Galvin Software Design methods for concurrent and Real Time Systems,Hassan Gomaa, Addison Wesley,ISBN:0-201-52577-1 Software Design for Real Time Systems ,J.E.Colling,Chapman & Hall Pub,ISBN:0-412-34180-8 Operating System Concepts and Design ,Milan Milenkovic, Tata Mcgraw Hill Real Time Operating Systems and prgramming, Allen Burns and Richard Wellings + Internet Materials (PPT and PDf available of this book) Operating System Concepts by Siberschatz, Galvin

Page 6 of 19

MS AES(Syllabus)

ESD 605

Signals & Systems

ESD605 SIGNALS AND SYSTEMS 1. Mathematical preliminaries: Solution of Differential equations, The Natural response, Forced response and total response, Matrix algebra, inverse of a matrix, eigen values, eigen vectors. (3 hours) 2. Signals basics: Definition of signals & systems, Classification of signals: Continuous-time & Discrete-time signals, deterministic & random signals, even & odd signals, Periodic & non-periodic signals, Energy & power signals, Basic operations on signals, precedence rule for time shifting, scaling & folding, Elementary signals. (6 hours) 3. Time- domain analysis of Continuous and Discrete -time systems: Types of systems: Linear & non-linear, Time variant & time invariant systems, Causal & non-causal , static &dynamic , stable & unstable systems, Linear timeinvariant systems (LTI), Convolution integral, Convolution sum, Conditions for stability. (6 hours) 4.Continuous- time Fourier series (CTFS): Properties Linearity time shift frequency shift scaling differentiation, convolution in time, modulation(multiplication theorem), parsevals theorem, Dirichlets conditions for Convergence, problems(3 hours) 5. Discrete Time Fourier Transform (DTFT): Properties, linearity, time shift, frequency shift, scaling, Differentiation in frequency domain, time reversal, convolution multiplication in time, Parsevals theorem, problems hours) 6. Continuous- Time Fourier Transform (CTFT): Properties, problems


(2 hours)

7. Discrete Fourier Transform (DFT): Problems on DFT, Circular Convolution, DITFFT Algorithm Development, problems on DIT-FFT & DIF-FFT for N=4-point & for N=8- point. (4 hours) 8. Laplace Transform: Region of convergence, Solution to differential equation, Implementing Continuous- time systems using Direct form I &II structure. (2 hours) 9. Z-Transform: Properties of Region of Convergence (ROC), Properties of Z-transforms, Inverse Z-transform using Long division method & partial- fraction Method. Implementing Discrete- Time systems using Direct form I&II structure. (4 hours) 10. Sampling & Reconstruction: Sampling & Nyquist theorem, Sinc interpolation practical reconstruction. (3 hours)

1. 2.

Signals and Systems,Haykin,Wiley Signals and System,Opennheim,Willisky and Nawab,PHI

Page 7 of 19

MS AES(Syllabus)

3. 4. 5.6.

Signals and Systems, Ziemer R.E,Tranter W.H. and Fanin D.R, Pearson System and Signal Analysis, Chi Tsong Chen,Saunders College Pub Signals and System,Nagrath J,TMHFor unit 8:Laplace transform: Systems & Linear signals by B.P.LATHI (oxford publication)

ESD 607 Digital Signal Processing 1. Introduction to filters Need for filters, types of filters, Finite Impulse Response (FIR) filters, Infinite Impulse Response (IIR) Filters, structures for implementing filters and their hardware level implementation, designing IIR filters from analog proto-types (chebyshev, butterworth, elliptic), designing IIR filters by Bi-linear transforms, Impulse invariance method, Pole zero placement method. Design of FIR filters by windowing techniques, frequency sampling techniques and optimum equi-ripple design method. Finite word length effects of quantization co-efficients, comparison of FIR and IIR filters1.1

1.2 Use of MATLAB for digital filters analysis and design. Hands on exercises using the tools for digital filters analysis and design 2. DSP Processor architecture: Introduction to DSP Processors Differences between DSP and other microprocessor architectures, their comparison, need for special DSPs, RISC vs CISC. Overview of various DSP architectures. Fixed Point DSPs Architectures of ADSP21XX Series Processor, TMS 320C5X and C54X processors, addressing modes, pipelining. On- chip peripherals2.1

DSP Interfacing and Development Tools Interfacing with I/O, Analog to digital converters, interfacing to PC, Dual ported RAM, EEPROMs, EPGAs DSP tools: assembler, debugger, C Compiler, linker and loader2.2

Overview of Other DSPs and Applications (20%) VLIW Architectures, SHARC, SIMD, MIMD Architectures, multiprocessors DSPs and other analog DSPs, application: Adaptive filter, spectrum analyzer, echo cancellation, modem, voice synthesis & recognition, Choice of DSP Processors for Practical Applications, case studies like MPEG-2, Motion estimation/compensation chips.2.3


Reference Books Introduction to Digital Signal Processing,Proakis J.G and D.G. Manolakis,PHI

Page 8 of 19

MS AES(Syllabus)

2. 5.


Discrete Time Signal Processing,Oppenheim A.V and Schafer R.W.,Pearson 3. DSP:A Computer Based approach,(2e),Sanjay.K MItra 4. Introduction to Digital Signal Processing,Johnson J.R,PHI DSP Processor Fundamentals:Architecture and Features,A.Shoham,S.Chand,2000 6. Texas Intruments TMS320C6X user manuals,application notes. 7. DSP Processor Fundamentals, Phil Lapsley,S Chand and Company Digital Signal Processors-Architecture, Programming and Applications, B.Venkataramni & M.Bhaskar, Tata-Mcgraw Hill Pub. 9.

Page 9 of 19

MS AES(Syllabus)

ESD 609 Digital System & VLSI Design 1.0 Review of Digital Logic Circuits Design 1.1 [6 hrs] Combinational circuits - Design steps 1.1.1 Arithmetic Circuits - Full adder, Serial Adder, Adder/Subtractor, Ripple Carry Chain, Carry Look-Ahead adder, Carry Select Adder, ALU, Parity Generator, Comparator, Multiplier. Generalization of these Principles. 1.1.2 PLA, PAL, PLD, CPLD, ROM, FPGA introduction Sequential circuits - Design steps 1.2.1 Flip-flops, registers, counters Finite State Machines 1.3.1 Introduction to FSMs, capabilities, minimization and transformation of sequential machines 1.3.2 Synchronous and asynchronous FSMs 1.3.3 Mealy and Moore machines 1.3.4 State assignment of synchronous sequential machines 1.3.5 Structure of sequential machines 1.3.6 Verification and testing of sequential circuits Review of logic families 1.4.1 Different logic families and their comparison 1.4.2 Logic levels & Noise margin features1.4.3 Fan-in, Fan-out, Active load, Sinking & Sourcing currents

1.2 1.3





1.4.4 Propagation delay 1.4.5 MOS technology and VLSI MOS transistor theory [6 hrs] 2.1 Introduction 2.2 MOS device design eqations 2.3 CMOS inverter DC characteristics 2.4 Static load MOS inverters 2.5 Pass transistor, Transmission gate, tristate inverter Circuit characterization [4 hrs] 3.1 Resistance estimation 3.2 Capacitance estimation 3.3 Switching characteristics 3.4 CMOS gate transistor sizing 3.5 Power dissipation 3.6 Scaling principles CMOS circuit and layout design [6 hrs] 4.1 CMOS logic gate design 4.2 Basic physical design of simple gates 4.3 CMOS logic structures 4.4 Clocking strategies

Page 10 of 19

MS AES(Syllabus)


Memory, registers & System timing aspects [3 hrs] 5.1 3 transistor memory cell 5.2 nMOS pseudo static memory cell, Two 4-bit words of RAM array Practical realities and ground rules [3 hrs] 6.1 Performance, Floor plan & Layout 6.2 I/O pad layout 6.3 System delays Total teaching Hours: 28 hours


References: T. L. Floyd, Digital Fundamentals, Fourth Edition, Macmillan Publishing, 1990 M. M. Mano, Digital Design, Prentice Hall, 1984 P. K. Lala, Practical Digital Logic Design and Testing, Prentice Hall, 1996 Zvi Kohavi, Switching and Finite Automata Theory, McGraw-Hill, 1978. Neil H. E. Weste, Kamran Eshraghian, Principles of CMOS VLSI Design: a systems perspective, Second Edition, Addison Wesley, 1999. Douglas A Pucknell & Kamran Eshraghian, Basic VLSI design: Systems and Circuits John F Wakerly, Digital Design : Principles and Practices Zoron Salcic, VHDL and FPLDs in Digital Systems Design, Prototyping and Customisation

ESD 611 Data Structures and AlgorithmsESD611 / DES601 / EDA605 Data Structures & Algorithms Unit 1: INTRODUCTION TO ALGORITHMS hrs 1.1 Notion of Algorithm 1.2 1.3 1.4 1.5 Fundamentals of Algorithmic problem Solving Important problem types Analysis Frame work Asymptotic Notations &Basic efficiency classes. 1 3

Unit 2 : INTRODUCTION TO DATA STRUCTURES hrs 2.1 2.2 Information & meaning Arrays

Page 11 of 19

MS AES(Syllabus)


Structures. 5

Unit 3 : STACKS , RECURSION & QUEUES hrs 3.1 3.2 3.3 3.4 3.5 3.6 3.7 Definition & examples Representing (operations) Stacks Applications Recursive Definition & processes Applications Queues & its representation Different types of Queues.

Unit 4: LINKED LISTS hrs 4.1 4.2 Introduction Different types of lists & their implementation. 7 hrs


Unit 5: TREES & GRAPHS 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 Unit 6: hrs 6.1 6.2 6.3 6.4 Binary Trees Binary tree Representation The Huffman Algorithm Representing lists as trees Balanced Search Trees Expression Trees Tree Traversal Techniques Introduction to Graphs and their Representations. DFS &BFS Search Topological Sorting DIVIDE & CONUQER Merge Sort Quick sorts. Binary search Strassens Matrix Multiplication


Page 12 of 19

MS AES(Syllabus)

Unit 7: TRANSFORM & CONQUER hrs 7.1 7.2 Balanced search trees, AVL Trees, 2-3 Trees, Splay Trees Heaps and Heap sort


Unit 8: DYNAMIC PROGRAMMING hrs 8.1 8.2 Wars halls and Floyds Algorithm Knapsack and Memory function


Unit 9: GREEDY TECHNIQUE. hrs 9.1 9.2 9.3 Prims Algorithm Kruskals Algorithm Dijkstras Algorithm 5 hrs


Unit 10: BACK TRACKIN, BRANCH &BOUND 10.1 10.2 10.3 10.4 10.5 n-queens problem subset- sum problem Assignment problem Knapsack problem Travelling-salesman problem.

Text Books :1. The Design and analysis of algoritms by Anany levitin 2. Data structures using c by Yedidyah Langsam. Moshe.j.Augenstein and M Tenenbaum . Reference :1. 2. Data Structures and Algorithms by Mark Allen Weis. Algorithm Design by Michael T. Goodrich

Page 13 of 19

MS AES(Syllabus)

Second Semester ESD 608ESD608 / DES602 / EDA611.2 Systems Software 1. Introduction to Assemblers : a. Assembly Lan. Prog., b..Assembly scheme, RB1- Sec 4.1, Sec 4.2 2. Assemblers Design: a. Pass structure of Assemblers b: Design of a two pass assemblers RB1 - Sec 4.3, Sec 4.4 3. Loaders and Linkers: Relocating & Linking Concepts, Design of a linker, linking for Overlays, Loader- RB1- Chapter 7 4. Virtual Machines: a. Virtual Machine Concepts b. Java Byte Code c. MIL Any book on java arcitecture and .net architecture, Information from Sun Microsystem and Microsoft Web Site 5. Lexical Analysers: a. Regular Expression b. Finate State Machine-NFA, DFA, c.DFA from regular Expression d. Desgining Lexical Analyser- RB2- Sec 3.3 to 3.8 6. Context Free Grammers: a. Languages,Grammars,Ambiguity,parse Trees b.Parsing, top-down parsing, bottom-up parsing ideas- RB2-Sec 4.2 & 4.3 7. Parser Introduction a. Introduction b. Recursive Descent Parsing- RB2-Sec 4.3 partially, Sec 4.4 partially 8. Parser Design: a. Removing Left Recursion b. Desigining Recursive Descent parsers- RB2-Sec 4.3 & 4.4 9. Paser Design: a. Predictive parsing b. LL(1) grammars- RB2- Sec 4.5 Partially 10.Paser Design: a Bottom - Up Parsing with LR(k) parsers b. Shift-Reduce parsing- RB2-Sec 4.5Sec 4.7 11.Intermediate Code:a . Parse trees ,Three address codes, Quadruples and Triples- RB2-Sec 8.1 12.Code Optimization:a. Principle Source of optimization b..DAG representation of basic blocks- RB2- Sec 10.2 & Sec 9.8 Refrence Book: 1. (RB1) System Programming & Operating System BY D M Damdhere 2. (RB2) Compliers Principles,Techniques and Tools by Aho, sethi and Ulman 3. System Software By L Bach 4. Crafting a Compiler with C By Charles N. Fischer, Richard J.leBlanc,Jr. 5. Compiler Constuction Principles & Practice By kenneth C Louden

Systems Software

ESD 610

Embedded Control Systems

This module aims to introduce Basics of Control Systems and its relevance to the Automotive Domain.ESD610 Embedded Control Systems This module aims to introduce Basics of Control Systems and its relevance to the Automotive Domain.

Page 14 of 19

MS AES(Syllabus)

Introduction to Control Systems and its Classification Introduction to Control Systems and its need, Application areas of Control System, field interacting in control system engineering, classification of control systems Modeling System Modeling: Mathematical Modeling of Control Systems Mechanical, transnational, Rotational, Gear Trains, RC and RLC Circuits. (Transfer function Approach and State Space Approach) Force Voltage and Force Current Analogy, DC Motor Modeling Field Controlled and Armature Controlled, Liquid Level Control Systems, Hydraulic Control Systems, Pneumatic Control Systems, Relays, Thermal Systems, Introduction to Block Diagrams & Signal Flow Graphs Time domain analysis First Order, Second Order Control System response for typical inputs like Step, Ramp and impulse inputs, Behavior of Controllers Error Analysis - Type number, Characteristic Equation, Poles and Zeroes concept, Error Analysis and performance criterion Stability analysis Routh Hurwitz stability criteria, Root Locus Controller design using time response analysis Proportional, integral, derivative controllers, P, PI, and PID Control Actions and Mathematical models Frequency domain analysis Polar Plot, Nyquist Plot, Bode Plot Text books 1.Modern control engineering ( 4th edition ) by Katsuhiko Ogata 2.Control systems engineering by I.J Nagrath and M.Gopal 3.Control systems: The state variable approach conventional and matlab

ESD 612 Embedded Software Engineering This Module focuses on the Automotive Software Architecture, Design, Test and Modeling ToolsESD612 Embedded Software Engineering Unit 1: Software Engineering Principles: Introduction, Software Processes, Software Requirements, System Models, Component based Software Engineering, Verfication and Validation, Software Testing. (Text Book 1) Unit 2: Critical Systems: Critical System Specification, Critical Systems Development, Critical System Validation, Software Cost Estimation. (Text Book 1) Unit 3: Basic Real Time Concepts: Terminology, Real Time System Design Issues, Example Real Time Systems, Common Misconceptions, Brief History. (Text Book 2)

Page 15 of 19

MS AES(Syllabus)

Unit 4: Hardware Considerations: Basic Architecture, Hardware Interfacing, Central Processing Unit, Memory, Input/Output, Enhancing Performance, Other Special Devices, Non Von Neumann Architectures. (Text Book 2) Unit 5: Real Time Operating Systems: Real Time Kernels, Theoretical Foundations of Real Time Operating Systems, Intertask Communication and Synchronization, Memory Management. (Text Book 2) Unit 6: Software Requirements Engineering for Embedded Systems: Requirements-Engineering Process, Types of Requirements, Requirements Specification for Real Time Systems, Formal Methods in Software Methods, Structured Analysis and Design, Object Oriented Analysis and the Unified Modeling Language, Organizing the Requirements Document, Organizing and Writing Requirements, Requirements Validation and Review. (Text Book 2) Unit 7: Software System Design: Properties of Software, Basic Software Engineering Principles, The Design Activity, Procedural Oriented Design, Object Oriented Design. (Text Book 2) Unit 8: Programming Languages and the Software Production Process: Introduction, Assembly Language, Procedural Languages, Object Oriented Languages, Coding Standards. (Text Book 2) Unit 9: Performance Analysis and Optimization: Theoretical Preliminaries, Performance Analysis, Application of Queuing Theory, I/O Performance, Performance Optimization, Results from Compiler Optimization, Analysis of Memory Requirements, Reducing Memory Utilization. (Text Book 2) Unit 10: Engineering Considerations: Metrics, Faults, Failures and Bugs, Fault Tolerance, Systems Integration, Refactoring Real Time Code, Cost Estimation using COCOMO. (Text Book 2) Text Books: 1. Sommerville, Software Engineering, Pearson Education, 8th Edition, India. 2. Philip A Laplante, Real Time Systems Design and Analysis, Third Edition, Wiley Publications.

ESD 614 Device Drivers 1.0 Kernel and Device Drivers 1.1. Components of the Kernel 1.2. User Space vs. Kernel Space 1.3. Device Drivers and Advantages of Modules 1.4. Types of Devices Linux Kernel: Sources and Installation 1.5. Installing the Kernel Source 1.6. lilo and Boot-up Sequence 1.7. Configuring and installing the Kernel Linux Kernel: Methods 1.8. System Calls vs. Library Functions 1.9. How System Calls are Made 1.10. Scheduling Algorithms 1.11. IPC: Message Queues, Semaphores and Shared Memory 1.12. Locking Mechanisms

Page 16 of 19

MS AES(Syllabus)

1.13. Atomic Functions and Semaphores Linux Kernel: Threads 1.14. Multi-threading under Linux Modules 1.15. Module Utilities, Finding Modules, Compiling a Module, Kernel Versions 1.16. Exporting Symbols, using Non-exported Symbols and System Calls From Modules Debugging Techniques 1.17. Error Numbers, Printk, Using IOCTLS: Querying the Driver 1.18. Proc Entry, Tracing, Debugger and kdb, kgdb, kgdb Demonstration Character Devices Memory Management 1.19. Virtual and Physical Memory 1.20. Page Tables, Caching, Swapping, Block Buffering, Mapping Functions User and Kernel Space 1.21. put (get)_user and copy_to (from)_user Memory Allocation 1.22. kmalloc: Small allocations, get_free_pages: Allocating pages at a time, vmalloc: Large allocations IOCTLS 1.23. Calling Ioctls, Driver Entry point for Ioctls, Defining Ioctls Interrupt Handling 1.24. Installing an Interrupt Handler, Enabling/Disabling Interrupts, Auto-detecting IRQs 2.0 Direct Memory Access (DMA) Reference Books Linux Device Drivers (Nutshell Handbook) Alessandro Rubini - O'Reilly Publishers ESD 616ESD616 Control Systems Modeling & Simulation 1. Control System Introduction 2. Controller Design The design problem, Preliminary Considerations of Classical Design, Realization of Basic Compensators, Cascade Compensation in time Domain, Cascade Compensation in frequency Domain 3. Tuning of PID Controllers Feedback Compensation, Robust Control System Design. 4. Digital Control Systems Introduction, Spectrum Analysis of Sampling Process, Signal Reconstruction, Difference Equations, The Z transform, The Z transfer Function, The Inverse Z transform and Response of Linear Discrete time Systems, The Inverse Z transform Analysis of Sampled data Control Systems, The Z and S domain Relationship, Stability analysis, Compensation Techniques

Control Systems Modeling & Simulation

Page 17 of 19

MS AES(Syllabus)

5. State Variable Analysis and Design Introduction, Concepts of State, State Variables and State Model, State Model for Linear Continuous-time Systems, State Variables and Linear Discrete time systems, Diagonalization, Solution of State Equations, concept of Controllability and Observability, Pole placement by State Feedback, Observer Systems 6. Nonlinear Systems Introduction, common Physical Nonlinearities, The Phase plane Method: Basic Concepts, Singular Points, stability of Nonlinear Systems, construction of Phase- Trajectories, The Describing function Method: Basic Concepts, Derivation of Describing Functions, stability analysis by Describing Function Method, Jump resonance, lipunovs Stability Criterion 7. Introduction to control of speed and position. 8. Introduction to motion, pressure, temperature and other sensors used in control engineering. 9. Motors and Actuators; DC Motors; AC Motors; Modeling electromechanical systems; Stepper motors;, Motor Drives; DC motor drives - lower power and Servomotor drives; Lower power variable speed AC motor drives; Brushless DC motors. 10.Electro-hydraulic actuators; Servovalves; Hydraulic actuators; Modeling of Electro-hydraulic actuators; Electro-hydrostatic actuators; Modeling of Electro-hydrostatic actuators; Feedback control of Servos; Stability; Design of Servo-systems. Text book 1. Control Systems Engineering ,Nagrath I.J,Gopal M, new Age International Reference Books 1. System Modeling,Nagrath.I.J,Gopal M. 2. Control System principles and Design M Gopal 2nd edition TMH 2003 3. Modern Control Engineering ,Ogata Katsuhiko,PHI,2004 4. Control System Engineering ,Norman S. Nise 5. System Dynamics,Ogata,3e,1998 6. Analog and Digital Control System design, C. T. Chen, Saunders College Pub.

ESD 618 Design using MicrocontrollersESD618 / DES612.2 / EDA610.1 Design using Microcontrollers Objectives: To understand basic microcontroller architecture and operation, to be able to interface a microcontroller with the outside world, and to be able to program a microcontroller using both assembly language and C to implement a given design. Course Outcome: 1. Describe the fundamentals of microcontroller organization and operation. Show the transfer of information, from register to register to memory for each instruction. 2. Develop an understanding of embedded system design life cycle and co design concept. 3. Deal with the internal architecture and design methodology of a microcontroller based embedded system. 8051 MICROCONTROLLER 8051 Micro controller hardware- I/O pins, ports and circuits- External memory -Counters and Timers-Serial Data I/O- Interrupts-Interfacing to external memory and 8255.

Page 18 of 19

MS AES(Syllabus)

8051 PROGRAMMING AND APPLICATIONS 8051 instruction set - Addressing modes - Assembly language programming - I/O port programming -Timer and counter programming - Serial Communication Interrupt programming -8051 Interfacing: LCD, ADC, Sensors, Stepper Motors, Keyboard and DAC.MOTOROLA 68HC11 MICROCONTROLLERS Instructions and addressing modes operating modes Hardware reset Interrupt system Parallel I/O ports Flags Real time clock Programmable timer pulse accumulator serial communication interface A/D converter hardware expansion Assembly language Programming HIGH PERFORMANCE RISC ARCHITECTURE: ARM The ARM architecture ARM assembly language program ARM organization and implementation The ARM instruction set - The thumb instruction set ARM CPU cores.


I/O Devices - Device I/O Types and Examples Synchronous - Iso-synchronous and Asynchronous Communications from Serial Devices - Examples of Internal SerialCommunication Devices - UART and HDLC - Parallel Port Devices - Sophisticated interfacing features in Devices/Ports- Timer and Counting Devices - 12C, USB, CAN and advanced I/O Serial high speed buses- ISA, PCI, PCI-X, cPCI and advanced buses. Reference Books 1. Muhammad Ali Mazidi, Janice Gillispie mazidi. The 8051 Microcontroller and Embedded systems, Person Education, 2004. 2. Valvano "Embedded Microcomputer Systems" Thomson Asia PVT LTD first reprint 2001 3. Steave Furber, ARM system on chip architecture Addison Wesley, 2000. 4. Rajkamal, Embedded Systems Architecture, Programming and Design, TATA McGraw-Hill, First reprint Oct. 2003 5. Alam Clements, Principles of Computer Hardware Oxford University press, Fourth Edition 2006. 6. Wayne Wolf, Computers as Components: Principles of Embedded Computing System Design, Morgan Kaufman Publishers, 2001 7. Steve Heath, Embedded System Design, Elserien, Second Edition, 2004.

Page 19 of 19