moderated by john blyler, editor, chip design magazine
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Moderated By John Blyler, Editor, Chip Design Magazine. My Background. BS Engineering Physics, MS EE (Digital and RF) Engineering Background 18 years, complex hardware-software systems Teaching Background Affiliate Professor – PSU, Systems Engineering - PowerPoint PPT PresentationTRANSCRIPT
DAC 2006
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Moderated ByJohn Blyler, Editor, Chip Design
Magazine
Moderated ByJohn Blyler, Editor, Chip Design
Magazine
DAC’06 Reining in time-to-market for next-generation embedded designs 04/21/23 - 2
My BackgroundMy Background
• BS Engineering Physics, MS EE (Digital and RF) • Engineering Background
– 18 years, complex hardware-software systems• Teaching Background
– Affiliate Professor – PSU, Systems Engineering– Short courses for NSA on Technical Risk Assessment
• Print/Online Media Background– Editorial Director:
• Chip Design magazine (www.chipdesignmag.com) • Embedded Intel magazine (www.embeddedintel.com)• Design Trends Reports – Sep’06
– Previously:• Senior Tech Editor – Wireless Systems mag• Freelance, Edutopia magazine and others• Associate Editor, IEEE I&M magazine• Book author, IEEE Press
• Contact: [email protected], (503) 614-1082
DAC’06 Reining in time-to-market for next-generation embedded designs 04/21/23 - 3
Embedded Designs: Broad Challenges At 65nmEmbedded Designs: Broad Challenges At 65nm
• Chip Design mantra:– Power, Performance, Area and Cost
• Power and Performance– Key technical parameters
• Area and Cost– Drivers for deeply embedded, high volume
consumer market– $1.25 billion units by 2008
DAC’06 Reining in time-to-market for next-generation embedded designs 04/21/23 - 4
65nm Issues with Implementing Embedded Processor Designs:
65nm Issues with Implementing Embedded Processor Designs:• Deeply embedded CPU system
– Performance must balance cost• Proven solution
– Shrink geometries (65nm)– Lower power, increase performance, lower area– But increase complexity• Bus centric and multiple core-memory
architectures
• At submicron designs:– Proven reference methodology– Lots of IP
DAC’06 Reining in time-to-market for next-generation embedded designs 04/21/23 - 5
Today’s Panel Discussion FlowToday’s Panel Discussion Flow
• Chartered Semi: Nanometer flow for today’s designs
• ARM PIPD: Supporting processes with library development and qualification
• ARM: New and upcoming processor architectures
• Magma: Importance of reference methodologies• Broadcom: Actual implementation of reference
methodology and Cortex R4 processor
• Followed by Q&A and more.