modeling jitter in continuous-time ΣΔ · • for an accurate simulation: t. step
TRANSCRIPT
![Page 1: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/1.jpg)
Ahmed Ashry
Hassan Aboushady
Modeling Jitter in Continuous-Time ΣΔ
Modulators
![Page 2: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/2.jpg)
Outline• Introduction
• Existing Solutions.
• Proposed Technique.
• Real Simulator.
• Validation.
• Conclusions.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 2
![Page 3: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/3.jpg)
Outline• Introduction
• Existing Solutions.
• Proposed Technique.
• Real Simulator.
• Validation.
• Conclusions.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 3
![Page 4: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/4.jpg)
Clock Jitter Effect on ΣΔ Modualtor
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 4
SNR
![Page 5: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/5.jpg)
Jitter SimulationTj / Ts ~ 0.001
• For an accurate simulation:
Tstep << Tj
Tstep ~ 0.0001 Ts
• This means that 10,000 simulation points are needed in a single clock cylcle.
• Very slow and expensive simulation!
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 5
Tj Jitter deviations.Ts Sampling Time.
Tstep Simulation step.
![Page 6: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/6.jpg)
Outline• Introduction
• Existing Solutions.
• Proposed Technique.
• Real Simulator.
• Validation.
• Conclusions.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 6
![Page 7: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/7.jpg)
Modeling Jitter as Additive Noise• Traditionally used to
simplify jitter analysis.
• Replace “Jittered” DAC with an ideal DAC + jitter noise.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 7
![Page 8: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/8.jpg)
Discrete-Time Simulation• Suggested by [Benabes-01]
• Find discrete-time equivalent.
• Approximate jitter pulses to ideal impulses.
• Very fast (Tstep = Ts ).
• Not flexible:– Tedious analytical effort.
– Difficult to add non-idealities.
– Not SPICE compatible.
[Benabes-01] P. Benabes and R. Kielbasa, “Fast clock-jitter simulation in continuous-time delta-sigma modulators,” in Proc. IEEE 18th Instrumentation and Measurement Technology Conference, (IMTC’01), vol. 3, May 2001,.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 8
![Page 9: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/9.jpg)
Outline• Introduction
• Existing Solutions.
• Proposed Technique.
• Real Simulator.
• Validation.
• Conclusions.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 9
![Page 10: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/10.jpg)
Proposed Technique• Jitter noise is defined as a
difference:
• For small time shift, difference can be approximated to a differentiation:
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 10
( ) ( ) ( )jj t h t h t= −
( ) ( ) ( ) ( )j jdj t h t h t T h tdt
= − ≈
![Page 11: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/11.jpg)
Proposed Block Diagram• Differentiator is added to the DAC output.
• Random variable generator (new value each cycle)
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 11
![Page 12: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/12.jpg)
Output Waveforms
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 12
![Page 13: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/13.jpg)
Outline• Introduction
• Existing Solutions.
• Proposed Technique.
• Real Simulator.
• Validation.
• Conclusions.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 13
![Page 14: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/14.jpg)
Real Simulator• Ideally, the DAC
output is a square wave.
• But, due to finite time-step, it appears as a trapezoidal.
• Is this a problem?
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 14
![Page 15: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/15.jpg)
Real Simulator• Figure on the right shows
spectrum of:– Ideal impulse.
– Triangle pulse of width 2Tstep
– Pulse of Tj width.
• In all cases the spectrum is almost flat in the Nyquist band.
• Should give the same results
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 15
![Page 16: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/16.jpg)
Outline• Introduction
• Existing Solutions.
• Proposed Technique.
• Real Simulator.
• Validation.
• Conclusions.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 16
![Page 17: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/17.jpg)
Simulation Results• Figure shows jitter effect on SNR using 3 methods:
– Traditional method (Very slow).
– Discrete-Time method [Benabes-01].
– Proposed method.
• Good agreement.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 17
![Page 18: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/18.jpg)
Comparison
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 18
Traditional methodDiscrete-Time
[Benabes-01]Proposed method
Simulation Nature Continuous-Time Discrete-Time Continuous-Time
Simulation time needed to
produce the above figure
Very Slow
(10 hours)
Very fast
(10 seconds)
Fast
(10 minutes)
Possibility to model circuit
non-idealitiesEasily modeled Very limited Easily modeled
Spice compatibility Compatible Not Compatible Compatible
![Page 19: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/19.jpg)
Conclusions• Clock jitter is a performance limitation of CT ΣΔ
modulators.
• Jitter simulation is very slow.
• A fast and continuous-time based simulation technique is proposed.
• The proposed technique is valid even for finite-step simulators.
• Simulation results shows good agreement between proposed method and traditional methods.
• The proposed technique is a compromise between simulation speed and model flexibility.
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 19
![Page 20: Modeling Jitter in Continuous-Time ΣΔ · • For an accurate simulation: T. step](https://reader034.vdocuments.mx/reader034/viewer/2022042621/5f775252199d03252721d507/html5/thumbnails/20.jpg)
May 2010FIR-based CT ΣΔ Modulators,
A. Ashry, H. Aboushady 20
Thank you
Questions?