ee247 lecture 26 - university of california, berkeleyee247/fa05/lectures/l26_2_f05.pdfee247 lecture...

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EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 1 EE247 Lecture 26 • Administrative – Final exam: • Date: Tues. Dec. 13 th • Time: 12:30pm-3:30pm Location: 285 Cory Office hours this week: Tues: 2:30p to 3:30p Wed: 1:30p to 2:30p (extra) Thurs: 2:30p to 3:30p Closed book/course notes No calculators/cell phones/PDAs/Computers You can bring two 8x11 paper with your own notes Final exam covers the entire course material EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 2 EE247 Lecture 26 Higher order ΣΔ modulators Last lecture Cascaded ΣΔ modulators (MASH) This lecture Bandpass ΣΔ modulators This lecture Forward path multi-order filter Example: 5 th order Lowpass ΣΔ – Modeling – Noise shaping – Effect of various nonidealities on the ΣΔ performance

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Page 1: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 1

EE247Lecture 26

• Administrative– Final exam:

• Date: Tues. Dec. 13th

• Time: 12:30pm-3:30pm• Location: 285 Cory• Office hours this week: Tues: 2:30p to 3:30p

Wed: 1:30p to 2:30p (extra)Thurs: 2:30p to 3:30p

• Closed book/course notes• No calculators/cell phones/PDAs/Computers

• You can bring two 8x11 paper with your own notes• Final exam covers the entire course material

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 2

EE247Lecture 26

• Higher order ΣΔ modulators– Last lecture Cascaded ΣΔ modulators (MASH)

– This lecture Bandpass ΣΔ modulators– This lecture Forward path multi-order filter

• Example: 5th order Lowpass ΣΔ – Modeling– Noise shaping– Effect of various nonidealities on the ΣΔ

performance

Page 2: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 3

Bandpass ΔΣ Modulator

+

_vIN

dOUT

DAC

• Replace the integrator in 1st order lowpass ΣΔ with a resonator

2nd order bandpass ΣΔ

Resonator

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 4

Bandpass ΔΣ ModulatorMeasured output for a bandpass ΣΔ (prior to digital filtering)

Key Point:

NTF notch type shape

STF bandpass shape

Ref: Paolo Cusinato, et. al, “A 3.3-V CMOS 10.7-MHz Sixth-Order Bandpass Modulator with 74-dB Dynamic Range “, ΙΕΕΕ JSSCC, VOL. 36, NO. 4, APRIL 2001

Input SinusoidQuantization Noise

Page 3: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 5

Bandpass ΣΔ Characteristics• Oversampling ratio defined as fs/2B where B =

STF -3dB bandwidth

• Typically, sampling frequency is chosen to be fs=4xfcenter where fcenter=bandpass filter center frequency

• STF has a bandpass shape while NTF has a notch shape

• To achieve same resolution as lowpass, need twice as many integrators

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 6

Bandpass ΣΔ Modulator Dynamic RangeAs a Function of Modulator Order (K)

• Bandpass ΣΔ resolution for order K is the same as lowpass ΣΔ resolution with order L= K/2

K=415dB/Octave

K=621dB/Octave

K=29dB/Octave

Page 4: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 7

Example: Sixth-Order Bandpass ΣΔ Modulator

Ref: Paolo Cusinato, et. al, “A 3.3-V CMOS 10.7-MHz Sixth-Order Bandpass Modulator with 74-dB Dynamic Range “, ΙΕΕΕ JSSCC, VOL. 36, NO. 4, APRIL 2001

Simulated noise transfer function Simulated signal transfer function

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 8

Example: Sixth-Order Bandpass ΣΔ Modulator

Ref: Paolo Cusinato, et. al, “A 3.3-V CMOS 10.7-MHz Sixth-Order Bandpass Modulator with 74-dB Dynamic Range “, ΙΕΕΕ JSSCC, VOL. 36, NO. 4, APRIL 2001

Features & Measured Performance Summary

Page 5: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 9

Higher Order Lowpass ΣΔ ModulatorsForward Path Multi-Order Filter

• Zeros of NTF (poles of H(z)) can be positioned to flatten baseband noise spectrum• Main issue Ensuring stability for 3rd and higher orders

( ) 1( ) ( ) ( )1 ( ) 1 ( )

H zY z X z E zH z H z

= ++ +

Σ

E(z)

X(z) Y(z)( )H z Σ

Y( z ) 1NTF

E( z ) 1 H( z )= =

+

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 10

Overview

• Building behavioral models in stages

• A 5th-order, 1-Bit ΣΔ modulator– Noise shaping – Complex loop filters– Stability– Voltage scaling– Effect of component non-idealities

Page 6: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 11

Building Models in Stages• When modeling a complex system like a 5th-order ΣΔ modulator, model

development proceeds in stages– Each stage builds on its predecessor

• Design goal detect and eliminate problems at the highest possible level of abstraction

– Each successive stage consumes progressively more engineering time

• Our ΣΔ model development proceeds in stages:– Stage 0 gets to the starting line: Collect references, talk to veterans– Stage 1 develops a practical system built with ideal sub-circuits & simulated– Stage 2 models key sub-circuit non-idealities and translates the results into

real-world sub-circuit performance specifications – Real-world model development includes a critical stage 3: Adding elements to

earlier stages to model significant surprises found in silicon

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 12

Stage 1• In stage 1, we’ll study a model for a practical ΣΔ

modulator topology built with ideal blocks

• Stage 1 model focus– Signal amplitudes– Stability

• Identifying worst-case inputs• Unstable systems can’t graduate to stage 2

– Quantization noise shaping • Verify performance and functionality for all regions of

operation, find and test worst-case inputs• Determine appropriate performance metrics and build

the software infrastructure

Page 7: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 13

ΣΔ Modulator Design• Procedure

– Establish requirements– Design noise-transfer function, NTF– Determine loop-filter, H– Synthesize filter– Evaluate performance, – Establish stability criteria

Ref: R. W. Adams and R. Schreier, “Stability Theory for ΔΣ Modulators,” in Delta-Sigma Data Converters- S. Norsworthy et al. (eds), IEEE Press, 1997

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 14

Example: Modulator Specification

• Example: Audio ADC– Dynamic range DR 18 Bits– Signal bandwidth B 20 kHz– Nyquist frequency fN 44.1 kHz– Modulator order L 5– Oversampling ratio M = fs/fN 64– Sampling frequency fs 2.822 MHz

• The order L and oversampling ratio M are chosen based on– SQNR > 120dB

Page 8: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 15

Modulator Block Diagram

( ) ( )STF( ) 1 ( )( ) 1NTF( ) 1 ( )

Y z H zX z H zY zE z H z

= =+

= =+

Approach:Design NTF and solve for H(z)

Loop FilterH(z)Σx(kT) y(kT)Comparator

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 16

Noise Transfer Function, NTF(z)% stop-band attenuation Rstop ...

Rstop = 80; [b,a] = cheby2(L, Rstop, 1/M, 'high');

% normalize b = b/b(1); NTF = filt(b, a, 1/fs);

10 4 106-100

-80

-60

-40

-20

0

20

Frequency [Hz]

NTF

[dB

]

Page 9: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 17

Loop-Filter, H(z)

( ) 1NTF( ) 1 ( )

1( ) 1

Y zE z H z

H zNFT

= =+

→ = −

104 106-20

0

20

40

60

80

100

Frequency [Hz]

Loop

filte

r H

[dB

]

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 18

Modulator TopologySimulation Model

Q

I_5I_4I_3I_2I_1

Y

b2b1

a5a4a3a2a1

K1 z -1

1 - z -1

I1

gDAC Gain Comparator

X

-1

1 - z -1

I2

K2 z -1

1 - z -1

I3

K3 z -1

1 - z -1

I4

K4 z -1

1 - z -1

I5

K5 z

+1-1

Filter

Page 10: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 19

Rounded Filter Coefficients

a1=1;

a2=1/2;

a3=1/4;

a4=1/8;

a5=1/8;

k1=1;

k2=1;

k3=1/2;

k4=1/4;

k5=1/8;

b1=1/1024;

b2=1/16-1/64;

g =1;

Ref: Nav Sooch, Don Kerth, Eric Swanson, and Tetsuro Sugimoto, “Phase Equalization System for a Digital-to-Analog Converter Using Separate Digital and Analog Sections”, U.S. Patent 5061925, 1990, figure 3 and table 1

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 20

5th Order Noise Shaping

• Mostly quantization noise, except at low frequencies

• Let’s zoom into the baseband portion…

0 0.1 0.2 0.3 0.4 0.5-160

-140

-120

-100

-80

-60

-40

-20

0

20

40

Frequency [ f / fs ]

Out

put S

pect

rum

[dB

WN

]/ In

t. N

oise

[dB

FS]

Output SpectrumIntegrated Noise (20 averages)

Signal

Notice tones around fs/2

Page 11: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 21

5th Order Noise Shaping

0 0.2 0.4 0.6 0.8 1-160

-140

-120

-100

-80

-60

-40

-20

0

20

40

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BFS

]

Output SpectrumIntegrated Noise (20 averages)

Quantization noise -130dBFS at band edge!Signal

Band-Edge

Frequency [ f / fN ]

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 22

5th Order Noise Shaping

sigma_delta_L5.m

• SQNR > 120dB

• Sigma-delta modulators are usually designed for negligible quantization noise

• Other error sources dominate, e.g. thermal noise

0 0.2 0.4 0.6 0.8 1-160

-140

-120

-100

-80

-60

-40

-20

0

20

40

Frequency [f / fN]

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BFS

]

Output SpectrumIntegrated Noise (20 averages)

Digital decimation filter removes out-of-band quantization noise

Page 12: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 23

0 0.2 0.4 0.6 0.8 140

60

80

100

120

140M

agni

tude

[dB

] Loop Filter

0 0.2 0.4 0.6 0.8 1-100

0

100

200

300

400

Frequency [f/fN]

Phas

e [d

egre

es]

In-Band Noise Shaping

• Lot’s of gain in the pass-band

• Remember that• NTF ~ 1/H•STF=H/(1+H)

0 0.2 0.4 0.6 0.8 1-160

-120

-80

-40

0

40

Frequency [f/fN]

Out

put S

pect

rum

Output SpectrumIntegrated Noise (20 averages)

|H(z)| maxima align up with noise minima

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 24

Stability Analysis

• Approach: linearize quantizer and use linear system theory!• Effective quantizer gain

• Obtain Geff from simulation

222

yGeff q

=

H(z)Σ Σ

Quantizer Model

QuantizationError e(kT)

x(kT) y(kT)Geffq(kT)

Page 13: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 25

Modulator Root-Locus

• As Geff increases, poles of STF move from

• poles of H(z) (Geff = 0) to • zeros of H(z) (Geff = ∞)

• Pole-locations inside unit-circle correspond to stable STF and NTF

• Geff > 0.45 for stability

Geff = 0.45

z-Plane Root Locus

0.6 0.7 0.8 0.9 1 1.1-0.4

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0.4 Increasing Geff

Unit Circle

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 26

Effective Quantizer Gain, Geff

• Large inputs comparator input grows• Output is fixed (±1)

Geff dropsmodulator unstable for large inputs

• Solution:• Limit input amplitude• Detect instability (long sequence

of +1 or -1) and reset integrators• Beware of “worst-case inputs”

(e.g. square waves near high-Q poles – attenuate with anti-aliasing filter)

• Note that signals grow slowly for nearly stable systems use long simulations

-40 -35 -30 -25 -20 -15 -10 -5 0 500.20.40.60.81

1.21.41.61.82

Input [dBV]

Effe

ctiv

e Q

uant

izer

Gai

n

stable unstable

Geff =0.45

Page 14: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 27

-40 -35 -30 -25 -20 -15 -10 -5 0

-20

-15

-10

-5

0

5

10

i1i2i3i4i5q

Input [dBV]

Loop

filte

r pea

k vo

ltage

s [V

]

Internal Node Voltages

• Internal signal amplitudes are weak function of input level (except near overload)

• Maximum peak-to-peak voltage swing approach +-10V! Exceed supply voltage!

• Solutions:• Reduce Vref ??• Node scaling

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 28

Internal Node Voltage Scaling

• If we scale filter k1 by 0.1,– All state variables and Q scale by 0.1– But since the comparator output is fixed and input is

decreased by 10, G increases 10X

• The change in k1 doesn’t change the shape of the root locus, either– The effective gain for each root position is increased 10X– Gnew=10XGold Gnew > 4.5 is thus required to ensure stability

Page 15: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 29

5th Order Modulator – ScalingOnly the sign of Q matters,so we can make k1 whatever we wantwithout changing the 1-Bit data at all

Q

I_5I_4I_3I_2I_1

Y

b2b1

a5a4a3a2a1

K1 z -1

1 - z -1

I1

gDAC Gain Comparator

X

-1

1 - z -1

I2

K2 z -1

1 - z -1

I3

K3 z -1

1 - z -1

I4

K4 z -1

1 - z -1

I5

K5 z

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 30

Loop Voltage Scaling (cont.)• Note that ∫3, ∫4, and ∫5 have substantially

larger swings than ∫1 and ∫2

• Just about any filter topology allows node scaling which change internal state variable amplitudes without changing the filter output (recall filter node scaling)– The next slide shows an example

Page 16: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 31

Node Scaling Example:3rd Integrator Output Voltage Scaled by α

K3 * α, b1 /α, a3 / α, K4 / α, b2 * αVnew=Vold* α

Q

I_5I_4I_3I_2I_1

Y

b2b1

a5a4a3a2a1

K1 z -1

1 - z -1

I1

gDAC Gain Comparator

X

-1

1 - z -1

I2

K2 z -1

1 - z -1

I3

K3 z -1

1 - z -1

I4

K4 z -1

1 - z -1

I5

K5 z

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 32

Voltage Scaling

-40 -35 -30 -25 -20 -15 -10 -5 0-1.5

-1

-0.5

0

0.5

1

1.5

Input [dBV]

Loop

filte

r pea

k vo

ltage

s [V

]

k1=1/10;k2=1;k3=1/4;k4=1/4;k5=1/8;a1= 1; a2=1/2;a3=1/2; a4=1/4;a5=1/4;b1=1/512;b2=1/16-1/64;g =1;

• Integrator output range is fine now• But: maximum input signal limited to -5dB (-7dB with safety) – fix?

Page 17: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 33

Input Range ScalingIncreasing the DAC levels by g reduces the analog to digital conversion gain:

Increasing vIN & g by the same factor leaves 1-Bit data unchanged

gzgHzH

zVzD

IN

OUT 1)(1

)()()( ≅

+=

Loop FilterH(z)ΣvIN

dOUT+1 or -1Comparator

g

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 34

Input Range Scaling• Scaling the DAC output levels adjusts the

modulator input range

– If VIN and the DAC outputs are scaled up by the same factor g, the 1-Bit data is completely unchanged

– Note that increasing the range also increases the quantization noise the dynamic range and peak SQNR remain constant!

– If the DAC output levels are increased and the analog full scale is held constant, the stability margin improves … at the expense of reduced SQNR

Page 18: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 35

Scaled Stage 1 Model

g = 2.5;

-40 -35 -30 -25 -20 -15 -10 -5 0-1.5

-1

-0.5

0

0.5

1

1.5

Input [dBV]

Loop

filte

r pea

k vo

ltage

s [V

]

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 36

Scaled Stage 1 Model

2dB safety margin for stability

-40 -35 -30 -25 -20 -15 -10 -5 0 50

1

2

3

4

5

6

7

8

Input [dBV]

Effe

ctiv

e Q

uant

izer

Gai

n

Geff=4.5stable unstable

Page 19: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 37

5th Order ModulatorFinal Parameters

±2.5V

Stable input range ~ ±1V

1/10 1 1/4 1/4 1/8

1/512 1/16-1/64

1 12 1/2 1/4 1/4

Stable input range~ ±1V

Q

I_5I_4I_3I_2I_1

Y

b2b1

a5a4a3a2a1

K1 z -1

1 - z -1

I1

gDAC Gain Comparator

X

-1

1 - z -1

I2

K2 z -1

1 - z -1

I3

K3 z -1

1 - z -1

I4

K4 z -1

1 - z -1I5

K5 z

1

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 38

Summary• Stage 1 model verified –

stable and meets SQNR specification

• Stage 2 issues in 5th order ΣΔ modulator– DC inputs– Spurious tones– Dither– kT/C noise

Page 20: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 39

0 0.5 1 1.5-150

-100

-50

0

50

Frequency [MHz]

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BV

]

Output SpectrumIntegrated Noise (30 averages)

5th Order Noise Shaping

Input: 0.1V, sinusoid215 point DFT30 averages

Note: Large spurious tonesin the vicinity of fs/2

Let us check whether tones appear inband?

Tones at fs/2-Nfin exceed input level

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 40

0 10 20 30 40 50-150

-100

-50

0

50

Frequency [kHz]

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BV

]

Output SpectrumIntegrated Noise (30 averages)

In-Band Noise

In-Band quantization noise:–120dB !

Note: No in-band tones!While Large spurious tones appear in the vicinity of fs /2

Page 21: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 41

0 0.5 1 1.5-150

-100

-50

0

50

Frequency [MHz]

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BV

]

Output SpectrumIntegrated Noise (30 averages)

5th Order Noise Shaping

Input: 0.1V, sinusoid215 point DFT30 averages

Note: Digital filter required attenuation function of tones in the vicinity of fs/2 & in-band quantization noise

150dB stopband attenuation neededto attenuate unwanted fs/2-Nfin componentsdown to the in-band quantization noise level

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 42

Out-of-Band vs In-Band Signals• A digital (low-pass) filter with suitable

coefficient precision can eliminate out-of-band quantization noise

• No filter can attenuate unwanted in-band components without attenuating the signal

• We’ll spend some time making sure the components at fs/2-Nfin will not “mix” down to the signal band

• But first, let’s look at the modulator response to small DC inputs (or offset) …

Page 22: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 43

ΣΔ Tones Generated by Small DC Input Signals

5mV DC input(VDAC 2.5V)

Simulation technique:A random 1st sample randomizes the noise from DC input and enables averaging. Otherwise the small tones will not become visible.

0 10 20 30 40 50-150

-100

-50

0

50

Frequency [kHz]

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BV

]

6kHz12kHz

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 44

Limit Cycles• Representing a DC term with a –1/+1 pattern … e.g.

• Spectrum:

⎪⎪⎪

⎪⎪⎪

⎪⎪⎪

⎪⎪⎪

++−+−+−+−+−→

444444444 3444444444 21

44444444 344444444 21321321321321321

111

0

54321

1 1 1 1 1 1 1 1 1 1 1111

K11

311

211

sss fff

Page 23: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 45

Limit Cycles• The frequency of the tones are indeed quite predictable

– Fundamental

– Tone velocity (useful for debugging)

– Note: For digital audio in this case DC signal>20mV generates tone with fδ >24kHz out-of-band no problem

DCs

DAC

Vf f

V5mV

3MHz2.5V

6kHz

δ =

=

=

s

DC DAC

DC

df f

dV V

df1.2kHz/mV

dV

δ

δ

=

=

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 46

1.47 1.48 1.49 1.5-150

-100

-50

0

50

Frequency [MHz]

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BV

]

Output SpectrumIntegrated Noise (30 averages)

ΣΔ Spurious TonesEffect of Small DC Input @ Vicinity of fs /2

6kHz

Page 24: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 47

ΣΔ Spurious Tones• In-band spurious tones look like signals

• Can be a major problem in some applications– E.g. audio even tones with power below the quantization

noise floor can be audible

• Spurious tones near fs/2 can be aliased down into the signal band– Since they are often strong, even a small amount of aliasing

can create a major problem– We will look at mechanisms that alias tones later

• First let’s look at dither as a means to reduce or eliminate in-band spurious tones

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 48

Dither• DC inputs can be represented by many possible bit

patterns

• Including some that are random (non-periodic) but still average to the desired DC input

• The spectrum of such a sequence has no spurious tones

• How can we get a ΣΔ modulator to produce such “randomized” sequences?

Page 25: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 49

Dither• The target DR for our audio ΣΔ is 18 Bits, or 113dB• Designed SQNR~-120dB allows thermal noise to

dominate at -115dB level• Let’s choose the sampling capacitor such that it limits

the dynamic range:

( )

( )

212

2

2 12

1

1μV

FSFS

n

n FSDR

VDR V Vp

v

v V

= =

→ = =

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 50

5mV DC input

• Thermal noise added at the input of the 1st

integrator

• In-band spurious tones disappear

• Note: they are not just buried

• How can we tell?0 10 20 30 40 50-150

-100

-50

0

50

Frequency [kHz]

Out

put S

pect

rum

[dBW

N]

No ditherWith dither (thermal noise)

Effect of Dither on In-Band Spurious Tones

Page 26: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 51

Effect of Dither on Spurious Tones Near fs/2

Key point: Dither at an amplitude which eliminate the in-band tones has virtually no effect on tones near fs/2

1.47 1.48 1.49 1.5-150

-100

-50

0

50

Frequency [MHz]

Out

put S

pect

rum

[dB

WN

]

No ditherWith dither

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 52

kT/C Noise

• So far we’ve looked at noise added to the input of the ΣΔ modulator, which is also the input of the first integrator

• Now let’s add noise also to the input of the second integrator

• Let’s assume a 1/16 sampling capacitor value for the 2nd integrator wrt the 1st integrator– This gives 4μV rms noise

Page 27: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 53

kT/C Noise

• 5mV DC input

• Noise from 2nd integrator smaller than 1st integrator noise shaped

• Why?

0 1 2 3 4 5x 104

-150

-100

-50

0

50

Frequency [Hz]

Out

put S

pect

rum

[dBW

N]

/ In

t. N

oise

[dBV

]

No noise1st Integrator2nd Integrator

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 54

Effect of Integrator kT/C Noise

• Noise from 1st integrator is referred directly to the input• Noise from 2nd integrator is first-order noise shaped• Noise from subsequent integrators attenuated even further

Especially for high oversampling ratios, only the first 1 or 2 integrators add significant thermal noise. This is true also for other imperfections.

Q

I_5I_4I_3I_2I_1

Y

b2b1

a5a4a3a2a1

K1 z -1

1 - z -1

I1

gDAC Gain Comparator

X

-1

1 - z -1

I2

K2 z -1

1 - z -1

I3

K3 z -1

1 - z -1

I4

K4 z -1

1 - z -1

I5

K5 z

Page 28: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 55

Dither

No practical amount of dither eliminates the tones near fs/2

1.47 1.48 1.49 1.5-150

-100

-50

0

50

Frequency [MHz]

Out

put S

pect

rum

[dBW

N]

/ In

t. N

oise

[dBV

]

No noise1st Integrator2nd Integrator

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 56

Full-Scale Inputs• With practical levels of thermal noise added,

let’s try a 5kHz sinusoidal input near full-scale

• No distortion is visible in the spectrum– 1-Bit modulators are intrinsically linear– But tones exist at high frequencies

To the oversampled modulator, a sinusoidalinput looks like two “slowly” alternating DCs …hence giving rise to limit cycles

Page 29: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 57

0 0.5 1 1.5-150

-100

-50

0

50

Frequency [MHz]

Out

put S

pect

rum

[dBW

N]

Output SpectrumIntegrated Noise (30 averages)

Full-Scale Inputs

0 10 20 30 40 50-150

-100

-50

0

50

Frequency [kHz]

Out

put S

pect

rum

[dBW

N]

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 58

Recap

• Dither successfully removes in-band tones that would corrupt the signal

• The high-frequency tones in the quantization noise spectrum will be removed by the digital filter following the modulator

• What if some of these strong tones are demodulated to the base-band prior to digital filtering?

• Why would this happen?Vref Interference

Page 30: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 59

Vref Interference via Modulationx2(t)

x1(t) y(t)

( ) ( )( ) ( )

( ) ( ) ( ) ( )[ ]ttttXXtxtx

tXtxtXtx

212121

21

222

111

coscos2

coscos

ωωωω

ωω

−++=×

==

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 60

Modulation via DAC

DACy(t) v(t)

Vref

( )

( ) ( )

out

sref

ref

y t D 1

V 2.5V 1mV f /2 square wave

v t y t V

= =±

= +

= ×

Page 31: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 61

Modulation via DAC

0 fs/2 fs

DOUT spectrum

Vref spectruminterferer

convolution yields sum of red and green,mirrored tones and noise appear in band

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 62

0 10 20 30 40 50-150

-100

-50

0

50

Frequency [kHz]

Out

put S

pect

rum

[dB

WN

]

0V1μV1mV

60dB (1 dB/dB)

Vref Interference via Modulation

Key Point:In high resolution ΣΔmodulators Vref interference via modulation can significantly limit the maximum dynamic range

Page 32: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 63

Symmetry of the spectra at fs/2 and DC confirm that this is modulation

1.47 1.48 1.49 1.5x 10 6

-150

-100

-50

0

50

Frequency [Hz]

Out

put S

pect

rum

[dB

WN

]

0V1e-006V0.001V

0 1 2 3 4 5x 104

-150

-100

-50

0

50

Frequency [Hz]

Out

put S

pect

rum

[dB

WN

] 0V1e-006V0.001V

Vref Interference via Modulation

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 64

0 10 20 30 40 50-150

-100

-50

0

50

Frequency [kHz]

Out

put S

pect

rum

[dB

WN

]

0.006V0.012V

Vref Spurious Tone Velocity vs Native Tone Velocity

0.6kHz/mV

Vin = 6mV / 12mV DCVref = 2.5V DC

& 1mV fs/2

40dB shift for readability

Native tone

Aliased tone

• Native tone velocity

1.2kHz/mV

• Aliased tone velocity

0.6kHz/mV

Page 33: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 65

• Simulations performed to verify the effect of the DAC referencecontamination via output signal interference particularly in the vicinity of fs /2

• Interference modulates the high-frequency tones

• Since the high frequency tones are strong, a small amount (1μV) of interference suffices to create audible base-band tones

• Stronger interference (1mV) not only aliases spurious tones but elevated raises noise floor by aliasing high frequency quantization noise

• Amplitude of modulated tones is proportional to interference

• The velocity of modulated tones is half that of the native tones

• Such differences help debugging of silicon

• How clean does the reference have to be?

Vref Interference via Modulation

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 66

0 10 20 30 40 50-150

-100

-50

0

50

Frequency [kHz]

Out

put S

pect

rum

[dB

WN

] /

Int.

Noi

se [d

BV]

Output Spectrum (1μV interference on Vref)Integrated Noise (30 averages)

Vref Interference

Tone dominates noise floorw/o thermal noise

Page 34: EE247 Lecture 26 - University of California, Berkeleyee247/fa05/lectures/L26_2_f05.pdfEE247 Lecture 26 • Higher order ΣΔ modulators – Last lectureÆCascaded ΣΔ modulators (MASH)

EECS 247 Lecture 26: Oversampling Data Converters © 2005 H. K. Page 67

Summary• Our stage 2 model can drive almost all capacitor sizing

decisions– Gain scaling– kT/C noise– Dither

• Dither quite effective in the elimination of native in-band tones

• Extremely clean & well-isolated Vref is required for high-dynamic range applications e.g. digital audio

• Next we will add relevant component imperfections:

Effect of component nonlinearities on ΣΔ performance