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mipi m-phy hs-g4 2-lane · the samsung foundry mipi m-phy ip is a hard macro phy for the ufs...

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The Samsung Foundry MIPI M-PHY IP is a hard macro PHY for the UFS protocol. IO pads and ESD structures are included with extensive built-in self test features such as loopback and scan support. It offers a cost-effective and low-power solution. It builds on silicon-proven designs that are in volume production. MIPI M-PHY HS-G4 2-Lane Features • Samsung Foundry 10nm low power CMOS device technology • 1.8V, 0.85V dual power supply • Compliant to MPHY 4.1 specification • Supports HS-G1/HS-G2/HS-G3/HS-G4 Series A and B ( Series A: 1.248G, 2.496G, 4.992G, 9.984 Gbps Series B: 1.456G, 2.912G, 5.824G, 11.648 Gbps) • Channel Configuration for Data Lanes • Common (CMN) and 2 Data Lanes • Supports the following pre-emphasis levels • -1.5/3/6dB • 19.2M or 26MHz reference clock is required • Built-in self test capable of producing and checking PRBS random patterns HEADQUARTERS 2811 Mission College Blvd., 6th Floor Santa Clara, CA 95054 WWW.SILVACO.COM Rev 072120_02 71302 JAPAN [email protected] KOREA [email protected] TAIWAN [email protected] SINGAPORE [email protected] CHINA [email protected] CALIFORNIA [email protected] MASSACHUSETTS [email protected] TEXAS [email protected] EUROPE [email protected] FRANCE [email protected] For more information, please contact us at [email protected]. ©Copyright Silvaco, Inc. All rights reserved. Silvaco is a registered trademark of Silvaco, Inc. Samsung Foundry is a trademark of Samsung Electronics Co. Ltd. All other names mentioned herein are trademarks or registered trademark of their respective owners. All information provided is for reference purposes only and may be changed without notice. Deliverables • Front-end DK: Timing LIB, Verilog model, sample test bench • Back-end DK: Physical view LEF, GDSII layout, DRC, LVS • Documentation: Datasheet and user guide

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  • The Samsung Foundry MIPI M-PHY IP is a hard macro PHY for the UFS protocol. IO pads and ESD structures are included with extensive built-in self test features such as loopback and scan support. It offers a cost-effective and low-power solution. It builds on silicon-proven designs that are in volume production.

    MIPI M-PHY HS-G4 2-Lane

    Features • SamsungFoundry10nmlowpowerCMOSdevicetechnology

    • 1.8V,0.85Vdualpowersupply

    • ComplianttoMPHY4.1specification

    • SupportsHS-G1/HS-G2/HS-G3/HS-G4SeriesAandB(SeriesA:1.248G,2.496G,4.992G,9.984GbpsSeriesB:1.456G,2.912G,5.824G,11.648Gbps)

    • ChannelConfigurationforDataLanes •Common(CMN)and2DataLanes

    • Supportsthefollowingpre-emphasislevels •-1.5/3/6dB

    • 19.2Mor26MHzreferenceclockisrequired

    • Built-inselftestcapableofproducingandcheckingPRBSrandom patterns

    HEADQUARTERS 2811 Mission College Blvd., 6th Floor Santa Clara, CA 95054

    WWW.SILVACO.COMRev072120_0271302

    JAPAN [email protected] KOREA [email protected] TAIWAN [email protected] SINGAPORE [email protected] CHINA [email protected]

    CALIFORNIA [email protected] [email protected] TEXAS [email protected] EUROPE [email protected] FRANCE [email protected]

    Formoreinformation,[email protected].

    ©CopyrightSilvaco,Inc.Allrightsreserved.SilvacoisaregisteredtrademarkofSilvaco,Inc.SamsungFoundryisatrademarkofSamsungElectronicsCo.Ltd.Allothernamesmentionedhereinaretrademarksorregisteredtrademarkoftheir respective owners.

    Allinformationprovidedisforreferencepurposesonlyandmaybechangedwithoutnotice.

    Deliverables• Front-endDK:TimingLIB,Verilogmodel,sampletestbench

    • Back-endDK:PhysicalviewLEF,GDSIIlayout,DRC,LVS

    • Documentation:Datasheetanduserguide

    https://silvaco.com/https://www.linkedin.com/company/silvaco?trk=tyahhttps://www.facebook.com/SilvacoSoftware/https://twitter.com/SilvacoSoftwarehttps://www.youtube.com/user/SilvacoUSA/featured?disable_polymer=1

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