Microelectronics Circuit Analysis and Design

Donald A. Neamen

Chapter 3

The Field Effect Transistor

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In this chapter, we will:

Study and understand the operation and characteristics of the various types of MOSFETs.

Understand and become familiar with the dc analysis and design techniques of MOSFET circuits.

Examine three applications of MOSFET circuits.

Investigate current source biasing of MOSFET circuits, such as those used in integrated circuits.

Analyze the dc biasing of multistage or multitransistor circuits.

Understand the operation and characteristics of the junction field-effect transistor, and analyze the dc response of JFET circuits.

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Basic Structure of MOS Capacitor

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MOS Capacitor Under Bias: Electric Field and Charge

Parallel plate capacitor

Negative gate bias: Positive gate bias:

Holes attracted to gate Electrons attracted to gate

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Schematic of n-Channel Enhancement Mode MOSFET

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Basic Transistor Operation

Before electron inversion layer is

formed

Neamen

After electron inversion layer is

formed

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Basic Transistor Operation

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Current Versus Voltage Characteristics: Enhancement-Mode nMOSFET

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Family of iD Versus vDS Curves: Enhancement-Mode nMOSFET

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p-Channel Enhancement-Mode MOSFET

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Symbols for n-Channel Enhancement-Mode MOSFET

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Symbols for p-Channel Enhancement-Mode MOSFET

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n-Channel Depletion-Mode MOSFET

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Family of iD Versus vDS Curves: Depletion-Mode nMOSFET

Symbols

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p-Channel Depletion-Mode MOSFET

Symbols

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Cross-Section of nMOSFET and pMOSFET

Both transistors are used in the fabrication of CMOS circuitry.

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Summary of I-V Relationships

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Enhancement and Depletion Mode

In field-effect transistors (FETs), depletion mode and enhancement mode are two major transistor types, corresponding to whether the transistor is in an ON state or an OFF state at zero gate-source voltage.

Enhancement-mode MOSFETs are the common switching elements in most MOS logic families. These devices are OFF at zero gate-source voltage, and can be turned on by pulling the gate voltage in the direction of the drain voltage; that is, toward the VDD supply rail, which is positive for NMOS logic and negative for PMOS logic.

In a depletion-mode MOSFET, the device is normally ON at zero gate-source voltage. Such devices are used as load "resistors" in logic circuits (in depletion-load NMOS logic, for example).

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Enhancement and Depletion Mode

For an n-channel enhancement -mode MOSFET, a positive gate to source voltage greater than the threshold voltage VTN must be applied to induce an electron inversion layer. For VGS > VTN the device is turned on.

For an n-channel depletion-mode MOSFET, a channel between source and drain exists even for VGS=0. The threshole voltage is negative, so that a negative voltage is required to turn the device off.

Current voltage relations are the ideal relations for long channel devices. Long channel devices are the ones whose channel length is 2um. However we are in the order of 0.2um nowadays.

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Non-ideal Current Voltage Characteristics

Finite output resistance

Body effect Subthreshold conduction Breakdown effects Temperature effects

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Channel Length Modulation: Early Voltage

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Body Effect

The occupancy of the energy bands in a semiconductor is set by the position of the Fermi level relative to the semiconductor energy-band edges. Application of a source-to-substrate reverse bias of the source-body pn-junction introduces a split between the Fermi levels for electrons and holes, moving the Fermi level for the channel further from the band edge, lowering the occupancy of the channel. The effect is to increase the gate voltage necessary to establish the channel, as seen in the figure. This change in channel strength by application of reverse bias is called the body effect.

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Subthreshold Condition

As MOSFET geometries shrink, the voltage that can be applied to the gate must be reduced to maintain reliability. To maintain performance, the threshold voltage of the MOSFET has to be reduced as well. As threshold voltage is reduced, the transistor cannot be switched from complete turn-off to complete

turn-on with the limited voltage swing available; the circuit design is a compromise between strong current in the "on" case and low current in the "off" case, and

the application determines whether to favor one over the other. Subthreshold leakage (including subthreshold conduction, gate-oxide leakage and reverse-biased junction leakage), which was ignored in the past, now can consume upwards of half of the total power consumption of modern high-performance VLSI chips

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NMOS Common-Source Circuit

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PMOS Common-Source Circuit

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Load Line and Modes of Operation: NMOS Common-Source Circuit

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Problem-Solving Technique: NMOSFET DC Analysis

1. Assume the transistor is in saturation.

a. VGS > VTN, ID > 0, & VDS ≥ VDS(sat)

2. Analyze circuit using saturation I-V relations. 3. Evaluate resulting bias condition of transistor.

a. If VGS < VTN, transistor is likely in cutoff

b. If VDS < VDS(sat), transistor is likely in nonsaturation region

4. If initial assumption is proven incorrect, make new assumption and repeat Steps 2 and 3.

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