Low Skew Clock GenerationFor Microprocessors

Presentation for:ECE1352

Fahad Qureshi990404594

Low Skew Clock GenerationFor Microprocessors

Outline

• The H-Tree• Traveling Wave clock generation• Standing Wave Oscillator

• Basic Principle• Standing Wave generation• Tune-ability• Clock generation as a square wave• Experimental results and comparison• Design Issues

• Conclusion• References• Questions

The H- Tree

The Simple H- Tree [1]

• Equal Phase Delays• In practice, large skews

The Loaded H- Tree [2]

• Uses the inductorsand capacitors toresonate at thefundamental mode ofthe clock frequency.

• Low Power usagebecause power is stored components.

The Traveling Wave Clock Generators [3]

Basic Principle:• The wave gets inverted after reaching each round• The phase differences are well defined at each

point• Clock nodes are picked off at specific points

In Practice:• Points of equal phase are based on their location on

the path• Skew can be caused by not having the pick-off

point • Propagation speed depends on dielectric and

devices like on chip capacitors will chance thepropagation delays cause delays.

Coupled Standing Wave Oscillators [4]

Basic Principle:• A standing wave has the same phase across all its points.

• We create a standing wave throughout the die of the microprocessor and wecan generate our clock signal from the standing wave.

Coupled Standing Wave Oscillators [4]

• To generate a standing wave across aquarter wavelength line we couple 3 ormore oscillators.

• The only way they can oscillate iscoupled to each other, the standingwave is produced.

• Many of these cells are used together and form a grid across the die.

• The three that form a standing wave areshown highlighted.

Coupled Standing Wave Oscillators [4]

• The frequency of the clock depends on the the length of the lines. To allow for tune-ability varactors are used instead of actualgrounds.

• The varactor forms a stub of variable length where the length is related to the voltage applied to the varactor. (6.4% clocking range)

• While propagating across the line lossesare incurred.

• To compensate for these losses, the transconductance for the cross coupledtransistor pair must be:

ccpRCgnL

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Coupled Standing Wave Oscillators [4]

• Since voltage across the line varies sinusoidally the circuit that generates theclock must not introduce skew that is amplitude dependant.

• The clock buffer employed uses a low passfilter to remove the harmonics introduced by limiting amplifier that would havecaused skews.

• The 50% duty cycle is ensured by a sine-tosquare inverter with cross-coupled inverters.

Coupled Standing Wave Oscillators [4]

Experimental Results

At a 10GHz clock frequency the skew was measured on the die, before and after tuning. As we can see, very low skew rates were observed.

Here is a table to compare the different techniques and their measured skews.

Clock Type: SkewSWO 1psTraveling Wave 5psLoaded H-Tree 8psSimple H-Tree 22ps

Coupled Standing Wave Oscillators [4]

Design Issues

• Size: The size is restricted by the wavelengthsince the wire lengths are wavelengthdependent. We have some maneuverability withthe varactors but for low frequencies this cannot be used.

• Power: The overall power dissipation of the standing wave oscillators is on theorder of C f V2. This is due to the large number of oscillators used.

• Upon investigation, it was learnt that there are no serious issues with the existence of the standing wave in terms of the currents induced inthe dielectric. This is because of its existing asonly a differential signal and the proximity to thegrounded substrate.

Coupled Standing Wave Oscillators [4]

Conclusion

• A low skew clock generation setup can be employed by using the Standing Wave Oscillator technique. Skew ~1ps

• The Clock generation here is on order of the same power usage as a digital fCV2 setup

• This can only be used where the die sizes are on the order of 1-2 wavelengths at the design frequency.

• Only a small change in the clocking frequency can be tolerated by a given structure.

Coupled Standing Wave Oscillators [4]

References:

[1] Restle, P.J. et al, “A clock distribution network for microprocessors”, VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium , 15-17 June 2000

[2] Chan, S.C et al.,” Design of resonant global clock distributions”, Computer Design, 2003. Proceedings. 21st International Conference , Oct. 13-15, 2003

[3] Wood, J. et al. “Multi-gigahertz low-power low-skew rotary clock scheme”, Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE

[4] Design of a 10GHz clock distribution network using coupled standing-wave oscillators O'Mahony, F.; Yue, C.P.; Horowitz, M.A.; Wong, S.S.;

Design Automation Conference, 2003. Proceedings , June 2-6, 2003