low power secrecy rate optimizations for mimo … · in this paper, a novel communication scheme is...

Pak. J. Biotechnol. Vol. 13 (special issue on Innovations in information Embedded and communication Systems) Pp. 383- 386 (2016)

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LOW POWER SECRECY RATE OPTIMIZATIONS FOR MIMO SECRECY CHANNEL WITH A COOPERATIVE JAMMER

P.Rajkumar* and I.Rexline Sheeba

Department of Electronics and Communication Engineering , Sathyabama University, Chennai Email:*[email protected]; [email protected]

ABSTRACT In this paper, a novel communication scheme is to improve the power and secrecy rate of the wireless communication.

Compared to the existing system the proposed system will be more efficient of hardware cost, area and speed, because we are using FPGA to implement this architecture, in the existing system they are implemented in hardware circuit level, not in FPGA. In the feature of FPGA offer a number of paradigms to speed up calculations in a hardware software co-design environment. They are relatively cost-effective as compare to ASICs and due to flexible in nature, hardware resources are utilized in an effective way. The area, power, and cost are to be reduced in the hardware. The proposed implementation will be designed into Xilinx S6 FPGA, and finally we provide the power consumption report, synthesis and area report at different frequency range.

Index Terms — FPGA; MIMO; secrecy channel; Xilinx S6; ASIC; rate optimization; cooperative jammer; secrecy rate

I. INTRODUCTION In mobile computing, a jammer is a mobile

communications device that transmits on the same frequency range as a cell phone to create strong cell tower interference and block cell phone signals and call transmission. Jammers are usually undetectable, and users may experience minimal effects such as poor signal reception. Jamming devices may be used in any location but are typically deployed where cell phone use may be disruptive, such as in libraries and restaurants. Jammers come in a variety of shapes and sizes, including: Portable and compact devices, like mobile phones Box-shaped units that are similar to routers Larger and far-reaching briefcase-style format All jamming device types have three main parts, as follows: An antenna to connect the device A power supply or battery Circuitry, which includes a voltage-controlled oscillator, tuning circuit, noise generator and radio frequency (RF) amplification Handheld jammers are capable of disrupting signals within nine to 30 meters, while more powerful jammers create a huge bubble stretching as far as a mile or 1.6 kilometers.

A jamming device transmits on the same radio frequencies as the cell phone, disrupting the communication between the phone and the cell-phone base station in the tower. Cell Phone Jammer is an instrument to prevent cellular phone from receiving and transmitting the mobile signals to the base station. Mobile Cell Phone Jammer can block all kinds of mobile phones ringing sound at all places such as church, mosque, library, Movie Theater and meeting room. You just buy it and just attach it at some place. And you will never hear the bell sound of mobile phone any more.

II. BACKGROUND REVIEW M. Raveendranad and Mr. D.M.K. Chaitanya M A.

designed new Mobile Jammer unit which is capable of blocking the cell phone working not the signal receiving from Base Station, which make effective use of the situation where jammers actually used. By using the FPGA and RF technology to implement low cost jammers is implemented.[1]

Seongah Jeong, Keonkook Lee, Heon Huh, and Joonhyuk Kang proposed a technique to improve the

security of downlink cellular network. The confidential message intended to one of K mobile users (MUs) should be securely kept from the undesired recipients. In this work, the K-1 remaining users are regarded as potential eavesdroppers and called as internal eavesdroppers. For the security enhancement, we propose an adaptation of a single cooperative jammer (CJ) to increase the ambiguity at all malicious users by distracting them with artificial interference, but the system had limitation of secrecy [2]

Rong-Fu Ye, Student Member, IEEE, Tzyy-Sheng Horng, presented a novel frequency-shift keying (FSK) receiver using an oscillator-based injection-locked frequency divider (ILFD), thereby achieving high sensitivity, low dc-offset, and low power consumption. The proposed receiver comprises a low-noise amplifier, a divide-by-2 ring-oscillator-based ILFD, and a sub harmonic mixer. But the sensitivity of this system was lagging.[4]

Z. Ding, K. K. Leung, D. L. Goeckel, and D. Towsley introduced a cooperative transmission into secrecy communication systems, which shows that outage probability approaching zero can be achieved. In particular, scenarios with single-antenna nodes and multiple-antenna nodes will both be addressed, and the optimal design of beam forming/ pre coding will be investigated.[10]

III. PROPOSED METHODOLOGY In this block diagram shows the proposed architecture of the project. In this architecture to use the FSK modulation and demodulation used in the transmitter and receiver system. Also to use the jammer to the disturbing the receiver to read the transmitted data. Frequency shift keying (FSK) is the most common form of digital modulation in the high-frequency radio spectrum, and has important applications in telephone circuits. This article provides a general tutorial on FSK in its many forms. Both modulation and demodulation schemes will be discussed. Binary FSK (usually referred to simply as FSK) is a modulation scheme typically used to send digital information between digital equipment such as teleprinters and computers. The data are transmitted by shifting the frequency of a continuous carrier in a


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binary manner to one or the other of two discrete frequencies. Figure 1 shows the block diagram of the FSK modulation.

An alternate way of specifying element length is in terms of the keying speed. The keying speed in “bauds” is equal to the inverse of the element length in seconds. For example, an element length of 20 milliseconds (.02 seconds) is equivalent to a 50-baud keying speed.

Frequency measurements of the FSK signal are usually stated in terms of “shift” and center frequency. The shift is the frequency difference between the mark and space frequencies. Shifts are usually in the range of 50 to 1000 Hertz. The nominal center frequency is halfway between the mark and space frequencies. Occasionally the FM term “deviation” is used. The deviation is equal to the absolute value of the difference between the center frequency and the mark or space frequencies. A synchronous FSK signal which has a shift in Hertz equal to an exact integral multiple (n = 1, 2...) of the keying rate in bauds, is the most common form of coherent FSK. Coherent FSK is capable of superior error performance but non coherent FSK is simpler to generate and is used for the majority of FSK transmissions. Non coherent FSK has no special phase relationship between consecutive elements, and, in general, the phase varies randomly. The design of the FSK modulation using FPGA Implementation in this project using of VCO (Voltage control oscillator), Phase angle generator and Sin wave correlation core, here the VCO as the main core of the project. The task of the given the digital input of binary input frequency equivalent of frequency correlation value to the VCO module and generate the sine wave signal at the rate based on input frequency correlation, and generating phase angle, which is used for generating the modulation output using sine wave correlation core.

Figure.1 Block diagram for FSK Modulation

The architecture of above block diagram is used to generating the Modulation of FSK signal for Digital data, here the digital data will be generated in the Digital Frequency generator module, which is based on the frequency correlation calculation, and the frequency correlation value will be given into the VCO as per the modulation clock period of input data. The VCO (voltage control oscillator) for using oscillating and

controlling the output voltage based on the input frequency range, here we are implementing for NCO (Numerical control oscillator), which generating the sine wave based on input frequency correlation using numerical value for implementing the design into the FPGA (Field programmable gate array).

The task of the PLL is to maintained coherence between the input (modulated) signal frequencies, ωi and the respective output frequency, ωo via phase comparison. This self-correcting ability of the system also allows the PLL to track the frequency changes of the input signal once it is locked. Frequency modulated input signal is assumed as a series of numerical values (digital signal) via n-bit of NCO frequency modulator. The modulator of FSK is shown below

Figure.2 Block diagram of FSK Demodulation

The above block diagram consist of the demodulation of FSK, it has the input from the FSK modulation at the range of 1MHz+80KHz deviation, the input modulation signal will be given to the phase detector with the sampled frequency of 1MHz from NCO, the phase detector multiplied the modulation and sampled frequency and its generated the high frequency with noise. IV. EXPERIMENTAL RESULTS

After completion of the Library compilation, If you have not set the environment variables then the wizard creates a modelsim.ini in the output directory entered. By default this location is c:\Xilinxn13.xnISE DSnISE. Open this file and verify that it contains the location of the libraries that were just compiled. And the results are Summarized below


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Figure.3 Jammer off mode (Fj=1MHz)

Figure.4 Jammer off mode (Fj=1MHz)

Figure.5 Jammer on mode (Fj=Fbs)

Figure.6 Jammer on mode (Fj=Fbs)

Figure.7 Jammer components

Figure.8 Full architecture of the jammer

Figure.9 Power report

Table.1 Device utilization summary

V. CONCLUSION AND FUTURE SCOPE This paper, we first investigated the secrecy rate

optimization problems, namely, power minimization and secrecy rate maximization, for a MIMO secrecy channel with a cooperative jammer. Multiple inputs multiple outputs technology is use multiple antennas to make use of reflected signals to provide gains in channel robustness and throughput. Co-operative jammer to help the system achieve its full degrees of freedom as if the eavesdropper does not exists. We


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have considered the secure communication in the K user cellular system. For the secrecy improvement of the intended user, in this project is implemented in the hardware using FPGA technology so the power, area, size, and the cost are reduced. FPGAs speed up calculations in a hardware software co-design environment. They are relatively cost-effective as compare to ASICs and due to flexible in nature, hardware resources are utilized in an effective way. In the results shows utilization of element and IOB’s are 23% and 17%. Finally, the simulation results provided for the proposed system confirm that both the revenue functions of the legitimate transmitter and the private cooperative jammer are concave. In future to using different algorithm for improve the secrecy rate and reduce the power. REFERENCES [1] M. Raveendranad and D.M.K. Chaitanya, An Architecture

Design of Novel Mobile Jammer using FPGA, Inter-national Journal Engineering Science and Computing 5(9): 849-854 (2014).

[2] Seongah Jeong, Keonkook Lee, Heon Huh, and Joonhyuk Kang Secure, Transmission in Downlink Cellular Network with a Cooperative Jammer. IEEE wireless communications letters 2(4): 463- 466 (2013).

[3] Juan Pablo Martinez Brito, Sergio Bampi, Design of a Digital FM Demodulator based on a 2ndº Order All-

Digital Phase-Locked Loop. Journal of Analog Inte-grated Circuit and Signal Processing 1-2: 137-141 (2008)

[4] Rong-Fu Ye, Tzyy-Sheng Horng and Jian-Ming Wu, Low Power FSK Receiver Using an Oscillator-Based Injection-Locked Frequency Divider. IEEE microwave and wireless components letters 24(2): 114-116 (2014).

[5] X. Tang, R. Liu, P. Spasojevi´c, and H. V. Poor, Interference assisted secret communication. IEEE Trans. Inf. Theory 57(5): 3153– 3167 (2011).

[6] L. Dong, Z. Han, A. P. Petropulu and H. V. Poor, Improving wireless physical layer security via cooperating relays. IEEE Trans. Signal Process 58(3): 1875–1888 (2010).

[7] Y. Liang, H. Poor, and S. Shamai, Secure communication over fading channels. IEEE Trans. Inf. Theory 54(6): 2470–2492 (2008).

[8] Khisti and G.W.Wornell, Secure transmission with multiple antennas II: The MIMOME wiretap channel. IEEE Trans. Inf. Theory 56(11): 5515–5532 (2010).

[9] G. Zheng, L.C.Choo and K.K.Wong, Optimal cooperative jamming to enhance physical layer security using relays. IEEE Trans. Signal Process. 59(3): 317–1322 (2011).

[10] Z. Ding, K. K. Leung, D. L. Goeckel, and D. Towsley, On the application of cooperative transmission to secrecy communications. IEEE J. Sel. Areas Commun. 30(2): 359–368 (2012).

low power secrecy rate optimizations for mimo … · in this paper, a novel communication scheme is...

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