llrf control system

Dayle Kotturi LLRF Workshop, CERN [email protected]

October 10-13, 2005

LLRF Control SystemOutline

Scope Requirements Design Considerations Evaluation System drawings How this fits into beam-based longitudinal feedback Conclusions


October 10-13, 2005

Scope

This document summarizes the design of the LCLS LLRF control system design including its interface with the beam-base longitudinal fast feedback.


October 10-13, 2005

ScopeThe low level RF controls system consists of RF phase and amplitude controls at these locations:

LaserGun (Klystron 20-6)L0-A, a.k.a. L0-1 (Klystron 20-7)L0-B, a.k.a. L0-2 (Klystron 20-8)L0 Transverse cavity (Klystron 20-5) L1-S (Klystron 21-1)L1-X (Klystron 21-2)L2 - (Klystrons 24-1,24-2,24-3) to control avg phase/ampl of L2L3 Transverse cavity (Klystron 24-8)L3 - 2 sectors of klystrons, S29+S30


October 10-13, 2005

Requirements (1)Meet phase/amp noise levels shown below:Table 1.RMS tolerance budget for <12% rms peak-current jitter (column 3) or <0.1% rms final e− energy jitter (column 4). The tighter tolerance is in BOLD, underlined text and both criteria, |DI/I0| < 12% and |DE/E0| < 0.1%, are satisfied with the tighter tolerance applied. All tolerances are rms levels and the voltage and phase tolerances per klystron for L2 and L3 are Nk larger, assuming uncorrelated errors, where Nk is the number of klystrons per linac.


October 10-13, 2005

ParameterSymbol|ΔI/I0| < 12%|ΔE/E0| < 0.1%Unitmean L0 rf phase (2 klystrons)00.100.10S-band degmean L1 rf phase (1 klystron)10.100.10S-band degmean LX rf phase (1 klystron)x0.50.5X-band degmean L2 rf phase (28 klystrons)20.070.07S-band degmean L3 rf phase (48 klystrons)30.50.15S-band degmean L0 rf voltage (1-2 klystrons)DV0/V00.100.10%mean L1 rf voltage (1 klystron)DV1/V10.100.10%mean LX rf voltage (1 klystron)DVx/Vx0.250.25%mean L2 rf voltage (28 klystrons)DV2/V20.100.10%mean L3 rf voltage (48 klystrons)DV3/V30.50.08%BC1 chicaneDB1/B10.010.01%BC2 chicaneDB2/B20.050.05%Gun timing jitterΔt00.80.8psecInitial bunch chargeDQ/Q02.04.0%


October 10-13, 2005

Requirements (2)

Achieve 120 Hz feedback to maintain phase/amp stabilityAdhere to LCLS Controls Group standards: RTEMS, EPICS, Channel Access protocol Begin RF processing of high-powered structures May, 2006


October 10-13, 2005

Local feedback loop requirements

At each of these locations, the klystron’s phase and amplitude will be monitored and controlledWhen beam is present, control will be done by beam-based longitudinal feedback (except for T-cavs); when beam is absent, control will be done by local phase and amplitude controller (PAC)


October 10-13, 2005

Design considerationsThrough end of January 2005, various solutions were evaluated, from 100% COTS modules to hybrids of in-house designed boards.


October 10-13, 2005

Options considered Jan/05 (2)

LLRF architecture layout options for feedback signals

Option 1 – ADC with PAD sends 1MB/s normally; 10MB/s peak

CPU

~6', a couple of racks’ distance apart 1 VME Crate

RF I & Q

40 copies

ADCPADPAD

PADPAD

PAD

ADCADC

ADCADC Ethernet, 10 MB/s peak load

For an 119 MHz RF signal, there is 8.4 ns/samplewhich corresponds to 8.4 us/1000 samples. Since each sample is a 2 Byte integer and there are 40 RF signals, this is 80 Bytes, or 80 Kbytes per 1000 samples.Of the 8.4 ms beam pulse duration, 8.4 us is relevant.This means that at 120 Hz, there is 80 Kbytes of data.In 1 second, there is 120*80K=10 MB/s

ProsNo noise in the digital data

transmission

Cons

How to get triggers to ADC?

EVR


October 10-13, 2005


PADPAD

PADPAD

Option 2 – “dumb” ADC in VME crate passes raw data to CPU

CPU

ADC

40 analog signals

10

MB/s

ProsCons

Analog noise present

40 copies

EVR

RF I & Q


October 10-13, 2005


PADPAD

PADPAD

PADCPU

~6', a couple of racks’ distance apart 1 VME CrateRF I &

Q

40 copies

ADCPADPAD

PADPAD

ADC

ADCADC

ADCMicro

controlleror

FPGA

Ethernet, 10 KB/s + debug data = peak load

ProsLoad is off the VME CPU

ConsHow to get triggers from

ADC?FPGA programming

Option 3 – ADC with PAD sends 1MB/s normally; 10MB/s peak

40 processed values need to be transmitted at 120 Hz.Since each signal is a 2 Byte integer, this corresponds to 80 Bytes at 120 Hz

EVR


October 10-13, 2005


PADPAD

PAD

Option 4 – Multiple VME crate solution

CPU

ADC

Fast, but no FPGA

EVR

PADPAD

PADPAD

PAD

RF I & Q


Easier to trigger ADC

ConsMore crates

8 copies

1 VME Crate

triggers

9 copies


October 10-13, 2005

Options considered Jan/05 (6)Option 5 – Multiple VME crate solution with FPGA on board ADC


Easier to trigger ADC

ConsNoise. Ok for Injector, but problem for LINAC where

distances are 160'No/few ADCs available with

on-board FPGACost of FPGA

FPGA programming

PADPAD

PAD

CPU

ADC

Fast, with FPGA

EVR

PADPAD

PADPAD

PAD

RF I & Q

8 copies

1 VME Crate

triggers

9 copies


October 10-13, 2005


Option 6 – Everything on a single board

ADC

CPU

EVR

DAC

ethernet

RF I & Q

40 Analog signals

8 copies

PADPAD

PADPAD

PADPAD

PADPAD

triggers


October 10-13, 2005


PADPAD

PAD

Preferred Solution: Option 4 – Multiple VME crate solution

CPU

ADC

ADC

Dig I/O

Fast, but no FPGA

Slow, for thermocouples

DAC

For control

EVR

PADPAD

PADPAD

PAD

Place holder dig I/O. maybe not

needed


8 copies

1 VME Crate

CPU

Global feedback VME

Crate

triggersRF I &

Q


October 10-13, 2005

Narrowing down the options May/05Later, the options were narrowed down to two: an Off-the-shelf solution and an in-house solution. This subset of options was presented at the Lehman Review, May 10-12, 2005. Ref: Low Level RF

http://www.slac.stanford.edu/grp/lcls/controls/global/subsystems/llrf/Kotturi_Low_Level_RF.ppt


October 10-13, 2005

Off-the-shelf solution May/05

PAD

Solution 1: Multiple VME crates with COTS modules.

CPU

ADC

fast

ADC

fast

DAC slow

Fast, but no FPGA

Thermocouple system

DAC

fast

EVR

VME Crate

CPU

Global longitudinal beam-based

feedback VME crate

1 trigger for 4 channels of 1k

samples

laser

L0-AL0-B

L1-SL1-XT Cav

gun

Beam-based longitudinal fast feedback gigabit

ethernet

Controls gigabit ethernet (interface to MCC)

RF Reference/4 = 119 MHzstabilized to 50 fs jitter

476 M

Hz R

F Refe

rence

cloc

k dist

ribute

d to a

ll 30 s

ector

s in t

he Li

nac a

nd be

yond

RF Reference*6 = 2856 MHzstabilized to 50 fs jitter

L2: in sector 24, there are 3 stations to adjust in order to accurately control phase and amplitude for long , beam-based fast feedback

10' accelerator

IQ Modulator: a phase shifter

and an attenuator

1 kW 1 kW

100 mW

ADC

slow


Solid State Sub Booster

Klystron

SLED cavity

laser RF

For waveforms e.g. reflected power, beam

voltage

1 trigger to travel up to ½ sector

away

60 MW

HPRF240 MW

60 MW

1 kW

RF Phase and Amplitude correction at 120 Hz for:laser, gun, L0-A, L0-B, L1-S, L1-X, T cav, L2 and S25 Tcav

Slow adjustments to allow rotation

of the reference

phase(inc sensitivity,

dec noise)

All except laser RF

100 mW

119 MHz Laser

Oscillator

Amps

GunNB: For the gun, SLED

cavity is shorted out

119 MHz120 Hz

UV

photodiode

photodiode

Sector 25 T Cav (new 4/2005)


October 10-13, 2005

In-house solution May/05

I and Q Demo-dulator

CPU

FIFOs

ADC

slow

DAC

slow

Thermocouple system

EVR

VME Crate

CPU

laser

L0-AL0-B

L1-SL1-XT Cav

gun

Beam-based longitudinal

fast feedback gigabit

ethernet


Eth recvr

Private ethernet8 kBytes at 120 Hz

PAD

ADC

I and Q Modulator

DAC

FIFOs

1 trigger for 4

channels of 1k

samples


Solution 2: Multiple VME crates with in-house modules

476 M

Hz R

F Refe

rence

cloc

k dist

ribute

d to a

ll 30 s

ector

s in th

e Lina

c and

beyo

ndRF Reference/4 = 119 MHzstabilized to 50 fs jitter


Controller with

ethernet

Controller with

ethernet

Local trigger

Possibly combined into one module

Slow adjustments to allow rotation of the

reference phase

ADC

fast

Other waveformsFast, but not 119

MHz. 59.5 MHz ok


feedback VME crate

L2: in sector 24, there are 3 stations to adjust in order to accurately control phase and amplitude for long, beam-based fast feedback

PAC

Sector 25 T Cav (new 4/2005)

RF Phase and Amplitude correction at 120 Hz for:laser, gun, L0-A, L0-B, L1-S, L1-X, T cav, L2 and S25 Tcav

10' accelerator

IQ Modulator: a phase shifter

and an attenuator

1 kW 1 kW

100 mW


Klystron

SLED cavity

60 MW

HPRF240 MW

60 MW

1 kW

All except laser RF

100 mW

119 MHz Laser

Oscillator

Amps



119 MHz120 Hz

UV

photodiode

photodiode


away


October 10-13, 2005

EvaluationThe Off-the-shelf solution is:

Expensive ($25K per instance * 10 instances) Noisy. ADCs are up to 150’ from what they measure so analog noise levels and ground loop problems would need to be dealt with

The in-house solution is: Possibly longer to develop due to board design and fabrication time.


October 10-13, 2005

Evaluation (2)Characteristics of the Off-the-shelf solution were seen as requiring more effort than those of the in-house solutionPotential offered by the lower cost of the in-house solution to replace 250 klystron controllers in the remainder of the LINAC is attractiveHardware people were available as of 22aug2005 to work on board design if µcontroller was decidedTurned to the EPICS community for ideas and chose a µcontroller


October 10-13, 2005

Evaluation (3)Lower cost alternatives to the $15K VME chassis and IOC were discussed in the session on hardware at the EPICS Collaboration Meeting. April 27-29, 2005Of the options available, only the Coldfire uCdimm 5282 processor had the communication speed and power to meet our data requirements. Cost is $150 per processor plus the development of the board it sits on

http://www-ssrl.slac.stanford.edu/lcls/epics/index.php

http://www-ssrl.slac.stanford.edu/lcls/epics/talks/thurpm/norumembeddedepics.ppt





October 10-13, 2005

Evaluation (4)By choosing the Coldfire processor, we are able to make use of the port of the operating system, RTEMS, which has already been done.

RTEMS is the standard for the real-time operating system chosen for LCLS by the Controls GroupEPICS, the standard for the control system software for LCLS runs on RTEMSWith these choices, the LLRF control system will be fully integrated into the rest of the LCLS EPICS control system and can speak to other devices and applications such as control panels, alarm handlers and data archivers, using Channel Access protocol, the standard communication protocol for this project.


October 10-13, 2005


CPU

FIFOs

DAC

slow

Temperature monitors

EVR

VME Crate at S20

CPU

Laser and RF ref

L0-AL0-B

L1-SL1-X

T Cav

gun


Eth recvr

Private ethernet8 kBytes at 120 HzPAD

ADC

FPGADAC

1 trigger for 4

channels of 1k

samples


In-house modules sharing VME crate for timing triggers

476 M

Hz RF

Refer

ence

clock

distrib

uted t

o all 3

0 sec

tors in

the L

inac a

nd be

yond



Coldfire CPU

running RTEMS

and EPICS

Coldfire CPU

running RTEMS

and EPICS


feedback VME crate

PAC

RF Phase and Amplitude correction at 120 Hz for:laser, gun, L0-A, L0-B, L1-S, L1-X, T cav

10' accelerator

IQ Modulator gives phase

and amplitude control

1 kW 1 kW


Klystron

SLED cavity

60 MW

HPRF240 MW

60 MW

1 kW

All except laser RF

100 mW

119 MHz Laser

Oscillator

Amps



119 MHz120 Hz

UV

photodiode

photodiode


away



ethernet

DAC

slow

VME Crate for longitudinal,

beam-based feedback


October 10-13, 2005


CPU

FIFOs

DAC

slow

Thermocouple system

EVR

VME Crate at S24

CPU


Eth recvr


PAD

ADC

FPGADAC

1 trigger for 4

channels of 1k

samples


In-house modules sharing VME crate for timing triggers

476 M

Hz R

F Refe

rence

cloc

k dist

ribute

d to a

ll 30 s

ector

s in t

he Li

nac a

nd be

yond



Coldfire CPU

running RTEMS

and EPICS

Coldfire CPU

running RTEMS

and EPICS

L2: in sector 24, there are 3 stations to adjust in order to accurately control phase and amplitude for long, beam-based

fast feedback

PAC

Sector 25 T Cav (L24-8)

RF Phase and Amplitude correction at 120 Hz for:L2, S25 Tcav and L3

10' accelerator

IQ Modulator gives phase

and amplitude control

1 kW 1 kW


Klystron

SLED cavity

60 MW

HPRF240 MW

60 MW

1 kW

100 mW

NB: For the gun, SLED cavity is shorted out


away



ethernet.Setting only

L24-1

L24-3L24-2

S30S29

DAC

slow


beam-based feedback


October 10-13, 2005

Eth recvr

EVR

VME Crate at S20

CPU

CPU

Eth recvr

EVR

VME Crate at S24

CPU

PACGun

PADPADPAD

PAC

RF Dist’n

Laser

PACL0-B

PADPAD

PACL1-S

PADPAD

PACL0-Tcav

PADPAD

PACL0-A

PADPAD

PACPAD

PAD

PACL1-X

PADPADPAD

PACL24-1

PACL24-2

PACL24-3

PACTcav L24-8

PACS29

Overview of RF Phase and Amplitude correction at 120 Hz for LCLS LINAC

PACS30

PACPACPAC

PACPAD

PADPAD


beam-based feedback

Total number of Coldfire processors: 37Total number of PACs: 18Total number of PADs: 19

Total number of VME crates: 3


October 10-13, 2005

How this fits into global feedback (Gun)

TOROID

BUNCH CHARGE

BEAM PHASE CAVITY

GUN RF FEEDBACK

InputsGUN-CELL1-PHAS/AMPLGUN-CELL2-PHAS/AMPL

ActuatorsGUN RF ACTUATORS

2856MHz R ef

GUN RF ACTUATORS

LCLS RF Oscillator

LINAC MDL Ref.

PHAS

GUN RF REF.

LASER RF R EF.

PHAS AMPL

PHASEERROR

ActuatorL0, L1 to L2, L3Phase

AMPL

GUN-CELL2

GUN-CELL1

KLYSTRONAMPLIFIER / SLC CONTROL

LASER OSC

Reference

LASER OSC. PHASE

WATER TEMP

RF GUN

LASER PHASE ACTUATOR

LASER POWERACTUATOR

OUT

2856MHzRF REF.

LASER

GUN

L0A

L0B

L1-X

L1-S

GUN TUNE FEEDBACK

InputsGUN-FOR-PHASGUN-CELL1-PHASGUN-CELL2-PHAS

ActuatorsWATER TEMP

GUN-FOR

LASER OSCILLATOR PHASEand LASER POWERFEEDBACK

InputsLASER OSC. PHASEBUNCH CHARGEGUN-CELL1-AMPL/PHASGUN-CELL2-AMPL/PHASLASER PHASE & AMPLITUDEGUN RF ACTUATORSBEAM PHASE CAVITY

ActuatorsLASER POWERLASER PHASE ACTUATOR

PHASE ERROR BetweenL0, L1 and L 2, L3

LASER PHASE & AMPLITUDE?

LASER AMPLIFIER


October 10-13, 2005

How this fits into global feedback (L0)

L0B LOAD FOR

PHAS

L0B RF REF.

AMPL

L0B RF ACTUATORS

L0B

L0B THREE T HERMOCOUPLEINPUTS

L0B-FOR


L0A RF ACTUATORS


L0A R F REF.

L0A

L0 BUNCH ENERGY FEEDBACK

Inputs4 DL1BPMs: BPM10,11,12,13Laser phase, power

Matrixed Information DL1 Energy

Status inputs Flags for what is broken

ActuatorsL0 AMPLITUDE

L0A RF PHAS/AMPL0B RF PHAS/AMP

DL1 BPM 13X Position




L0B RF Feedback

InputsL0B-FOR PHAS/AMPLL0B-LOAD FOR PHAS/AMPL3-THERMOCOUPLES

ActuatorsL0B RF PHAS/AMPL

L0A-FOR

L0A LOAD FOR

L0A T HREETHERMOCOUPLE INPUTS

L0A R F Feedback

InputsL0A-FOR PHAS/AMPLL0A-LOAD FOR PHAS/AMPL3-THERMOCOUPLES

ActuatorsL0A R F PHAS/AMPL

AMPLPHAS


October 10-13, 2005


L1D THREET HERMOCOUPLEINPUTS

L1X-FOR

L1X T HREE THERMOCOUPLEINPUTS

PHAS AMPL

L1 RF ACTUATORS

L1 RF REF.

L1 BUNCH ENERGY/LENGTHFEEDBACK

Inputs4 DL1BPMs: BPM10,11,12,133 BC1BPMs: BPMA12,BPMS11,

BPMM12Toroid atBC1: IMBC1OBLM atBC1: BLM11 Laser phase, power

Matrixed Information DL1 EnergyBC1 Energy and Bunch Length


ActuatorsL1 RF PHASL1 RF AMPL

L1C THREET HERMOCOUPLEINPUTSL1B THREET HERMOCOUPLEINPUTS

L1X R F Feedback

InputsL1X-FOR PHAS/AMPLL1X-LOAD FOR PHAS/AMPL3-THERMOCOUPLES

ActuatorsL1X R F PHAS/AMPL



L1X RF ACTUATORS

AMPLPHAS

L1X R F REF.

L1B-FOR

L1C LOAD FORL1CL1X

L1X LOAD FOR

L1S R F Feedback

InputsL1B-FOR PHAS/AMPLL1B-LOAD FOR PHAS/AMPLL1C-LOAD FOR PHAS/AMPLL1D-LOAD FOR PHAS/AMPLL1B 3 THERMOCOUPLESL1C 3 THERMOCOUPLESL1D 3 THERMOCOUPLES

ActuatorsL1 RF PHAS/AMPL

L1D LOAD FOR

BC1 BPMM12X Position

BC1 BPMS11X Position

BC1 BPMA12X PositionL1D

BC1BUNCHLENGTHL1B LOAD FOR

L1B


October 10-13, 2005


L2 24-1

L2 24-1 RF ACTUATORS

PRL RF

PHAS AMPL


L2 24-2 RF ACTUATORS

L2 24-2


AMPLPHAS

PRL RF

L2 BUNCH ENERGY/LENGTHFEEDBACK


BPMM123 BC2BPMs: BPM24401,

BPM24701,BPMS21Toroid atBC1: IMBC1OToroid atBC2: IMBC2OBLM atBC1: BLM11 BLM atBC2: BLM21Laser phase, power

Matrixed Information DL1 EnergyBC1 Energy and Bunch Length BC2 Energy and Bunch Length


ActuatorsL2 PHASE AND AMPLITUDE

L2 24-1 R FPHAS ACTUATORL2 24-2 R FPHAS ACTUATOR

BC2 BPM24401X Position

BC2 BPM24701X Position

BC2 BPMS21X Position

BC2 BUNCHLENGTH


October 10-13, 2005


DL2 BPMDL3X Position

PRL RF

L3 BUNCH ENERGYFEEDBACK


BPMM123 BC2BPMs: BPM24401,

BPM24701,BPMS212 DL2BPMs: BPMDL1,BPMDL3Toroid atBC1: IMBC1OToroid atBC2: IMBC2OBLM atBC1: BLM11 BLM atBC2: BLM21Laser phase, power

Matrixed Information DL1 EnergyBC1 Energy and Bunch Length BC2 Energy and Bunch LengthDL2 Energy


ActuatorsL3 AMPLITUDE

SECTOR 29PHAS ACTUATORSECTOR 30PHAS ACTUATOR

DL2 BPMDL1X Position

8 KLYSTRONAMPLIFIER / SLC CONTROL

SECTOR 29 PHASE ACTUATOR

PRL RF

8 KLYSTRONAMPLIFIER / SLC CONTROL

SECTOR 30SECTOR 29

SECTOR 30PHASE ACTUATOR


October 10-13, 2005

How this fits into global feedback

*These 10 sectors*8 klystron values are available from the SCP, but may be impossible to read @ 120 Hz. We could provide the corrected values @120 Hz.

L3 RF phase*L3 RF amplitude*

L2 RF phase*L2 RF amplitude*BC-2 energyBC-2 bunch length

LIST OF AVAILABLE PARAMETERSupdated at 120 Hz unless specified otherwise

Laser phaseLaser powerGun RF phaseGun RF amplitudeGun chargeBeam phaseL0A RF phaseL0A RF amplitudeL0B RF phaseL0B RF amplitudeDL1 energyL1 RF phaseL1 RF amplitudeL1-X RF phaseL1-X RF amplitudeBC-1 energyBC-1 bunch length

DL2 energy


October 10-13, 2005

Conclusions

This solution: meets the spec for speed and noise avoids signal noise problems avoids ground loop problems meets LCLS control system requirments and standards running EPICS on RTEMS provides a low cost path for future upgrade in the rest of the LINAC when the rest of the klystron control is replaced


October 10-13, 2005

ConclusionsAt 120 Hz, the LCLS LLRF raw signals must be processed, the phase and amplitude corrections must be sent out, applied and achievedWhen there is beam, this system will integrate with the beam-based longitudinal feedback by accepting the latter’s RF phase and amplitude corrections and passing them on.

llrf control system

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