240-451 VLSI, 2000

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Lecture Lecture 2 2

NMOS Technology

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Design Abstraction Levels

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Introduction to NMOS

NMOS technology was divided into 3 layers :

- Diffusion Layer

- Poly Silicon

- Metal

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Introduction to NMOS

S DG

Poly cross with diffusion --> Field effect transistor (FET)

D

S

G

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

The Basic Idea ...

• N-Channel - N-Switches are ON when the Gate is

HIGH and OFF when the Gate is LOW

• P-Channel - P-Switches are OFF when the Gate is

HIGH and ON when the Gate is LOW

• (ON == Circuit between Source and Drain)

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Transistors as switches

GS

D

GS

D

N Switch

P Switch

0

1

1

0

Passes “good zeros”

Passes “good ones”

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

General Properties

• โลหะไม่�ม่�ปฏิ�กริ�ยาก�บเส้�นอื่��น • Diffusion has C > Poly , Metal BUT!! Poly and metal have R > Diffusion.

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

MOS Transistor

n+n+

p-substrate

Field-Oxyde

(SiO2)

p+ stopper

Polysilicon

Gate Oxyde

DrainSource

Gate

Bulk Contact

CROSS-SECTION of NMOS Transistor

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Current and transistor structure

GS

D -

+

Vds

IdsVgd

Vgs

++

n+n+

p-substrate

DSG

B

VGS

+

-

Depletion

Region

n-channel

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Current in transistor

Ids = Q t S

v L

E = Vds ; Vds lowL

t = L2

Vds

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

t L2

Ids Vgs

Vgs > Vthreshold ;

I flow and transistor will be ON

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

The relation between current and voltage

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Capacitance

Q = - Cg (Vgs - Vth) * C = A

D

Q = -WL (Vgs - Vth) D

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Current in Transistor (Ids)

Ids = - W (Vgs - Vth) Vds

LD

Vds = LD Ids

W (Vgs - Vth)

R = L2

Cg(Vgs - Vth)

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Current in Saturation

Ids W (Vgs - Vth)2

2LD

GS

D

D

S

Vgs

G

R

+ -

Vds

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Current in Nonsaturated

Ids Cg ((Vgs - Vth)Vds - Vds2 )

L2 2

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Serial Parallel Structure (1)

1

1

1 1

G

G

G G

S

S

S SD

D

D D

N Channel: on=closed when gate is high

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

NMOS Transistors in serial/parallel connection

Transistors can be thought as a switch controlled by its gate signal

NMOS switch closes when switch control input is high

X Y

A B

Y = X if A and B

X Y

A

B Y = X if A OR B

NMOS Transistors pass a “strong” 0 but a “weak” 1

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Serial Parallel Structure (2)

P Channel: on=closed when gate is low

0

0

0 0

G

G

G G

S

S

S SD

D

D D

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

PMOS transistors serial/parallel connection

X Y

A B

Y = X if A AND B = A + B

X Y

A

B Y = X if A OR B = AB

PMOS Transistors pass a “strong” 1 but a “weak” 0

PMOS switch closes when switch control input is low

240-451 VLSI, 2000

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Questions & Summary

“Inverter in the next slide”