ANNA UNIVERSITY: CHENNAI-600 025B.E/B.Tech DEGREE EXAMINATIONS,APRIL/MAY 2015Regulations 2013Fourth Semester(ELECTRONICS AND COMMUNICATION ENGINEERING)EC6411 Circuits & Simulation Integrated LabTime: 3 HoursMax.Marks:1001.Design and construct series-series feedback amplifier with feedback and without feedback & Plot the frequency Response graph.Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

2.Design and construct series-shunt feedback amplifier with feedback and without feedback & Plot the frequency Response graph.Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

3. (i).Design and construct the circuit that clips the positive portion of applied voltage (50) (ii)Simulate an audio frequency oscillator in Multisim ( 50)Mark Allotment Pattern:Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

4. (i).Design and construct the circuit that clips the negative portion of applied voltage (50) (ii) Simulate a tuned collector Oscillator in multisim .(50)Mark Allotment Pattern:Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

5. (i).Design and construct the circuit that lifts Dc level of the signal than its original DC level in positive direction (50) (ii) Simulate a scale of 2 toggle circuit.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

6. (i).Design and construct the circuit that lifts Dc level of the signal than its original DC level in negative direction (50) (ii) Simulate an Eccles Jordon Circuit which flips between two stable states.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

7. (i).Design and construct the circuit that has one stable and one quasi stable state(50) (ii)Simulate a triggered blocking oscillator with emitter timing.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

8. (i).Design and construct free running square wave generator(50) (ii) Simulate a triggered blocking oscillator with base timing.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

9. (i).Design and construct the circuit that generates sinusoidal waveform in radio frequency range with feedback network s formed by two inductors and one capacitor. (ii) Simulate a Schmitt trigger in Multisim.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

10. (i).Design and construct single tuned class C amplifier circuit & plot its frequency response graph (50) (ii) ) Simulate a tuned collector Oscillator in multisim.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

11. (i).Design and construct RC phase shift oscillator(50) (ii) Simulate an audio frequency oscillator in Multisim .(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

12.Design and construct Wein bridge oscillator and simulate it in multisim(100) Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

13. (i). Design and construct the circuit that produce the step output voltage when impulse input voltage is given (50) (ii) Simulate a double tuned amplifier in multisim.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

14. (i).Design and construct the circuit that produce the impulse output voltage when step input voltage is given(50) (ii) Simulate a Voltage time base circuit .(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

15. (i). Design and construct the circuit that generates sinusoidal waveform in radio frequency range with feedback network s formed by two capacitors and one inductor. (50) (ii) ) Simulate a Voltage time base circuit.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

16. (i).Design and construct LC Oscillator to get sine wave output of desired frequency with feedback network formed by two inductors and one capacitor. (50) (ii Simulate a Schmitt trigger in Multisim.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

17. (i).Design and construct a circuit that produces the gate pulses (50) (ii) Simulate a triggered blocking oscillator with base timing.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

18. (i) Design & construct the slicer circuit (50) (ii) ) Simulate a Voltage time base circuit.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

19. (i) Design & construct the DC re inserter circuit (50) (ii) Simulate a Current time base circuit.(50)Aim/Procedure/ (15)Circuit/Simulation (35)Experimental Setup/ Connection (20) Results(20)Viva(10)Total(100)

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