l08 cpu function

7/29/2019 L08 CPU Function

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CS 8421 Computing Systems, Dr. Hoganson

Copyright 2004, 2006, Dr. Ken Hoganson

L08-CS8421-9-15-08

Class

Wil l

Start

Momentari ly

CS8421

Computing Systems

Dr. Ken Hoganson

CPU Functions


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Topics

Simple Memory PLA

Half-Adder

Exclusive-OR Topics from Chapter 3, Stallings:

CPU Internal Components

Instruction Cycle DiagramA Simple Example Computer

Tracing Instruction Execution


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Simple Memory with NANDs

Initial State?

Show single bit memory from multiplexor. Build from selector+multiplexor+feedback..

BABABAAB

=+

+=


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Programmable Logic Array

Implementing

boolean functions

in hardware.

(Combinations ofboolean variables)

Initially, all lines connected. Programmed by blowing fusable links with large voltage. Some details abstracted.


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Half-Adder

CPU must do (at a minimum) ADD, AND, COMPLEMENT. Allother operations can be made from these fundamentals (butslow).

Half-Adder: adds two bits together without a carry-in.

Show TT: I1, I2, Sum, Carry. Draw with AND, OR, Invertor. Show symbol for HA.


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Exclusive-OR

Easy way to do the SUM part of the H-A.

Introduce X-OR. TT and gates. Show HA with X-OR for SUM, and AND for carry.


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CPU Functions

At a minimum, the CPU must do: Addition AND COMPLEMENTAll other operations can be done with combinations: Subtraction is performed by complementing and

adding NAND is a NOT AND NAND is a complete set of operations, so can be

used to do all other Boolean operationsComputers actually build separate logic for other ops

for better performance.We know how to build AND and NOT gates

Need to explore how to do Addition


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Chapter 3 Computer Function

CPU has three major componentsRegister Bank - a set of registers

Temporary storage of values in the CPUwhile processing

ALU - Arithmetic Logic Unit

Control Unit - controls the sequence of eventsMemory stores data and programs (secondarystorage is disk)

Memory is an array of storage locations

Each location has an address, numbered

sequentially


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Microcomputer Architecture

Main

Mem

I/O

DevSecondaryStore Disk

Op Sys

Bus

CPU

Cache

on MB

Inst

Cache

Inst

Cache

H-S

I/O

BridgeH-S Bus

Focus on the CPU today.Assume cache works invisibly

behind the scenes, w ill beignored for this discussion.


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ALU

ALU operates on registers Comparisons Math operations manipulating bits

Implemented with logic gates (AND, NAND) Operates on values stored in registers, sometimes

with memory values Takes data in registers, manipulates, outputs

results back to registers which operation is performed is determined by the

bits in the computer instruction. The process ofdetermining which operation to perform is calleddecoding


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Control Unit

Controls the sequence of events Implemented with gates and clocks

generates control signals, like the one that

determines read or write on a register of D flip-flop

One traditional computer system, the control unit

takes up most of the available transistor-space onthe CPU chip


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CPU Internals


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Instruction Cycle State Diagram

Interrupt

Check

Also Illustrates the Bus/Mem Bottleneck

Pg 63 in Stallings


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CPU Operation Walk-Through

A Simple Example Computer,

Continued next page.


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4-bits first Hex

digit is Opcode:

0001 Load AC from

Mem

0010 Store AC toMem

0101 Add Mem to

ACPg 62 in Stallings

IF

IF

IF

Load

Add

Store

+

+

+


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Homework

Extend/continue the program fragment: Write instructions (starting at location 303) thatwill:

subtract the contents of memory location 942from the contents of the accumulator

Store the result in memory location 943

We will choose 3 to be the opcode for subtractmemory from the accumulator


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End of Lecture

End Of

Todays Lecture.

l k l d


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Blank Slide

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