l rh850/f1x-176pin piggyback board - renesas … · rh850/f1x-176pin piggyback board v4...

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All information contained in these materials, including products and product specifications,

represents information on the product at the time of publication and is subject to change by

Renesas Electronics Corp. without notice. Please review the latest information published by

Renesas Electronics Corp. through various means, including the Renesas Technology Corp.

website (http://www.renesas.com).

The newest version of this document can be obtained from the following web location

http://www.renesas.eu/updates?oc=Y-RH850-F1X-176PIN-PB-T1-V4

RH850 Evaluation Platform

RH850/F1x-176pin PiggyBack board

Y-RH850-F1X-176PIN-PB-T1-V4

R20UT4148ED0100, Rev. 1.00 2017-08-14

U

ser´s

Manual

32

http://www.renesas.com/

http://www.renesas.eu/updates?oc=Y-RH850-F1X-176PIN-PB-T1-V4

Table of Contents

Chapter 1 Introduction ......................................................................... 5

Chapter 2 Overview .............................................................................. 6

2.1 Overview ............................................................................................... 6

2.2 Mounting of the device ........................................................................ 7

Chapter 3 Jumper Configuration ......................................................... 8

Chapter 4 Power supply ..................................................................... 10

4.1 Board power connection ................................................................... 10

4.2 Voltage distribution ............................................................................ 11

Chapter 5 Clock sources .................................................................... 12

5.1 MainOsc .............................................................................................. 12

5.2 SubOSC ............................................................................................... 12

Chapter 6 Debug and Programming interface .................................. 13

Chapter 7 Connectors for ports of device ......................................... 14

7.1 Connectors to MainBoard .................................................................. 14

7.1.1 Connector CN1 ............................................................................................................ 14

7.1.2 Connector CN2 ............................................................................................................ 16

7.1.3 Connector CN3 ............................................................................................................ 18

Chapter 8 Other circuitry .................................................................... 20

8.1 Push button for RESET ...................................................................... 20

8.2 Mode Selection ................................................................................... 20

8.3 Signalling LEDs .................................................................................. 21

Chapter 9 Mechanical dimensions .................................................... 22

Chapter 10 Schematic .......................................................................... 23

Chapter 11 Revision History ................................................................ 27

RH850/F1x-176pin PiggyBack board V4 Y-RH850-F1X-176PIN-PB-T1-V4

R20UT4148ED0100 Rev. 1.00 5 2017-08-14

Chapter 1 Introduction

The RH850/F1x Application Board is part of the RH850 Evaluation Platform and serves as a simple and easy to use platform for evaluating the features and performance of Renesas Electronics 32-bit RH850/F1x microcontrollers. The piggyback board (Y-RH850-F1X-176PIN-PB-T1-V4) can be used as a standalone board, or can be mated with a mainboard (e.g. Y-RH850-X1X-MB-Tx-Vx) for extended functionality.

Main features:

Socket for mounting of device

Standalone operation of the board

Direct supply of device voltage (typ. 3.3V-5.0V)

Device programming capability

Device debugging capability

Pin headers for direct access to each device pin

Reset switch

MainOSC and SubOSC circuitry

Signal LEDs

Jumpers for device mode selection

Connectors to MainBoard

This document describes the functionality provided by the piggyback board and guides the user through its operation.

For details regarding the operation of the microcontroller, refer to the related User’s Manual and Datasheet.

This manual describes the following board revision:

Y-RH850-F1X-176PIN-PB-T1-V4

The main difference to the previous board revision (Y-RH850-F1X-176PIN-PB-T1-V3) are:

Added support for the RH850/F1KH-D8 device. (Especially see the Note in chapter 4.2 for the configuration of the REGnVCC voltage.)

Modified port assignments on connectors to MainBoard (CN1 to CN3)


R20UT4148ED0100 Rev. 1.00 6 2017-08-14

Chapter 2 Overview

2.1 Overview

Figures 1 and 2 provide the views of the Piggyback Board.

Figure 1 – PiggyBoard top view

Figure 2 – PiggyBoard bottom view

Devic

e p

in #

1


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2.2 Mounting of the device

The board is designed for use with the following devices (each in the 176pin package version):

RH850/F1L

RH850/F1M

RH850/F1H

RH850/F1K

RH850/F1KM-S4

RH850/F1KH-D8

The device must be placed inside the socket IC1. To insert the device, press down the lid, align the #1 pin of the device to the #1pin of the socket, insert the device inside the socket and release the lid.


R20UT4148ED0100 Rev. 1.00 8 2017-08-14

Chapter 3 Jumper Configuration

The function of the board can be configured via jumpers. This chapter describes the standard configuration, i.e. jumper setting for the intended devices. For the supported function of the used device, please refer to the corresponding HW user’s manual.

The table has the following meaning:

x-y: Connect the pins x and y; valid for 3-pin jumpers (e.g. JP17)

The pin #1 can be identified by a small circle in the vicinity of the jumper

Depending on the used device a configuration of several jumpers is required. The detailed configuration is shown below:

F1L F1M F1H F1K F1KM-S4 F1KH-D8 Function

JP1 closed open open closed open open Selection of Pin 114: P9_6, VSS, REG0VCC or REG1VCC

JP2 open closed closed open open open

JP3 open open open open closed open

JP31 open open open open open closed

JP4 closed open open closed open open Selection of Pin 113: P9_5, REGVCC or VSS

JP5 open closed closed open open open

JP6 open open open open closed closed

JP7 1-2 closed closed closed closed open open Selection of Pin 73: P1_6 or ISOVCL JP7 2-3 open open open open closed closed

JP8 1-2 closed closed closed closed open open Selection of Pin 72: P1_7 or VSS JP8 2-3 open open open open closed closed

JP9 1-2 closed closed closed closed open open Selection of Pin 14: P11_14 or VSS JP9 2-3 open open open open closed closed

JP10 1-2 closed closed closed closed open open Selection of Pin 13: P11_13 or ISOVCL JP10 2-3 open open open open closed closed

JP21 1-2 closed open open Either open open Selection of PWGA34: Either from P9_5 or P0_11 JP21 2-3 open closed closed Or closed closed

JP17 1-2 closed open open Either open open Selection of PWGA35: Either P9_6 or P0_6 JP17 2-3 open closed closed Or closed closed

JP24 1-2 open open closed open open open Selection of ETH0RXERR: Either P11_14 or P11_15 JP24 2-3 open open closed open open closed

JP30 1-2 open open open open Either closed Selection of ETH0CRSDV: Either P11_12 or P11_13 JP30 2-3 open open open open Or open

JP36 1-2 Either Either Either Either Either Either Selection of UART0TX: Either P10_10 or P0_2 JP36 2-3 Or Or Or Or Or Or

JP37 1-2 Either Either Either Either Either Either Selection of UART0RX: Either P10_9 or P0_3 JP37 2-3 Or Or Or Or Or Or

JP34 1-2 Either Either Either Either Either Either Selection of LIN0TX: Either P10_10 or P0_2 JP34 2-3 Or Or Or Or Or Or

JP35 1-2 Either Either Either Either Either Either Selection of LIN0RX: Either P10_9 or P0_3 JP35 2-3 Or Or Or Or Or Or

JP32 1-2 Either Either Either Either Either Either Selection of CAN0TX: Either P10_1 or P0_0 JP32 2-3 Or Or Or Or Or Or

JP33 1-2 Either Either Either Either Either Either Selection of CAN0RX: Either P10_0 or P0_1 JP33 2-3 Or Or Or Or Or Or


R20UT4148ED0100 Rev. 1.00 9 2017-08-14

The jumper setting also are shown in this picture:

Figure 3 – Jumper setting overview

The green jumper JP25 for FLMDO0 always must be closed for a ‘normal’ (user mode and debug) operation of the device.

The red jumpers must be set for a single “Voltage 1” (typ +5.0V) operation of the device.

The blue jumper must be set for a single “Voltage 2” (typ +3.3V) operation of the device.

The orange jumpers must be selected depending on the used device. See the printing on the board or the table above for the applicable setting.

For jumper settings related to the device operation mode, refer to the chapter 8.2.


R20UT4148ED0100 Rev. 1.00 10 2017-08-14

Chapter 4 Power supply

4.1 Board power connection

For operation of the device, a supply voltage must be connected to the board. Though a single supply voltage is sufficient for the operation of the device, two (different) voltages can be supplied to the board.

Within this document the following voltages are considered as ‘typical’ connections:

Voltage1 = 5.0V

Voltage2 = 3.3V

The following connectors are available to supply those voltages:

Three 4mm ‘banana-type’ connectors: - Two red connectors for voltages Voltage1 (CN54) and Voltage2 (CN17). - A black connector for VSS connection (CN10). Note: The three connectors are supplied with the board but not assembled.

The E1/E2 emulator that is used for debug purposes and flash programming can also supply a single operating voltage (‘Dbg_Voltage’). The voltage is programmable via the E1/E2 GUI as 3.3 or 5.0V (typ). See the documentation of the E1/E2 and chapter 5 ‘Debug and Programming interface’ for details. Note: The E1 voltage is connected to Voltage1, what is typically 5V. Still, 3.3V can be provided by the E1.

In case the PiggyBoard is mounted on a MainBoard, the voltages Voltage1 and Voltage2 are supplied by the on-board regulators of the MainBoard.

NOTE: Do not supply any voltage directly to the PiggyBoard in case it is mounted on the MainBoard.

For each of the two voltages, ‘Voltage 1 ‘ and ‘Voltage 2’, a green LED (LED1 and LED2) is available to signal that the related voltage is available on the PiggyBoard.


R20UT4148ED0100 Rev. 1.00 11 2017-08-14

4.2 Voltage distribution

The table shows the required device power supply pins and their function:

Device supply

pin

Name on PiggyBoard

Function

REGVCC REG0VCC

REG0VDD Supply for the device internal regulators for the digital logic.

REG1VCC REG1VDD Supply for the device internal regulators for the digital logic.

EVCC EVDD Supply for ports.

BVCC BVDD Supply for ports.

A0VREF Supply for ports and analog functions of ADC0.

A1VREF Supply for ports and analog functions of ADC1.

VDDIOF IO supply voltage for components located on a connected mainboard.

For each of the above voltages, the voltage source can be selected from Voltage1 (typ. 5.0V) or Voltage2 (typ. 3.3V) by the jumpers JP12-JP16, JP18, respectively the jumpers JP11 and JP20.

REG0VCC

JP20

VOLTAGE1

VOLTAGE2

VDDIOF

EVCC

BVCC

A0VREF

A1VREF

JP11

JP12

JP13

JP14

JP15

JP16

JP18

REG1VCC

CN29

Note:

The RH850/F1KH-D8 device requires a supply voltage of 3.3V on its REG1VCC pin.

The RH850/F1KM-S4 device requires the same supply voltage to be set to REG0VCC and REG1VCC.

See the section ‘Electrical Characteristics’ in the device User’s Manual for further details.


R20UT4148ED0100 Rev. 1.00 12 2017-08-14

Chapter 5 Clock sources

Four external crystal oscillators for the device clock supply are provided with the board.

5.1 MainOsc

A crystal or ceramic resonator can be mounted on socket X1. The applicable frequency range can be found is the devices electrical specification.

A 8MHz, 16MHz and a 20MHz oscillator is supplied with the board.

5.2 SubOSC

An oscillator with a frequency of 32.768kHz is supplied with the board and can be soldered into the connector X2.


R20UT4148ED0100 Rev. 1.00 13 2017-08-14

Chapter 6 Debug and Programming interface

For connection of the microcontroller debug and flash programming tools, the connector CN19 is provided.

The signal connection of the connector CN19 is shown in the picture below:

CN19 pin Device Port Device signal

1 JP0_2 DCUTCK / LPDCLK

2 GND GND

3 JP0_4 DCUTRST

4 FLMD0 FLMD0

5 JP0_1 DCUTDO / LPDO

6 P10_8* FLMD1

7 JP0_0 DCUTDI / LPDI

8 ‘Dbg_Voltage’ -

9 JP0_3 DCUTMS

10 JP0_6 EVTO*

11 JP0_5 DCURDY /

LPDCLKOUT

12 GND -

13 RESET -

14 GND -

*In case the EVTOUT signal shall be used by the debug/programming tool, the pin header JP11 must be closed.

The ‘Dbg_Voltage’ (on CN19 pin 8) is monitored or supplied by the debug and flash programming tools. Therefore, it is necessary to select either Voltage1 (5V) or the Voltage2 (3.3V) by pin header JP23:

JP23 pin Selection for Dbg_Voltage

1-2 5V is selected

2-3 3.3V is selected


R20UT4148ED0100 Rev. 1.00 14 2017-08-14

Chapter 7 Connectors for ports of device

Connection to each pin of the device is possible via the connectors CN5 to CN8.

Note: The pin headers are directly connected to the pins of the device, therefore special care must be taken to avoid any electrostatic or other damage to the device.

7.1 Connectors to MainBoard

Three connectors (CN1 to CN3) are available to connect the PiggyBoard to a MainBoard.

The signal connection of each connector is described in the following tables:

7.1.1 Connector CN1

Pin Function Device Port Pin Function Device Port

1 VOLTAGE1 - 2 VOLTAGE1 -


5 RESET _RESET 6 NMI P9_0

7 WAKE - 8 - -

9 INT0 P9_1 10 INT1 P0_6

11 INT2 P9_2 12 INT3 P9_3

13 - - 14 - -

15 UART0TX P10_10 or

P0_2 16 UART1TX P0_5

17 UART0RX P10_9 or

P0_3 18 UART1RX P0_4

19 LIN0TX P10_10 or

P0_2 20 LIN1TX P0_8

21 LIN0RX P10_9 or

P0_3 22 LIN1RX P0_7

23 IIC0SDL P10_3 24 IIC1SDL P9_1

25 IIC0SDA P10_2 26 IIC1SDA P9_0

27 CAN0TX P10_1 or

P0_0 28 CAN1TX P0_3

29 CAN0RX P10_0 or

P0_1 30 CAN1RX P0_2

31 SENTIN0 P8_0 32 SENTIN1 P9_0

33 SENTOUT0 P8_1 34 SENTOUT1 P9_1

35 PSI50Rx - 36 PSI51Rx -

37 PSI50Tx - 38 PSI51Tx -

39 PSI50Snyc - 40 PSI51Sync -

41 FLX0TX P11_1 42 FLX0EN P10_11

43 FLX0RX P10_14 44 FLXSTPWT P10_12

45 FLX1TX P10_8 46 FX1EN P10_13


R20UT4148ED0100 Rev. 1.00 15 2017-08-14


47 FLX1RX P10_9 48 FX1CLK P10_10

49 - - 50 - -

51 ETH0MDIO P12_4 52 ETH0MDC P12_5

53 ETH0RXD0 P10_1 54 EH0TXD0 P18_1

55 ETH0RXD1 P10_2 56 EH0TXD1 P18_2

57 ETH0RXD2 P10_4 58 EH0TXD2 P18_3

59 ETH0RXD3 P10_5 60 EH0TXD3 P18_4

61 ETH0RXDCLK P10_0 62 ETH0TXCLK P18_7

63 ETH0RXER P11_14 or P11_15

64 ETH0TXER P18_6

65 ETH0CRSDV P11_12 or P11_13

66 ETH0TXEN P18_5

67 ETH0RXDV P11_11 68 ETH0COL P11_10

69 ETH0RESET P2_6 70 ETH0LINK P18_0

71 - - 72 - -

73 USB0UDMF - 74 USB0UDMH -

75 USB0UDPF - 76 USB0UDPH -

77 - - 78 - -

79 - - 80 - -

81 - - 82 - -

83 - - 84 - -

85 DIGIO_0 P8_0 86 DIGIO_1 P8_1

87 DIGIO_2 P8_2 88 DIGIO_3 P8_3

89 DIGIO_4 P8_4 90 DIGIO_5 P8_5

91 DIGIO_6 P8_6 92 DIGIO_7 P11_0

93 DIGIO_8 P10_0 94 DIGIO_9 P10_7

95 DIGIO_10 P10_8 96 DIGIO_11 P10_15

97 DIGIO_12 P0_9 98 DIGIO_13 P0_10

99 DIGIO_14 P0_11 100 DIGIO_15 P0_12

101 - - 102 - -

103 MUX0 P10_4 104 MUX1 P10_5

105 MUX2 P10_6 106 - -

107 ADC0 AP0_0 108 ADC1 AP0_1

109 ADC2 AP0_2 110 ADC3 AP0_3

111 ADC4 AP0_4 112 ADC5 AP0_5

113 ADC6 AP0_6 114 ADC7 AP0_7

115 VDDIOF - 116 VDDIOF -




R20UT4148ED0100 Rev. 1.00 16 2017-08-14

7.1.2 Connector CN2


1 CAN2Tx P0_4 2 CAN3Tx P1_3

3 CAN2Rx P0_5 4 CAN3Rx P1_2



9 LIN2Tx P0_10 10 LIN3Tx P1_15

11 LIN2Rx P0_9 12 LIN3Rx P1_14

13 LIN4Tx P1_11 14 LIN5Tx P8_12

15 LIN4Rx P1_10 16 LIN5Rx P8_11

17 LIN6Tx P0_12 18 LIN7Tx P12_4

19

LIN6Rx P0_11 20 LIN7Rx P12_3

21 LIN8Tx P2_3 22 LIN9Tx P2_5

23 LIN8Rx P2_2 24 LIN9Rx P2_4

25 LIN10Tx P8_2 26 LIN11Tx P10_12

27 LIN10Rx P8_10 28 LIN11Rx P10_11

29 LIN12Tx P10_14 30 LIN13Tx P1_1

31 LIN12Rx P10_13 32 LIN13Rx P1_0

33 LIN14Tx P8_9 34 LIN15Tx P1_5

35 LIN14Rx P8_8 36 LIN15Rx P1_4

37 - - 38 - -

39 - - 40 - -

41 - - 42 - -

43 - - 44 - -

45 - - 46 - -



51 - - 52 - -

53 - - 54 - -

55 - - 56 - -

57 - - 58 - -

59 - - 60 - -

61 LIN16Tx P11_15 62 LIN17Tx P8_2

63 LIN16Rx P12_0 64 LIN17Rx P8_10

65 - - 66 - -

67 - - 68 - -

69 - - 70 - -

71 - - 72 - -

73 - - 74 - -

75 - - 76 - -

77 - - 78 - -

79 - - 80 - -

81 - - 82 - -

83 - - 84 - -


R20UT4148ED0100 Rev. 1.00 17 2017-08-14


85 - - 86 - -

87 - - 88 - -

89 - - 90 - -

91 - - 92 - -

93 - - 94 - -

95 - - 96 - -

97 - - 98 - -

99 - - 100 - -

101 - - 102 - -

103 - - 104 - -

105 - - 106 - -

107 - - 108 - -

109 - - 110 - -

111 - - 112 - -

113 - - 114 - -

115 - - 116 - -

117 - - 118 - -

119 - - 120 - -


R20UT4148ED0100 Rev. 1.00 18 2017-08-14

7.1.3 Connector CN3


1 PWM00 P10_0 2 PWM01 P10_1

3 PWM02 P10_2 4 PWM03 P10_3

5 PWM04 P10_7 6 PWM05 P10_8

7 PWM06 P10_9 8 PWM07 P10_10

9 PWM08 P9_0 10 PWM09 P9_1

11 PWM10 P0_4 12 PWM11 P0_1

13 PWM12 P0_2 14 PWM13 P0_3

15 PWM14 P8_0 16 PWM15 P8_1

17 PWM16 P10_11 18 PWM17 P10_12

19 PWM18 P10_13 20 PWM19 P10_14

21 PWM20 P9_2 22 PWM21 P9_3

23 PWM22 P8_2 24 PWM23 P8_3

25 PWM24 P10_15 26 PWM25 P11_0

27 PWM26 P11_1 28 PWM27 P11_2

29 PWM28 P11_3 30 PWM29 P11_4

31 PWM30 P11_5 32 PWM31 P11_6

33 PWM32 P11_7 34 PWM33 P9_4

35 PWM34 P9_5 or

P0_11 36 PWM35

P9_6 or

P0_6

37 PWM36 P8_4 38 PWM37 P8_5

39 PWM38 P8_6 40 PWM39 P8_7

41 PWM40 P8_8 42 PWM41 P8_9

43 PWM42 P8_10 44 PWM43 P8_11

45 PWM44 P8_12 46 PWM45 P0_12

47 PWM46 P0_13 48 PWM47 P0_14

49 PWM48 P11_8 50 PWM49 P11_9

51 PWM50 P11_10 52 PWM51 P11_11

53 PWM52 P11_12 54 PWM53 P11_13

55 PWM54 P11_14 56 PWM55 P11_15

57 PWM56 P12_0 58 PWM57 P12_1

59 PWM58 P12_2 60 PWM59 P20_4

61 PWM60 P20_5 62 PWM61 P18_0

63 PWM62 P18_1 64 PWM63 P18_2

65 PWM64 P20_0 66 PWM65 P20_1

67 PWM66 P20_2 68 PWM67 P20_3

69 PWM68 P12_3 70 PWM69 P12_4

71 PWM70 P12_5 72 PWM71 P18_3

73 PWM72 - 74 PWM73 -

75 PWM74 - 76 PWM75 -

77 PWM76 - 78 PWM77 -

79 PWM78 - 80 PWM79 -

81 PWMADC00 AP0_8 82 PWMADC01 AP0_9


R20UT4148ED0100 Rev. 1.00 19 2017-08-14









97 - - 98 - -

99 - - 100 - -

101 - - 102 - -

103 - - 104 - -

105 - - 106 - -

107 - - 108 - -

109 - - 110 - -

111 - - 112 - -

113 - - 114 - -

115 - - 116 - -

117 - - 118 - -

119 - - 120 - -


R20UT4148ED0100 Rev. 1.00 20 2017-08-14

Chapter 8 Other circuitry

8.1 Push button for RESET

In order to issue a RESET to the device, the push-button SW1 is available.

8.2 Mode Selection

The PiggyBack Board gives the possibility to configure the following mode pins

FLMD0 via jumper JP25

FLMD1 via jumper JP19

MODE0 via jumper JP28



To apply “High” or “Low” to the mode pins, the pins 1 and 2, or the pins 2 and 3 (if available) of the corresponding jumper must be closed, respectively.

Note: Pin 1 of all jumpers is marked by a small circle.

CAUTION: Be careful in configuration of mode related pins. Wrong configuration and operation of the device outside of its specification can cause irregular behaviour of the device and long term damage cannot be excluded. Be sure to check the corresponding User’s Manual for details, which modes are specified for the used device

Note: In the very most cases the ‘Normal operating mode’ of the device will be used. This mode is for execution of the user program. The on-chip debug functions also use this mode.

To select the ‘Normal operating mode’ of the device, the FLMD0 pin must be pulled low. To do so, close the pins 2-3 on the jumper JP25:

All other jumper related to the mode selection can be left open.


R20UT4148ED0100 Rev. 1.00 21 2017-08-14

8.3 Signalling LEDs

Eight LEDs are provided to allow visual observation of the output state of device port pins. Device pins P8_0 to P8_7 are connected to the even pins 2 to 16 of the pin header CN24, while the LEDs 1 to 8 are connected to the odd pins 1 to 15, respectively.

Thus the LEDs can be either connected to

the device port pins P8_0 to P8_7 by closing the connection on CN24 using a jumper, or

any device port pin by using the provided wire connections.


R20UT4148ED0100 Rev. 1.00 22 2017-08-14

Chapter 9 Mechanical dimensions

100,00mm

160,

00m

m

CN2

CN1

24,0

0m

m24

,00

mm

CN3

9,00

mm

CN4

9,00

mm

80,0

0m

m

50,00mm


R20UT4148ED0100 Rev. 1.00 23 2017-08-14

Chapter 10 Schematic

P11<13>

PIN

72

RE

G0V

CC

RE

G0V

CC

P11<14>

P11<14>

RH

850/F

1K

EC

O, A

DV

AN

CE

D, P

RE

MIU

M (

nam

ed F

1K

)

ISO

VC

L

(nam

e F

1K

H )

P11<13>

P11<13>

P11<13>

RH

850/F

1M

EC

O, A

DV

AN

CE

D (

nam

ed F

1M

)P

11<14>

PIN

60

RH

850/F

1L E

CO

AD

VA

NC

ED

, P

RE

MIU

M (

nam

ed F

1L)

(nam

e F

1K

M )

ISO

VC

L

P11<14>

PIN

14

PIN

13

RH

850/F

1H

EC

O, P

RE

MIU

M (

nam

ed F

1H

)

PIN

114

P9<6>

ISO

VS

S

ISO

VC

L

P9<5>

ISO

VS

S

RE

G1V

CC

(F1L, F

1M

, F

1H

, F

1K

)

(F1L, F

1M

, F

1H

, F

1K

)

(F1K

M),

F1K

H)

(F1K

M),

F1K

H)

P1<7>

P1<6>

(F1L, F

1M

, F

1H

, F

1K

)

(F1L, F

1M

, F

1H

, F

1K

)

(F1K

M),

F1K

H)

(F1K

M),

F1K

H)

(F1K

M),

F1K

H)

(F1M

, F

1H

)

(F1L, F

1K

)

(F1K

M)

(F1K

H)

(F1M

, F

1H

)

(F1L, F

1K

)

P1<7>

P1<7>

P1<6>

P1<6>

PIN

73

P9<5>

ISO

VC

L

PIN

113

RE

G0V

CC

RE

G0V

CC

RE

G0V

CC

RE

G0V

CC

RE

G0V

CC

ISO

VS

S

ISO

VS

SIS

OV

SS

P1<7>

P1<7>

ISO

VS

S

P1<6>

ISO

VC

L

P1<6>

ISO

VC

LIS

OV

SS

P9<6>

ISO

VS

S

Rh850/F

1K

M S

C160/S

C240

MA

IN_O

SC

ILLA

TO

R

32.6

86K

HZ

X2

SU

B_O

SC

ILLA

TO

R

Rh850/F

1K

H

1

Fri J

un 3

0 1

0:4

6:1

6 2

01

7P

AG

E 1

OF

4

Rh850_F1X

_176pin

_P

B_T1_V

4

1.0

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A B C D E F

A B C D E F


R20UT4148ED0100 Rev. 1.00 25 2017-08-14

PW

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M69

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M67

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M65

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M61

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M63

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MA

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DIG

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DIG

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DIG

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DIG

IO_9

DIG

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M56

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M54

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M52

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NC

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P10<4>

P10<5>

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NC

NC

NC

NC

NC

NC

NC

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P8<2>

P8<4>

P8<6>

P10<0>

P10<8>

P0<9>

P0<11>

P9<0>

NC

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P9<3>

NC

P0<5>

P0<4>

P0<8>

P0<7>

P9<1>

P9<0>

P0<3>

P0<2>

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NC

NC

NC

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P10<12>

P10<13>

P10<10>

NC

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P18<1>

P18<2>

P18<3>

P18<4>

P18<7>

P18<5>

P11<10>

P18<0>

NC

NC

NC

NC

NC

NC

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P8<5>

P11<0>

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P10<15>

P0<10>

P0<12>

NC

NC

P10<4>

P10<5>

P10<6>

NC

AP

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AP

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AP

0<2>

AP

0<3>

AP

0<4>

AP

0<5>

AP

0<6>

AP

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P11<0>

P11<4>

P18<3>

NC

NC

NC

NC

AP

0<12>

P8<12>

P8<10>

AP

1<6>

AP

1<4>

AP

0<14>

AP

1<0>

AP

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AP

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P20<2>

P12<3>

P20<0>

P18<1>

P12<2>

PW

M34

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P11<12>

P11<10>

P11<8>

P8<8>

P8<4>

P11<7>

P11<3>

P11<1>

P8<2>

P9<2>

P10<13>

P10<11>

P8<0>

P0<4>

P9<0>

P10<2>

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

AP

0<15>

P12<4>

P18<2>

P20<4>

P12<1>

P11<15>

P11<13>

P0<12>

P8<11>

PW

M35

P11<6>

P8<3>

P8<1>

P0<3>

P0<1>

P9<1>

P10<10>

P10<3>

P10<1>

NC

NC

NC

NC

NC

P10<0>

P9<6>

P10<8>

P10<14>

P10<12>

AP

0<11>

P20<3>

P18<0>

P11<2>

AP

0<9>

AP

0<13>

AP

1<5>

AP

1<7>

P0<13>

P20<1>

P12<5> NC

P20<5>

P9<4>

NC

P0<2>

P11<14>

P11<9>

P10<9>

P10<10>

P0<3>

NC

AP

1<2>

P0<11>

P8<6>

P8<9>

P8<7>

P10<7>

P9<5>

P10<15>

P9<3>

P0<2>

P10<9>

P0<3>

P10<0>

P0<1>

P11<14>

P11<15>

P11<12>

NC

NC

P8<5>

P0<6>

P8<3>

NC

P10<10>

P10<8>

NC

P8<1>

P8<0>

P2<6>

P11<11>

P10<3>

P10<2>

UA

RT

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P11<11>

P0<14>

P11<5>

P10<9>

P0<0>

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321321

128

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

100

99

98

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

98

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128

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105

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98

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96

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92

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88

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86

85

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79

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77

76

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71

70

69

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A B C D E F

A B C D E F


R20UT4148ED0100 Rev. 1.00 26 2017-08-14

MA

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A B C D E F

A B C D E F


R20UT4148ED0100 Rev. 1.00 27 2017-08-14

Chapter 11 Revision History

The table provides information about the major changes of the document versions.

Date Version Description

2017-08-14 1.00 Initial release

l rh850/f1x-176pin piggyback board - renesas … · rh850/f1x-176pin piggyback board v4...

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