Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

nsH

igh

Spee

d In

terc

onne

ct S

olut

ions

HIROSE ELECTRIC

IT3-32mm SI Report

Three-Piece Mezzanine Connectorfor 20+ Gbps Applications

October 29, 2009

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

2

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Outline

What is IT3 HFSS simulation models for connector and via Insertion and return losses, NEXT, FEXT, and

impedance profile Insertion loss to crosstalk ratio (ICR)

Fully populated vs. 50% density Connector-only vs. full channel

Eye diagrams Summary Appendix

Measurement vs. simulation correlation Measured ICR for IT3-25mm

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

3

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

What is IT3

Proven 3-piece design for improved electrical performance and mechanical reliability

Signal Ground

Interposer

Signal / Ground configuration

Mating sideMating / unmating

Locking latch

Mating receptacleIT3D-***S-BGA(**)

Interposerassembly

Mounting sideInstalled and locked

Mounting receptacle IT3M-***S-BGA(**)

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

4

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

HFSS simulation model

A .s60p file was created, and the differential pair’s response was examined.

Only a quadrant of model is shown.

54321

109876

Signal pin

Ground pin

Differential pairs

1514131211

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

5

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Via modelLayer No. Mil

Solder mask 0.51 TOP 2.84

Pre-preg 4.52 Ground 0.7

Core 33 Sig 1 0.7

Pre-preg 3.54 Sig 2 0.7

Core 35 Ground 0.7

Pre-preg 3.56 Ground 0.7

Core 37 Sig 3 0.7

Pre-preg 3.58 Sig 4 0.7

Core 39 Ground 0.7

Pre-preg 3.510 Ground 0.7

Core 311 Sig 5 0.7

Pre-preg 3.512 Sig 6 0.7

Core 313 Ground 0.7

Pre-preg 3.514 Ground 0.7

Core 315 Sig 7 0.7

Pre-preg 3.516 Sig 8 0.7

Core 317 Ground 0.7

Pre-preg 3.518 Ground 0.7

Core 319 Sig 9 0.7

Pre-preg 3.520 Sig10 0.7

Core 321 Ground 0.7

Pre-preg 3.522 Ground 0.7

Core 323 Sig11 0.7

Pre-preg 3.524 Sig12 0.7

Core 325 Ground 0.7

Pre-preg 3.526 Ground 0.7

Core 327 Sig13 0.7

Pre-preg 3.528 Sig14 0.7

Core 329 Ground 0.7

Pre-preg 4.530 BOTTOM 2.84

Solder mask 0.5121.78Total thickness (mil)

A .s60p Touchstone file was also created to study the effect of via stub and coupling.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

6

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

IEEE 802.3ap channel spec.

IEEE 802.3ap defined the channel spec. of insertion-loss-to-crosstalk ratio (ICR) up to 5 GHz for 10 Gbps data rate. We will extrapolate this ICR curve to 10 GHz for 20 Gbps data rate.

5

log7.183.23 10GHzf

10 GHz (for 20 Gbps)

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

7

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Connector’s ICR

The connector and via transition’s contribution to ICR is independent of channel length, because the insertion loss and crosstalk attenuate at the same rate.

Board A

Board B Insertion loss

FEXT

Board A

Board B

Insertion loss

NEXT

ICR wrt. FEXT:

ICR wrt. NEXT:

Connector and via transition is assumed to be at approximately the middle of channel.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

8

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

IT3-32mm connector-only response(Fully populated)

Impedance and delay @1 GHz

All insertion and return losses, and NEXT and FEXT are shown.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

9

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

IT3-32mm connector-only response(60% density)

Both NEXT and FEXT are reduced, if some pins are skipped (i.e., terminated or assigned to low-speed signals).

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

IT3-32mm connector-only response(50% density)

Even less NEXT and FEXT with 50% density.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

11

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Impedance @60ps rise time (20% to 80%)

IT3’s receptacles were designed to have slightly high impedance to offset the via’s and via stub’s low impedance.

Connector only Connector + ~60mil via stubs

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

12

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

ICR in a full channel(Fully populated)

ICR with 14-aggressor connector and via FEXT, and ~60 mil stub meets the extrapolated IEEE 802.3ap spec. for 20 Gbps.

6”

6”

IT3

120 milFR408

60 mil stub Via model

FEXT for via-connector-via(w/o trace attenuation)

ICR with 14 FEXTs

20 Gbps

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

13

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

ICR in a full channel(50% density)

ICR with 6-aggressor connector and via FEXT, and ~60 mil stub gives plenty of margin @20 Gbps, as compared to the extrapolated IEEE 802.3ap spec.

6”

6”

IT3

120 milFR408

60 mil stub Via model

ICR with 6 FEXTs

20 Gbps

FEXT for via-connector-via(w/o trace attenuation)

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

14

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Channel simulation @6.25 Gbps(Fully populated)

ADS simulation with 3-tap TX equalization gives good open eyes @6.25 Gbps with ~60mil via stub and 14 FEXT included.

Without connector

Jitter = 15.06ps

Eye Height = 987.57mV

With connector and 14 FEXT

Jitter = 18.57ps

Eye Height = 866.27mV

6”

6”

IT3

120 milFR408

60 mil stub Via model

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

15

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Channel simulation @12.5 Gbps(50% density)

ADS simulation with 3-tap TX equalization gives good open eyes @12.5 Gbps with ~60mil via stub and 6 FEXT included.

Without connector

Jitter = 12.44ps

Eye Height = 579.12mV

With connector and 6 FEXT

Jitter = 18.48ps

Eye Height = 469.88mV

6”

6”

IT3

120 milFR408

60 mil stub Via model

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

16

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Channel simulation @20 Gbps(50% density)

ADS simulation with 7-tap TX equalization gives good open eyes @20 Gbps with ~60mil via stub and 6 FEXT included.

Without connector

Jitter = 12.89ps

Eye Height = 320.58mV

With connector and 6 FEXT

Jitter = 19.39ps*

Eye Height = 194.93mV*

6”

6”

IT3

120 milFR408

60 mil stub Via model

*Degradation is mainly due to via stubs.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

17

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Summary

IT3 meets the extrapolated IEEE802.3ap’s ICR spec. for 20+ Gbps.

Both characterization and demo boards are available for evaluation.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

nsH

igh

Spee

d In

terc

onne

ct S

olut

ions

HIROSE ELECTRIC

Appendix A

Measurement vs. simulation correlation

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

19

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Measurement Setup

To measure the connector’s performance directly, we pre-characterized and de-embedded the test boards.

- =

Connector + Test Boards Bottom Test Board Top Test Board Connector Only

Bottom test board

Top test board

-

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

20

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Insertion and return losses

Good correlation in differential insertion and return losses.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

21

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

NEXT

Good correlation in differential NEXT.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

22

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

FEXT

Good correlation in differential FEXT.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

nsH

igh

Spee

d In

terc

onne

ct S

olut

ions

HIROSE ELECTRIC

Appendix B

Measured ICR for IT3-25mm

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

24

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Test board

VNA measurements were taken on 120mil test boards with IT3-25mm connector, 2 via transitions, and 6”+6” PCB traces routed through the middle layers.

* The ICR curves in the following slides will also be valid for other trace length.

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

25

Hig

h Sp

eed

Inte

rcon

nect

Sol

utio

ns

10-29-2009

Optimized 60% density for 20 Gbps

IT3 meets ICR spec. (with FEXT) for 20 Gbps if 40% pins are “skipped”.

ICR wrt. NEXT* ICR wrt. FEXT*

* These curves include 8 aggressors for one IT3-25mm connector and two via transitions. The skipped pins are terminated in this case.

“Skipped” pins

Victim pair13

15

17

W U R N L J G E C A