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ISO1050ZHCS321I –JUNE 2009–REVISED JANUARY 2015

ISO1050 隔隔离离式式 CAN 收收发发器器

1 特特性性 3 说说明明

1• 满足 ISO11898-2 的要求 ISO1050 是一款电镀隔离的 CAN 转发器，此转发器符

合或者优于 ISO11898-2 标准的技术规范。此器件有• 5000 VRMS隔离(ISO1050DW)几个由氧化硅 (SiO2) 绝缘隔栅分开的逻辑输入和输出• 2500 VRMS隔离

缓冲器，此绝缘隔栅为说明第一段中的ISO1050DW 和• 故障安全输出

针对 ISO1050DUB 的 2500 VRMS。与隔离式电源一• 低环路延迟：150ns（典型值），210ns（最大值）

起使用，此器件可防止数据总线或者其它电路上的噪音• 50kV/µs 瞬态抗扰度，典型值

电流进入本地接地并干扰和损坏敏感电路。• -27V 至 40V 的总线故障保护

• 驱动器 (TXD) 主导超时功能作为 CAN 收发器，该器件可为总线和 CAN 控制器分• I/O 电压范围支持 3.3V 和 5V 微处理器别提供差分发射能力和差分接收能力，信号传输速率高• 符合 DIN V VDE V 0884-10 (VDE V 0884- 达 1 兆位每秒 (Mbps)。该器件尤其适合工作在恶劣环

10):2006-12 和 DIN EN 61010-1 的 VDE 审批境下，其具有串线、过压和接地损耗保护（–27V 至

• 已通过 UL 1577 审批 40V）以及过热关断功能，共模电压范围为–12V 至• 已通过 IEC 60950-1、IEC 61010-1、 12V。IEC 60601-1 第三版（医疗）和组件接受通知 5A

的 CSA 审批 ISO1050 的额定工作环境温度范围为 –55°C 至

• 已通过 EN/UL/CSA 60950-1 审批的 TUV 5 KVRMS 105°C。强化绝缘（仅限 ISO1050DW）

器器件件信信息息(1)• 符合 GB4843.1-2011 的 CQC 强化绝缘（仅限

器器件件型型号号封封装装封封装装尺尺寸寸（（标标称称值值））ISO1050DW）SOP (8) 9.50mm × 6.57mm• 额定工作电压下典型值为 25 年使用寿命到特性 ISO1050SOIC (16) 10.30mm x 7.50mm（参见应用报告SLLA197和图 30）

(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。2 应应用用

简简化化电电路路原原理理图图• 工业自动化、控制、传感器和驱动系统

• 楼宇和温室环境控制（暖通空调 (HVAC)）控制自动化

• 安防系统

• 运输

• 医疗

• 电信

• 诸如CANopen，DeviceNet，NMEA2000，ARNIC825，ISO11783，CAN Kingdom，CANaerospace 的CAN 总线标准

1

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does not necessarily include testing of all parameters.

English Data Sheet: SLLS983

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http://www.ti.com/cn/lit/pdf/SLLA197

http://www-s.ti.com/sc/techlit/SLLS983.pdf

ISO1050ZHCS321I –JUNE 2009–REVISED JANUARY 2015 www.ti.com.cn

目目录录

1 特特性性.......................................................................... 1 8 Detailed Description ............................................ 158.1 Overview ................................................................. 152 应应用用.......................................................................... 18.2 Functional Block Diagram ....................................... 153 说说明明.......................................................................... 18.3 Feature Description................................................. 154 修修订订历历史史记记录录 ........................................................... 28.4 Device Functional Modes........................................ 205 Pin Configuration and Functions ......................... 5

9 Application and Implementation ........................ 226 Specifications......................................................... 69.1 Application Information............................................ 226.1 Absolute Maximum Ratings ..................................... 69.2 Typical Application .................................................. 226.2 ESD Ratings.............................................................. 6

10 Power Supply Recommendations ..................... 256.3 Recommended Operating Conditions....................... 611 Layout................................................................... 256.4 Thermal Information .................................................. 7

11.1 Layout Guidelines ................................................. 256.5 Electrical Characteristics: Supply Current................. 711.2 Layout Example .................................................... 256.6 Electrical Characteristics: Driver ............................... 7

12 器器件件和和文文档档支支持持 ..................................................... 266.7 Electrical Characteristics: Receiver .......................... 812.1 文档支持 ................................................................ 266.8 Switching Characteristics: Device............................. 812.2 商标 ....................................................................... 266.9 Switching Characteristics: Driver .............................. 812.3 静电放电警告......................................................... 266.10 Switching Characteristics: Receiver........................ 912.4 术语表 ................................................................... 266.11 Typical Characteristics ............................................ 9

13 机机械械封封装装和和可可订订购购信信息息 .......................................... 267 Parameter Measurement Information ................ 10

4 修修订订历历史史记记录录NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision H (June 2013) to Revision I Page

• 已添加引脚配置和功能部分，ESD 额定值表，特性描述部分，器件功能模式，应用和实施部分，电源相关建议部分，布局部分，器件和文档支持部分以及机械、封装和可订购信息部分........................................................................................ 1

Changes from Revision G (March 2013) to Revision H Page

• Changed title From: LIFE EXPECTANCY vs WORKING VOLTAGE (ISO1050DW To: LIFE EXPECTANCY vsWORKING VOLTAGE (ISO1050DUB)................................................................................................................................. 21

Changes from Revision F (January 2013) to Revision G Page

• Clarified clearance and creepage measurement method in ISOLATOR CHARACTERISTICS .......................................... 15• Clarified test methods for voltage ratings in INSULATION CHARACTERISTICS ............................................................... 16• Changed UL Single Protection Certification pending to Single Protection in REGULATORY INFORMATION

SECTION (certificate available)............................................................................................................................................ 17

Changes from Revision E (December 2011) to Revision F Page

• 已删除 ISO1050L 器件 ........................................................................................................................................................... 1• 已删除（ISO1050DUB 和ISO1050LDW） ............................................................................................................................ 1• 已删除说明第一段中的 ISO1050LDW.................................................................................................................................... 1• Added the PIN FUNCTIONS section...................................................................................................................................... 5• Added Note 1 to the DRIVER SWITCHING CHARACTERISTICS table ............................................................................... 8• 已删除 ISO1050LDW from INSULATION CHARACTERISTICS.......................................................................................... 16• 已删除 ISO1050LDW from REGULATORY INFORMATION ............................................................................................... 17• 已添加 the FUNCTIONAL DESCRIPTION section............................................................................................................... 17• 已删除 ISO1050LDW from LIFE EXPECTANCY vs WORKING VOLTAGE ....................................................................... 21

2 版权 © 2009–2015, Texas Instruments Incorporated


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ISO1050www.ti.com.cn ZHCS321I –JUNE 2009–REVISED JANUARY 2015

• Deleted 40V from the CANH and CANL input diagrams and output diagrams in the EQUIVALENT I/OSCHEMATICS ..................................................................................................................................................................... 21

• Changed the APPLICATION INFORMATION section.......................................................................................................... 22• 已更改 the BUS LOADING, LENGHT AND NUMBER OF NODES section......................................................................... 22• 已添加 the CAN TERMINATION section .............................................................................................................................. 23

Changes from Revision D (June 2011) to Revision E Page

• 已添加器件 ISO1050L ........................................................................................................................................................... 1• 已更改特性列表中的（DW 封装） ......................................................................................................................................... 1• 已更改特性列表中的（DUB 封装）在（ISO1050DUB和ISO1050LDW） ............................................................................ 1• 已将 IEC 60950-1 从 CSA 审批特性要点删除 ........................................................................................................................ 1• 从： IEC 60601-1（医疗）和 CSA 审批正在审理中至：已通过 IEC 60601-1（医疗）和 CSA 审批 ................................... 1• 添加了特性 - 5 KVRMS 增强.. ................................................................................................................................................ 1• Added Note 1 to the INSULATION CHARACTERISTICS table........................................................................................... 16• 已更改 VIORM From: 8-DUB Package to ISO1050DUB and ISO1050LDW ......................................................................... 16• 已更改 VIORM From: 16-DW to ISO1050DW ........................................................................................................................ 16• 已更改 the VISO Isolation voltage per UL section of the INSULATION CHARACTERISTICS table. .................................... 16• Changed the IEC 60664-1 Ratings Table ............................................................................................................................ 16• 已更改 the REGULATORY INFORMATION table ................................................................................................................ 17• 已更改 in note (1) 3000 to 2500 and 6000 to 5000 .............................................................................................................. 17• Changed From: File Number: 220991 (Approval Pending) To: File Number: 220991......................................................... 17• 已更改 in LIFE EXPECTANCY vs WORKING VOLTAGE (8-DUB PACKAGE TO: LIFE.....(ISO1050DW and

ISO1050LDW) ...................................................................................................................................................................... 21

Changes from Revision C (July 2010) to Revision D Page

• 已更改 the SUPPLY CURRENT table for ICC1 1st row From: Typ = 1 To: 1.8 and MAX = 2 To: 2.8..................................... 7• 已更改 the SUPPLY CURRENT table for ICC1 2nd row From: Typ = 2 To: 2.8 and MAX = 3 To: 3.6 ................................... 7• 已更改 the REGULATORY INFORMATION table ................................................................................................................ 17

Changes from Revision B (June 2009) to Revision C Page

• 已更改 IEC 60747-5-2 特性要点从：DW 封装审批正在审理中至：DUB 和 DW 封装已通过 VDE 审批 ................................ 1• 已更改 the Minimum Internal Gap value from 0.008 to 0.014 in the Isolator Characteristics table...................................... 15• 已更改 VIORM Specification From: 1300 To: 1200 per VDE certification............................................................................... 16• 已更改 VPR Specification From 2438 To: 2250..................................................................................................................... 16• 已添加 the Bus Loading paragraph to the Application Information section .......................................................................... 22

版权 © 2009–2015, Texas Instruments Incorporated 3




Changes from Revision A (Sept 2009) to Revision B Page

• 已添加已通过 IEC 60747-5-2 和 IEC61010-1 审批的信息..................................................................................................... 1• Changed DW package from preview to production data........................................................................................................ 5• 已添加 Insulation Characteristics and IEC 60664-1 Ratings tables ..................................................................................... 16• 已添加 IEC file number ......................................................................................................................................................... 17

Changes from Original (June 2009) to Revision A Page

• 已添加额定工作电压下典型值为 25 年使用寿命到特性 ......................................................................................................... 1• 已添加 LIFE EXPECTANCY vs WORKING VOLTAGE section ........................................................................................... 21

4 Copyright © 2009–2015, Texas Instruments Incorporated




5 Pin Configuration and Functions

16-PinDW Package

Top View

8-PinDUB Package

Top View

Pin FunctionsPIN

TYPE DESCRIPTIONNAME DW DUB

VCC1 1 1 Supply Digital-side supply voltage (3 to 5.5 V)

GND1 2 — Ground Digital-side ground connection

RXD 3 2 O CAN receive data output (LOW for dominant and HIGH for recessive bus states)

NC 4 — NC No connect


TXD 6 3 I CAN transmit data input (LOW for dominant and HIGH for recessive bus states)

GND1 7 4 Ground Digital-side ground connection

GND1 8 — Ground Digital-side ground connection

GND2 9 5 Ground Transceiver-side ground connection

GND2 10 — Ground Transceiver-side ground connection


CANL 12 6 I/O Low-level CAN bus line

CANH 13 7 I/O High-level CAN bus line


GND2 15 — Ground Transceiver-side ground connection

VCC2 16 8 Supply Transceiver-side supply voltage (5 V)

Copyright © 2009–2015, Texas Instruments Incorporated 5




6 Specifications

6.1 Absolute Maximum Ratings (1) (2)

MIN MAX UNITVCC1, VCC2 Supply voltage (3) –0.5 6 VVI Voltage input (TXD) –0.5 VCC1+ 0.5 (4) VVCANH or Voltage at any bus terminal (CANH, CANL) –27 40 VVCANL

IO Receiver output current –15 15 mATJ Junction temperature –55 150 °CTstg Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly and functional operation of the device at these or any other conditions beyond those indicated under Recommended OperatingConditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) This isolator is suitable for isolation within the safety limiting data. Maintenance of the safety data must be ensured by means ofprotective circuitry.

(3) All input and output logic voltage values are measured with respect to the GND1 logic side ground. Differential bus-side voltages aremeasured to the respective bus-side GND2 ground terminal.

(4) Maximum voltage must not exceed 6 V.

6.2 ESD RatingsVALUE UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±4000ElectrostaticV(ESD) Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±1500 Vdischarge

Machine model, ANSI/ESDS5.2-1996, all pins ±200

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating ConditionsMIN NOM MAX UNIT

VCC1 Supply voltage, controller side 3 5.5 VVCC2 Supply voltage, bus side 4.75 5 5.25 VVI or VIC Voltage at bus pins (separately or common mode) –12 (1) 12 VVIH High-level input voltage TXD 2 5.25 VVIL Low-level input voltage TXD 0 0.8 VVID Differential input voltage –7 7 V

Driver –70IOH High-level output current mA

Receiver –4Driver 70

IOL Low-level output current mAReceiver 4

TA Ambient Temperature –55 105 °CTJ Junction temperature (see Thermal Information) –55 125 °CPD Total power dissipation 200

VCC1= 5.5V, VCC2= 5.25V, TA=105°C, RL= 60Ω,PD1 Power dissipation by Side-1 25 mWTXD input is a 500kHz 50% duty-cycle square wavePD2 Power dissipation by Side-2 175Tj shutdown Thermal shutdown temperature (2) 190 °C

(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.(2) Extended operation in thermal shutdown may affect device reliability.





6.4 Thermal InformationISO1050

THERMAL METRIC (1) DW DUB UNIT16 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 76.0 73.3RθJC(top) Junction-to-case (top) thermal resistance 41 63.2RθJB Junction-to-board thermal resistance 47.7 43.0

°C/WψJT Junction-to-top characterization parameter 14.4 27.4ψJB Junction-to-board characterization parameter 38.2 42.7RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: Supply Currentover recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNITVI = 0 V or VCC1 , VCC1 = 3.3V 1.8 2.8

ICC1 VCC1 Supply current mAVI = 0 V or VCC1 , VCC1 = 5V 2.3 3.6

Dominant VI = 0 V, 60-Ω Load 52 73ICC2 VCC2 Supply current mA

Recessive VI = VCC1 8 12

(1) All typical values are at 25°C with VCC1 = VCC2 = 5 V.

6.6 Electrical Characteristics: Driverover recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITCANH 2.9 3.5 4.5

VO(D) Bus output voltage (Dominant) See 图 7 and 图 8, VI = 0 V, RL = 60 Ω VCANL 0.8 1.2 1.5

VO(R) Bus output voltage (Recessive) See 图 7 and 图 8, VI = 2 V, RL= 60 Ω 2 2.3 3 VSee 图 7, 图 8 and 图 9, VI = 0 V, RL = 60 Ω 1.5 3

VOD(D) Differential output voltage (Dominant) VSee 图 7, 图 8, and 图 9 VI = 0 V, RL = 45Ω, 1.4 3Vcc > 4.8 VSee 图 7 and 图 8, VI = 3 V, RL = 60 Ω –0.12 0.012

VOD(R) Differential output voltage (Recessive) VVI = 3 V, No Load –0.5 0.05

VOC(D) Common-mode output voltage (Dominant) 2 2.3 3See 图 14 V

VOC(pp) Peak-to-peak common-mode output voltage 0.3IIH High-level input current, TXD input VI at 2 V 5 μAIIL Low-level input current, TXD input VI at 0.8 V –5 μAIO(off) Power-off TXD leakage current VCC1, VCC2 at 0 V, TXD at 5 V 10 μA

See 图 17, VCANH = –12 V, CANL Open –105 –72See 图 17, VCANH = 12 V, CANL Open 0.36 1

IOS(ss) Short-circuit steady-state output current mASee 图 17, VCANL =–12 V, CANH Open –1 –0.5See 图 17, VCANL = 12 V, CANH Open 71 105

CO Output capacitance See receiver input capacitanceCMTI Common-mode transient immunity See 图 19, VI = VCC or 0 V 25 50 kV/μs




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6.7 Electrical Characteristics: Receiverover recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNITVIT+ Positive-going bus input threshold voltage 750 900 mV

See 表 1VIT– Negative-going bus input threshold voltage 500 650 mVVhys Hysteresis voltage (VIT+ – VIT–) 150 mV

IOH = –4 mA, See 图 12 VCC – 0.8 4.6VOH High-level output voltage with Vcc = 5 V V

IOH = –20 μA, See 图 12 VCC – 0.1 5IOL = 4 mA, See 图 12 VCC – 0.8 3.1

VOH High-level output voltage with Vcc1 = 3.3 V VIOL = 20 μA, See 图 12 VCC – 0.1 3.3IOL = 4 mA, See 图 12 0.2 0.4

VOL Low-level output voltage VIOL = 20 μA, See 图 12 0 0.1

CI Input capacitance to ground, (CANH or CANL) TXD at 3 V, VI = 0.4 sin (4E6πt) + 2.5 V 6 pFCID Differential input capacitance TXD at 3 V, VI = 0.4 sin (4E6πt) 3 pFRID Differential input resistance TXD at 3 V 30 80 kΩRIN Input resistance (CANH or CANL) TXD at 3 V 15 30 40 kΩ

Input resistance matchingRI(m) VCANH = VCANL –3% 0% 3%(1 – [RIN (CANH) / RIN (CANL)]) × 100%CMTI Common-mode transient immunity VI = VCC or 0 V, See 图 19 25 50 kV/μs

(1) All typical values are at 25°C with VCC1 = VCC2 = 5 V.

6.8 Switching Characteristics: Deviceover recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITTotal loop delay, driver input to receiver output, Recessive totloop1 See 图 15 112 150 210 nsDominantTotal loop delay, driver input to receiver output, Dominant totloop2 See 图 15 112 150 210 nsRecessive

6.9 Switching Characteristics: Driverover recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITtPLH Propagation delay time, recessive-to-dominant output 31 74 110tPHL Propagation delay time, dominant-to-recessive output 25 44 75

See 图 10 nstr Differential output signal rise time 20 50tf Differential output signal fall time 20 50tTXD_DTO

(1) Dominant time-out ↓ CL=100 pF, See 图 16 300 450 700 μs

(1) The TXD dominant time out (tTXD_DTO) disables the driver of the transceiver once the TXD has been dominant longer than (tTXD_DTO)which releases the bus lines to recessive preventing a local failure from locking the bus dominant. The driver may only transmitdominant again after TXD has been returned HIGH (recessive). While this protects the bus from local faults locking the bus dominant itlimits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worstcase where five successive dominant bits are followed immediately by an error frame. This along with the (tTXD_DTO) minimum limits theminimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11/ (tTXD_DTO) = 11 bits / 300 µs = 37 kbps.




1

10

100

250 350 450 550 650 750 850 950

Signaling Rate - kbps

I 1 = 3.3 VCC

I 1 = 5 VCC

I 2 = 5 VCC

I-

Su

pp

ly C

urr

en

t -

mA

CC

1

1.5

2

2.5

3

3.5

V = CANHO

-60 -40 -20 0 20 40 60 80 100 120

T - Free-Air Temperature - °CA

V-

Ou

tpu

t V

olt

ag

e -

VO

V = CANLO

140

150

160

170

180

190

200

-60 -40 -20 0 20 40 60 80 100 120


Lo

op

Tim

e -

ns

V 1 = 3 V,

V 2 = 4.75 VCC

CC

V 1 = 5 V,

V 2 = 5 VCC

CC

V 1 = 5.5 V,

V 2 = 5.25 VCC

CC

145

147

149

151

153

155

157

159

161

163

-60 -40 -20 0 20 40 60 80 100 120


Lo

op

Tim

e -

ns

V 1 = 3 V,

V 2 = 4.75 VCC

CC

V 1 = 5.5 V,

V 2 = 5.25 VCC

CC

V 1 = 5 V,

V 2 = 5 VCC

CC


6.10 Switching Characteristics: Receiverover recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITtPLH Propagation delay time, low-to-high-level output 66 90 130tPHL Propagation delay time, high-to-low-level output 51 80 105

TXD at 3 V, See 图 12 nstr Output signal rise time 3 6tf Output signal fall time 3 6tfs Fail-Safe output delay time from bus-side power loss VCC1 at 5 V, See 图 18 6 μs

6.11 Typical Characteristics

图图 2. Dominant-to-Recessive Loop Time vs Free-Air图图 1. Recessive-to-Dominant Loop Time vs Free-AirTemperature (Across Vcc)Temperature (Across Vcc)

图图 4. Driver Output Voltage vs Free-Air Temperature图图 3. Supply Current (RMS) vs Signaling Rate (kbps)

图图 6. Emissions Spectrum to 50 MHz图图 5. Emissions Spectrum to 10 MHz




VI

(SEE NOTE A)

VO60TXD

CANL

CANH

±1%W CL = 100 pF

20%

(SEE NOTE B)

±

Vcc/2 Vcc/2

Vcc

tf

tr

tPLH

tPHL

10%

90%0.9V

0 V

VO(D)

VO(R)

0.5V

VI

VO

0 V VOD

-2V <Vtest< 7 V

330

60

330

TXD

CANL

CANH

±1%

±1%

±1%+_

W

W

W

GND2

» 2.5 V

» 3.5 V

» 1.5 V

Recessive

Dominant

O (CANH)V

O (CANL)V

0 or

Vcc1

VI

TXD

CANH

CANL

VO(CANL) VO(CANH)

VOD

IO(CANH)

IO(CANL)

GND2GND1

GND1 GND2

II

VOC

VO(CANH) + VO(CANL)

2

RL


7 Parameter Measurement Information

图图 7. Driver Voltage, Current and Test Definitions

图图 8. Bus Logic State Voltage Definitions

图图 9. Driver VOD With Common-Mode Loading Test Circuit

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle,tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.

B. CL includes instrumentation and fixture capacitance within ±20%.

图图 10. Driver Test Circuit and Voltage Waveforms




RXD

CANH

CANL

GND 2 GND 1

V I

(SEE NOTE A) 1 .5 V

IO

V O

CL = 15 pF

20 %(SEE NOTE B)

±

VI

VO

2 V2.4 V

3.5 V

VOH

t ftr

t pHL

1.5 V

VOL

90 %

10 %0.3 Vcc 1

0.7 Vcc 1

tpLH

RXD

CANH

CANL

GND2 GND1

VI(CANH)

VI(CANL)

IO

VIC

VI(CANH)

=

VI(CANL)+2

VID

VO


Parameter Measurement Information (接接下下页页)

图图 11. Receiver Voltage and Current Definitions

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle,tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.

B. CL includes instrumentation and fixture capacitance within ±20%.

图图 12. Receiver Test Circuit and Voltage Waveforms

表表 1. Differential Input Voltage Threshold TestINPUT OUTPUT

VCANH VCANL |VID| R–11.1 V –12 V 900 mV L

12 V 11.1 V 900 mV LVOL–6 V –12 V 6 V L

12 V 6 V 6 V L–11.5 V –12 V 500 mV H

12 V 11.5 V 500 mV H–12 V –6 V –6 V H VOH

6 V 12 V –6 V HOpen Open X H




TXD

RXD

60 WVI

15 pF

CANH

CANL

+

VO

_

±20%

±1%

GND1

TXD Input

0 V

Vcc

OutputRXD

50%

50%

VOH

VOL

tloop1

50%

tloop2

CANH

CANL47 nF

VI ± 20%

TXD

W27 ±1 %

W27 ±1 %OCV

=O(CANH)V

O(CANL)V+

2

GND1 GND 2

VOC

VOC(pp)

CANH

CANL

RXD

The waveforms of the applied transients are in accordance

with ISO 7637 part 1, test pulses 1, 2, 3a, and 3b.

TXD

1 nF

1 nF

15 pF

GND2 GND1

VI

+

_


图图 13. Transient Overvoltage Test Circuit

图图 14. Peak-to-Peak Output Voltage Test Circuit and Waveform

图图 15. tLOOP Test Circuit and Voltage Waveforms




TXD

RXD

15pF

+

VO±20%

W60

CANH

CANL

±1%CL

NOTE:CL=100pF

includes instrumentationand fixture capacitancewithin ± 20%.

VCC 2

VI

0 V

GND 1

VOH

VCC2

0 Vtfs

VO

VI

2.7 V

VOL

50%

IOS

TXD

-12V or 12V

0 V or VCC1

CANH

CANL VI

GND2

IOS (P)IOS (SS)

15 s

VI

10 ms

0 V

0 V

12 V

-12 V

or

0 V

VI

RL= 60

(see Note B )

CANH

CANH

TXD±1%W

(see Note A )

CL

VI

VOD

GND 1

Vcc

VI

VOD 500 mV900 mV

0 V

VOD(D)

0 V

tTXD_DTO


A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.B. CL includes instrumentation and fixture capacitance within ±20%.

图图 16. Dominant Time-out Test Circuit and Voltage Waveforms

图图 17. Driver Short-Circuit Current Test Circuit and Waveforms

图图 18. Fail-Safe Delay Time Test Circuit and Voltage Waveforms




ISO1050

30 W

CANH

CANL

47nF 10 nF

Spectrum Analyzer

TXD500kbps

30 W

6.2 kW

6.2 kW

VOLVOH or

TXD

RXD

VCC 1

1 k W

60 W

VCC2

GND 1

V TEST

GND 2

CL = 15 pF

(includes probe and

jig capacitance)

C = 0.1 F 1%m ±CANH

CANL

GND1

C = 0.1 Fm

±1%

S 1

2.0 V

0.8 V

VOLVOH or

GND2


图图 19. Common-Mode Transient Immunity Test Circuit

图图 20. Electromagnetic Emissions Measurement Setup




VCC1

RXD

TXD

VCC2

GA

LV

AN

ICIS

OLA

TIO

N

GND1 GND2

CANH

CANL


8 Detailed Description

8.1 OverviewThe ISO1050 is a digitally isolated CAN transceiver with a typical transient immunity of 50 kV/µs. The device canoperate from 3.3-V supply on side 1 and 5-V supply on side 2. This is of particular advantage for applicationsoperating in harsh industrial environments because the 3.3 V on side 1 enables the connection to low-voltmicrocontrollers for power preservation, whereas the 5 V on side 2 maintains a high signal-to-noise ratio of thebus signals.

8.2 Functional Block Diagram

8.3 Feature Description

表表 2. Isolator Characteristics (1) (2)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITShortest pin-to-pin distance through air, per JEDECL(I01) Minimum air gap (Clearance) 6.1 mmpackage dimensions

DUB-8Minimum external tracking Shortest pin-to-pin distance across the packageL(I02) 6.8 mm(Creepage) surface, per JEDEC package dimensions

Shortest pin-to-pin distance through air, per JEDECL(I01) Minimum air gap (Clearance) 8.34 mmpackage dimensionsDW-16

Minimum external tracking Shortest pin-to-pin distance across the packageL(I02) 8.10 mm(Creepage) surface, per JEDEC package dimensionsMinimum Internal Gap (Internal Distance through the insulation 0.014 mmClearance)

Input to output, VIO = 500 V, all pins on each side of thebarrier tied together creating a two-pin device, >1012 Ω

RIO Isolation resistance TA = 25°CInput to output, VIO = 500 V, 100°C ≤TA ≤TA max >1011 Ω

CIO Barrier capacitance VI = 0.4 sin (4E6πt) 1.9 pFCI Input capacitance to ground VI = 0.4 sin (4E6πt) 1.3 pF

(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Careshould be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator onthe printed-circuit-board do not reduce this distance.

(2) Creepage and clearance on a printed-circuit-board become equal according to the measurement techniques shown in the IsolationGlossary. Techniques such as inserting grooves and/or ribs on a printed-circuit-board are used to help increase these specifications.





表表 3. Insulation CharacteristicsPARAMETER TEST CONDITIONS SPECIFICATION UNIT

Maximum working insulation ISO1050DUB 560VIORM voltage per DIN V VDE V 0884-10 Vpeak1200ISO1050DW(VDE V 0884-10):2006-12

Input to output test voltage per ISO1050DUB VP R = 1.875 x VIORM, t = 1 1050VPR DIN V VDE V 0884-10 (VDE V sec (100% production) Vpeak

ISO1050DW 22500884-10):2006-12 Partial discharge < 5 pCTransient overvoltage per DIN V t = 60 sec (qualification)

VIOTM VDE V 0884-10 (VDE V 0884- 4000 Vpeakt = 1 sec (100% production)10):2006-12t = 60 sec (qualification) 2500

ISO1050DUB - Double Protection Vrmst = 1 sec (100% production) 3000

VISO Isolation voltage per UL 1577t = 60 sec (qualification) 4243

ISO1050DW - Single Protection Vrmst = 1 sec (100% production) 5092

RS Isolation resistance VIO = 500 V at TS > 109 ΩPollution Degree 2

表表 4. IEC 60664-1 RatingsPARAMETER TEST CONDITIONS SPECIFICATION

Basic isolation group Material group IIRated mains voltage ≤ 150 Vrms I–IVRated mains voltage ≤ 300 Vrms I–III

Installation classification Rated mains voltage ≤ 400 Vrms I–IIRated mains voltage ≤ 600 Vrms (ISO1050DW only) I-IIRated mains voltage ≤ 848 Vrms (ISO1050DW only) I

表表 5. IEC Safety Limiting Values (1)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITθJA = 73.3 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C 310

DUB-8 mAθJA = 73.3 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C 474

IS Safety input, output, or supply currentθJA = 76 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C 299

DW-16 mAθJA = 76 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C 457

TS Maximum case temperature 150 °C

(1) Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the I/O canallow low resistance to ground or the supply and, without current limiting dissipate sufficient power to overheat the die and damage theisolation barrier potentially leading to secondary system failures.

The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximumratings table. The power dissipation and junction-to-air thermal impedance of the device installed in theapplication hardware determines the junction temperature. The assured junction-to-air thermal resistance inThermal Information is that of a device installed on a High-K Test Board for Leaded Surface Mount Packages.The power is the recommended maximum input voltage times the current. The junction temperature is then theambient temperature plus the power times the junction-to-air thermal resistance.




Case Temperature (°C)

Sa

fety

Lim

itin

g C

urr

en

t(m

A)

0 50 100 150 2000

100

200

300

400

500

D001

VCC1 = 3.6 VVCC1 = VCC2 = 5.5 V

Case Temperature (°C)

Sa

fety

Lim

itin

g C

urr

en

t(m

A)

0 50 100 150 2000

100

200

300

400

500

D002

VCC1 = 3.6 VVCC1 = VCC2 = 5.5 V


图图 21. DUB-8 θJC Thermal Derating Curve per VDE 图图 22. DW-16 θJC Thermal Derating Curve per VDE

表表 6. Regulatory InformationVDE TUV CSA UL CQC

Certified according to DIN V Certified according to EN/UL/CSA Approved under CSA Recognized under 1577 Certified according toVDE V 0884-10 (VDE V 60950-1 Component Acceptance Component Recognition GB4943.1-20110884-10):2006-12 & DIN EN Notice 5A Program (1)

61010-1

Basic Insulation ISO1050DW: 5000 VRMS Reinforced ISO1050DUB: 2500 VRMS ISO1050DW:Transient Overvoltage, 4000 Insulation Double Protection5000 VRMS Reinforced Insulation, Reinforced Insulation,VPK 2 Means of Patient ISO1050DW: 3500 VRMS Altitude ≤ 5000 m, Tropical400 VRMS maximum workingSurge Voltage, 4000 VPK Protection at 125 VRMS per Double Protection, Climate, 250 VRMS maximumvoltageMaximum Working Voltage, IEC 60601-1 (3rd Ed.) 4243 VRMS Single Protection working voltage5000 VRMS Basic Insulation,1200 VPK (ISO1050DW) and 600 VRMS maximum working560 VPK (ISO1050DUB) voltage

ISO1050DUB:2500 VRMS Reinforced Insulation,400 VRMS maximum workingvoltage2500 VRMS Basic Insulation,600 VRMS maximum workingvoltage

Certificate number: Certificate number: U8V 11 09 Master contract number: File number: E181974 Certificate number:40016131 77311 008 220991 CQC14001109541

(1) Production tested ≥ 3000 VRMS (ISO1050DUB) and 5092 VRMS (ISO1050DW) for 1 second in accordance with UL 1577.

8.3.1 CAN Bus StatesThe CAN bus has two states during operation: dominant and recessive. A dominant bus state, equivalent to logiclow, is when the bus is driven differentially by a driver. A recessive bus state is when the bus is biased to acommon mode of VCC / 2 through the high-resistance internal input resistors of the receiver, equivalent to a logichigh. The host microprocessor of the CAN node will use the TXD pin to drive the bus and will receive data fromthe bus on the RXD pin. See 图 23 and 图 24.




RXDVCC/2

CANH

CANL

GA

LVA

NIC

IS

OLA

TIO

N

Recessive

Logic H

Dominant

Logic L

Recessive

Logic H

Time, t

Ty

pic

al

Bu

sV

olt

ag

e(V

)

Normal & Silent Mode

CANL

CANH

Vdiff(D)

Vdiff(R)

4

3

2

1


图图 23. Bus States (Physical Bit Representation)

图图 24. Simplified Recessive Common Mode Bias and Receiver

8.3.2 Digital Inputs and OutputsTXD (Input) and RXD (Output):VCC1 for the isolated digital input and output side of the device maybe supplied by a 3.3-V or 5-V supply and thusthe digital inputs and outputs are 3.3-V and 5-V compatible.

注注TXD is very weakly internally pulled up to VCC1. An external pullup resistor should be usedto make sure that TXD is biased to recessive (high) level to avoid issues on the bus if themicroprocessor doesn't control the pin and TXD floats. TXD pullup strength and CAN bittiming require special consideration when the device is used with an open-drain TXDoutput on the CAN controller of the microprocessor. An adequate external pullup resistormust be used to ensure that the TXD output of the microprocessor maintains adequate bittiming input to the input on the transceiver.

8.3.3 Protection Features

8.3.3.1 TXD Dominant Time-Out (DTO)TXD DTO circuit prevents the local node from blocking network communication in the event of a hardware orsoftware failure where TXD is held dominant longer than the time-out period tTXD_DTO. The TXD DTO circuit timerstarts on a falling edge on TXD. The TXD DTO circuit disables the CAN bus driver if no rising edge is seenbefore the time-out period expires. This frees the bus for communication between other nodes on the network.The CAN driver is re-activated when a recessive signal is seen on the TXD pin, thus clearing the TXD DTOcondition. The receiver and RXD pin still reflect the CAN bus, and the bus pins are biased to recessive levelduring a TXD dominant time-out.18 版权 © 2009–2015, Texas Instruments Incorporated



Normal CAN

communication

CAN Bus

Signal

TXD fault stuck dominant: example PCB failure or

bad software

Fault is repaired and local node

transmission capability restored

TXD

%XVZRXOGEH³VWXFNGRPLQDQW´EORFNLQJ

communication for the whole network but TXD DTO prevents this and frees the bus for communication after the time tTXD_DTO.

tTXD_DTO

Communication from

repaired local node

Communication from other

network nodes

TX

D IN

PU

T

CA

N B

US

OU

TP

UT

W

ITH

TX

D D

TO


注注The minimum dominant TXD time allowed by the TXD DTO circuit limits the minimumpossible transmitted data rate of the device. The CAN protocol allows a maximum ofeleven successive dominant bits (on TXD) for the worst case, where five successivedominant bits are followed immediately by an error frame. This, along with the tTXD_DTOminimum, limits the minimum data rate. Calculate the minimum transmitted data rate by:Minimum Data Rate = 11 / tTXD_DTO.

图图 25. Example Timing Diagram for Devices With TXD DTO

8.3.3.2 Thermal ShutdownIf the junction temperature of the device exceeds the thermal shut down threshold the device turns off the CANdriver circuits thus blocking the TXD to bus transmission path. The shutdown condition is cleared when thejunction temperature drops below the thermal shutdown temperature of the device. If the fault condition is stillpresent, the temperature may rise again and the device would enter thermal shut down again. Prolongedoperation with thermal shutdown conditions may affect device reliability.

注注During thermal shutdown the CAN bus drivers turn off; thus no transmission is possiblefrom TXD to the bus. The CAN bus pins are biased to recessive level during a thermalshutdown, and the receiver to RXD path remains operational.

8.3.3.3 Undervoltage Lockout and Fail-SafeThe supply pins have undervoltage detection that places the device in protected or fail-safe mode. This protectsthe bus during an undervoltage event on VCC1 or VCC2 supply pins. If the bus-side power supply Vcc2 is lowerthan about 2.7V, the power shutdown circuits in the ISO1050 will disable the transceiver to prevent falsetransmissions due to an unstable supply. If Vcc1 is still active when this occurs, the receiver output (RXD) will goto a fail-safe HIGH (recessive) value in about 6 microseconds.

表表 7. Undervoltage Lockout and Fail-SafeVCC1 VCC2 DEVICE STATE BUS OUTPUT RXD

GOOD GOOD Functional Per Device State and TXD Mirrors BusBAD GOOD Protected Recessive High Impedance (3-state)

GOOD BAD Protected High Impedance Recessive (Fail-Safe High)

space

注注After an undervoltage condition is cleared and the supplies have returned to valid levels,the device typically resumes normal operation in 300 µs





8.3.3.4 Floating PinsPullups and pulldowns should be used on critical pins to place the device into known states if the pins float. TheTXD pin should be pulled up through a resistor to VCC1 to force a recessive input level if the microprocessoroutput to the pin floats.

8.3.3.5 CAN Bus Short-Circuit Current LimitingThe device has several protection features that limit the short-circuit current when a CAN bus line is shorted.These include driver current limiting (dominant and recessive). The device has TXD dominant state time out toprevent permanent higher short-circuit current of the dominant state during a system fault. During CANcommunication the bus switches between dominant and recessive states with the data and control fields bits,thus the short-circuit current may be viewed either as the instantaneous current during each bus state, or as aDC average current. For system current (power supply) and power considerations in the termination resistorsand common-mode choke ratings, use the average short-circuit current. Determine the ratio of dominant andrecessive bits by the data in the CAN frame plus the following factors of the protocol and PHY that force eitherrecessive or dominant at certain times:

• Control fields with set bits• Bit-stuffing• Interframe space• TXD dominant time-out (fault case limiting)

These ensure a minimum recessive amount of time on the bus even if the data field contains a high percentageof dominant bits.

注注The short-circuit current of the bus depends on the ratio of recessive to dominant bits andtheir respective short-circuit currents. The average short-circuit current may be calculatedwith the following formula:

IOS(AVG) = %Transmit × [(%REC_Bits × IOS(SS)_REC) + (%DOM_Bits × IOS(SS)_DOM)] +[%Receive × IOS(SS)_REC]

Where• IOS(AVG) is the average short-circuit current.• %Transmit is the percentage the node is transmitting CAN messages.• %Receive is the percentage the node is receiving CAN messages.• %REC_Bits is the percentage of recessive bits in the transmitted CAN messages.• %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages.• IOS(SS)_REC is the recessive steady state short-circuit current.• IOS(SS)_DOM is the dominant steady state short-circuit current.

注注Consider the short.circuit current and possible fault cases of the network when sizing thepower ratings of the termination resistance and other network components.

8.4 Device Functional Modes

表表 8. Driver Function TableINPUT OUTPUTS

DRIVEN BUS STATETXD (1) CANH (1) CANL (1)

L H L DominantH Z Z Recessive

(1) H = high level, L = low level, Z = common mode (recessive) bias to VCC / 2. See 图 23 and 图 24 forbus state and common mode bias information.




RXD Output

Vcc2

CANL

CANH and CANL Outputs

CANH Input

Vcc2

Input

TXD Input

CANL Input

Vcc2

Input

CANH

10 kW

20 kW

10 kW

10 kW

10 kW

20 kW

OUT

8 W

13 W

IN

1 MW

500 W

VCC1 VCC1 VCC1

VCC1


表表 9. Receiver Function TableCAN DIFFERENTIAL INPUTSDEVICE MODE BUS STATE RXD PIN (1)

VID = VCANH – VCANL

VID ≥ 0.9 V Dominant L0.5 V < VID < 0.9 V ? ?

Normal or SilentVID ≤ 0.5 V Recessive H

Open (VID ≈ 0 V) Open H

(1) H = high level, L = low level, ? = indeterminate.

表表 10. Function Table (1)

DRIVER RECEIVERINPUTS OUTPUTS DIFFERENTIAL INPUTS OUTPUT

BUS STATE BUS STATEVID = CANH–CANL RXDTXD CANH CANLL (2) H L DOMINANT VID ≥ 0.9 V L DOMINANTH Z Z RECESSIVE 0.5 V < VID < 0.9 V ? ?

Open Z Z RECESSIVE VID ≤ 0.5 V H RECESSIVEX Z Z RECESSIVE Open H RECESSIVE

(1) H = high level; L = low level; X = irrelevant; ? = indeterminate; Z = high impedance(2) Logic low pulses to prevent dominant time-out.

图图 26. Equivalent I/O Schematics




1

2

3

4

5

6

7

8

14

13

12

9,10

IN

EN

GND NC

OUT1

3

5

42

ISO1050

TPS76350

RXD

VCC1

NC

TXD

GND1

GND1

GND1

NC

NC

CANH

GND2

4

3

2 6

51

CANL

NC11

7

8

16VCC2

15

RXD

TXDMCU

Vdd

DGND

PSU

L1

N

PE

3.3V

0V

Protective

Earth

Chasis

GroundDigital

Ground

ISO

Ground

Optional Bus

protection

function

SN6501

VCC

D2

D1

GND2

GND1

Galvanic

Isolation

Barrier


9 Application and Implementation

注注Information in the following applications sections is not part of the TI componentspecification, and TI does not warrant its accuracy or completeness. TI’s customers areresponsible for determining suitability of components for their purposes. Customers shouldvalidate and test their design implementation to confirm system functionality.

9.1 Application InformationISO1050 can be used with other components from TI such as a microcontroller, a transformer driver, and a linearvoltage regulator to form a fully isolated CAN interface.

9.2 Typical Application

图图 27. Application Circuit

9.2.1 Design RequirementsUnlike optocoupler-based solution, which needs several external components to improve performance, providebias, or limit current, ISO1050 only needs two external bypass capacitors to operate.

9.2.2 Detailed Design Procedure

9.2.2.1 Bus Loading, Length and Number of NodesThe ISO11898 Standard specifies a maximum bus length of 40 m and maximum stub length of 0.3 m with amaximum of 30 nodes. However, with careful design, users can have longer cables, longer stub lengths, andmany more nodes to a bus. A high number of nodes requires a transceiver with high input impedance such asthe ISO1050.




MCU or DSP

CANController

CANTransceiver

Node 1

MCU or DSP

CANController

CANTransceiver

Node 2

MCU or DSP

CANController

CANTransceiver

Node 3

MCU or DSP

CANController

CANTransceiver

Node n

(with termination)

RTERM

RTERM


Typical Application (接接下下页页)Many CAN organizations and standards have scaled the use of CAN for applications outside the originalISO11898 standard. They have made system level trade offs for data rate, cable length, and parasitic loading ofthe bus. Examples of some of these specifications are ARINC825, CANopen, CAN Kingdom, DeviceNet andNMEA200.

A CAN network design is a series of tradeoffs, but these devices operate over wide –12-V to 12-V common-mode range. In ISO11898-2 the driver differential output is specified with a 60-Ω load (the two 120-Ω terminationresistors in parallel) and the differential output must be greater than 1.5 V. The ISO1050 is specified to meet the1.5-V requirement with a 60-Ω load, and additionally specified with a differential output of 1.4 V with a 45-Ω load.The differential input resistance of the ISO1050 is a minimum of 30 kΩ. If 167 ISO1050 transceivers are inparallel on a bus, this is equivalent to a 180-Ω differential load. That transceiver load of 180 Ω in parallel with the60 Ω gives a total 45 Ω. Therefore, the ISO1050 theoretically supports over 167 transceivers on a single bussegment with margin to the 1.2-V minimum differential input at each node. However for CAN network designmargin must be given for signal loss across the system and cabling, parasitic loadings, network imbalances,ground offsets and signal integrity thus a practical maximum number of nodes is typically much lower. Bus lengthmay also be extended beyond the original ISO11898 standard of 40 m by careful system design and data ratetradeoffs. For example, CAN open network design guidelines allow the network to be up to 1km with changes inthe termination resistance, cabling, less than 64 nodes and significantly lowered data rate.

This flexibility in CAN network design is one of the key strengths of the various extensions and additionalstandards that have been built on the original ISO11898 CAN standard. In using this flexibility comes theresponsibility of good network design.

9.2.2.2 CAN TerminationThe ISO11898 standard specifies the interconnect to be a single twisted pair cable (shielded or unshielded) with120-Ω characteristic impedance (ZO). Resistors equal to the characteristic impedance of the line should be usedto terminate both ends of the cable to prevent signal reflections. Unterminated drop-lines (stubs) connectingnodes to the bus should be kept as short as possible to minimize signal reflections. The termination may be in anode, but if nodes may be removed from the bus, the termination must be carefully placed so that it is notremoved from the bus.

图图 28. Typical CAN Bus

Termination may be a single 120-Ω resistor at the end of the bus, either on the cable or in a terminating node. Iffiltering and stabilization of the common mode voltage of the bus is desired, then split termination may be used.(See 图 29). Split termination improves the electromagnetic emissions behavior of the network by eliminatingfluctuations in the bus common-mode voltages at the start and end of message transmissions.




10

100

0 250 500 750 1000

V – Working Voltage – VIORM

Life E

xpecta

ncy

–Y

ears

880120

V at 560 VIORM28 Years

G001

CAN

Transceiver

CANL

CANH

CSPLIT

CAN

TransceiverRTERM

Standard Termination Split Termination

CANL

CANH

R /2TERM

R /2TERM


Typical Application (接接下下页页)

图图 29. CAN Bus Termination Concepts

9.2.3 Application Curve

图图 30. Life Expectancy vs Working Voltage (ISO1050DUB)




10 mils

10 mils

40 milsFR-4

0r ~ 4.5

Keep this space free

from planes,traces , pads,

and vias

Ground plane

Power plane

Low-speed traces

High-speed traces


10 Power Supply RecommendationsTo ensure reliable operation at all data rates and supply voltages, a 0.1-µF bypass capacitor is recommended atinput and output supply pins (VCC1 and VCC2). The capacitors should be placed as close to the supply pins aspossible. If only a single primary-side power supply is available in an application, isolated power can begenerated for the secondary-side with the help of a transformer driver such as TI's SN6501. For suchapplications, detailed power supply design and transformer selection recommendations are available in SN6501data sheet (SLLSEA0).

11 Layout

11.1 Layout GuidelinesA minimum of four layers is required to accomplish a low EMI PCB design (see 图 31). Layer stacking should bein the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low-frequencysignal layer.• Routing the high-speed traces on the top layer avoids the use of vias (and the introduction of their

inductances) and allows for clean interconnects between the isolator and the transmitter and receiver circuitsof the data link.

• Placing a solid ground plane next to the high-speed signal layer establishes controlled impedance fortransmission line interconnects and provides an excellent low-inductance path for the return current flow.

• Placing the power plane next to the ground plane creates additional high-frequency bypass capacitance ofapproximately 100 pF/in2.

• Routing the slower speed control signals on the bottom layer allows for greater flexibility as these signal linksusually have margin to tolerate discontinuities such as vias.

If an additional supply voltage plane or signal layer is needed, add a second power / ground plane system to thestack to keep it symmetrical. This makes the stack mechanically stable and prevents it from warping. Also thepower and ground plane of each power system can be placed closer together, thus increasing the high-frequencybypass capacitance significantly.

For detailed layout recommendations, see Application Note SLLA284, Digital Isolator Design Guide.

11.1.1 PCB MaterialFor digital circuit boards operating below 150 Mbps, (or rise and fall times higher than 1 ns), and trace lengths ofup to 10 inches, use standard FR-4 epoxy-glass as PCB material. FR-4 (Flame Retardant 4) meets therequirements of Underwriters Laboratories UL94-V0, and is preferred over cheaper alternatives due to its lowerdielectric losses at high frequencies, less moisture absorption, greater strength and stiffness, and its self-extinguishing flammability-characteristics.

11.2 Layout Example

图图 31. Recommended Layer Stack




http://www.ti.com/product/SN6501/description

http://www.ti.com/cn/lit/pdf/SLLSEA0



12 器器件件和和文文档档支支持持

12.1 文文档档支支持持

12.1.1 相相关关文文档档

• 《ISO72x 系列数字隔离器高压使用寿命》（文献编号：SLLA197）• 《用于隔离电源的变压器驱动器》（文献编号：SLLSEA0）• 《数字隔离器设计指南》（文献编号：SLLA284）

12.2 商商标标

All trademarks are the property of their respective owners.

12.3 静静电电放放电电警警告告

这些装置包含有限的内置 ESD 保护。存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损伤。

12.4 术术语语表表

SLYZ022 — TI 术语表。

这份术语表列出并解释术语、首字母缩略词和定义。

SLLA353 -- 《隔离相关术语》。

13 机机械械封封装装和和可可订订购购信信息息

以下页中包括机械封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。





http://www.ti.com/cn/lit/pdf/SLLSEA0


http://www.ti.com/cn/lit/pdf/SLYZ022


重重要要声声明明

德州仪器(TI) 及其下属子公司有权根据 JESD46 最新标准, 对所提供的产品和服务进行更正、修改、增强、改进或其它更改，并有权根据JESD48 最新标准中止提供任何产品和服务。客户在下订单前应获取最新的相关信息, 并验证这些信息是否完整且是最新的。所有产品的销售都遵循在订单确认时所提供的TI 销售条款与条件。

TI 保证其所销售的组件的性能符合产品销售时 TI 半导体产品销售条件与条款的适用规范。仅在 TI 保证的范围内，且 TI 认为有必要时才会使用测试或其它质量控制技术。除非适用法律做出了硬性规定，否则没有必要对每种组件的所有参数进行测试。

TI 对应用帮助或客户产品设计不承担任何义务。客户应对其使用 TI 组件的产品和应用自行负责。为尽量减小与客户产品和应用相关的风险，客户应提供充分的设计与操作安全措施。

TI 不对任何 TI 专利权、版权、屏蔽作品权或其它与使用了 TI 组件或服务的组合设备、机器或流程相关的 TI 知识产权中授予的直接或隐含权限作出任何保证或解释。TI 所发布的与第三方产品或服务有关的信息，不能构成从 TI 获得使用这些产品或服务的许可、授权、或认可。使用此类信息可能需要获得第三方的专利权或其它知识产权方面的许可，或是 TI 的专利权或其它知识产权方面的许可。

对于 TI 的产品手册或数据表中 TI 信息的重要部分，仅在没有对内容进行任何篡改且带有相关授权、条件、限制和声明的情况下才允许进行复制。TI 对此类篡改过的文件不承担任何责任或义务。复制第三方的信息可能需要服从额外的限制条件。

在转售 TI 组件或服务时，如果对该组件或服务参数的陈述与 TI 标明的参数相比存在差异或虚假成分，则会失去相关 TI 组件或服务的所有明示或暗示授权，且这是不正当的、欺诈性商业行为。TI 对任何此类虚假陈述均不承担任何责任或义务。

客户认可并同意，尽管任何应用相关信息或支持仍可能由 TI 提供，但他们将独力负责满足与其产品及在其应用中使用 TI 产品相关的所有法律、法规和安全相关要求。客户声明并同意，他们具备制定与实施安全措施所需的全部专业技术和知识，可预见故障的危险后果、监测故障及其后果、降低有可能造成人身伤害的故障的发生机率并采取适当的补救措施。客户将全额赔偿因在此类安全关键应用中使用任何 TI 组件而对 TI 及其代理造成的任何损失。

在某些场合中，为了推进安全相关应用有可能对 TI 组件进行特别的促销。TI 的目标是利用此类组件帮助客户设计和创立其特有的可满足适用的功能安全性标准和要求的终端产品解决方案。尽管如此，此类组件仍然服从这些条款。

TI 组件未获得用于 FDA Class III（或类似的生命攸关医疗设备）的授权许可，除非各方授权官员已经达成了专门管控此类使用的特别协议。

只有那些 TI 特别注明属于军用等级或“增强型塑料”的 TI 组件才是设计或专门用于军事/航空应用或环境的。购买者认可并同意，对并非指定面向军事或航空航天用途的 TI 组件进行军事或航空航天方面的应用，其风险由客户单独承担，并且由客户独力负责满足与此类使用相关的所有法律和法规要求。

TI 已明确指定符合 ISO/TS16949 要求的产品，这些产品主要用于汽车。在任何情况下，因使用非指定产品而无法达到 ISO/TS16949 要求，TI不承担任何责任。

产品应用

数字音频 www.ti.com.cn/audio 通信与电信 www.ti.com.cn/telecom放大器和线性器件 www.ti.com.cn/amplifiers 计算机及周边 www.ti.com.cn/computer数据转换器 www.ti.com.cn/dataconverters 消费电子 www.ti.com/consumer-appsDLP® 产品 www.dlp.com 能源 www.ti.com/energyDSP - 数字信号处理器 www.ti.com.cn/dsp 工业应用 www.ti.com.cn/industrial时钟和计时器 www.ti.com.cn/clockandtimers 医疗电子 www.ti.com.cn/medical接口 www.ti.com.cn/interface 安防应用 www.ti.com.cn/security逻辑 www.ti.com.cn/logic 汽车电子 www.ti.com.cn/automotive电源管理 www.ti.com.cn/power 视频和影像 www.ti.com.cn/video微控制器 (MCU) www.ti.com.cn/microcontrollersRFID 系统 www.ti.com.cn/rfidsysOMAP应用处理器 www.ti.com/omap无线连通性 www.ti.com.cn/wirelessconnectivity 德州仪器在线技术支持社区 www.deyisupport.com

IMPORTANT NOTICE

邮寄地址：上海市浦东新区世纪大道1568 号，中建大厦32 楼邮政编码： 200122Copyright © 2015, 德州仪器半导体技术（上海）有限公司

http://www.ti.com.cn/audio

http://www.ti.com.cn/telecom

http://www.ti.com.cn/amplifiers

http://www.ti.com.cn/computer

http://www.ti.com.cn/dataconverters

http://www.ti.com.cn/home_a_consumer_electronics

http://www.dlp.com

http://www.ti.com.cn/hdr_a_energy

http://www.ti.com.cn/dsp

http://www.ti.com.cn/industrial

http://www.ti.com.cn/clockandtimers

http://www.ti.com.cn/home_a_medical

http://www.ti.com.cn/interface

http://www.ti.com.cn/home_a_security

http://www.ti.com.cn/logic

http://www.ti.com.cn/automotive

http://www.ti.com.cn/power

http://www.ti.com.cn/home_a_vi

http://www.ti.com.cn/microcontrollers

http://www.ti.com.cn/rfidsys

http://www.ti.com/omap

http://www.ti.com.cn/home_p_wirelessconnectivity

PACKAGE OPTION ADDENDUM

www.ti.com 24-Apr-2015

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

ISO1050DUB ACTIVE SOP DUB 8 50 Green (RoHS& no Sb/Br)

CU NIPDAU Level-4-260C-72 HR -55 to 105 ISO1050

ISO1050DUBR ACTIVE SOP DUB 8 350 Green (RoHS& no Sb/Br)

CU NIPDAU Level-4-260C-72 HR -55 to 105 ISO1050

ISO1050DW ACTIVE SOIC DW 16 40 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -55 to 105 ISO1050

ISO1050DWR ACTIVE SOIC DW 16 2000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -55 to 105 ISO1050

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

http://www.ti.com/product/ISO1050?CMP=conv-poasamples#samplebuy




http://www.ti.com/productcontent

PACKAGE OPTION ADDENDUM

www.ti.com 24-Apr-2015

Addendum-Page 2

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

ISO1050DUBR SOP DUB 8 350 330.0 24.4 10.9 10.01 5.85 16.0 24.0 Q1

ISO1050DWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

ISO1050DUBR SOP DUB 8 350 346.0 346.0 41.0

ISO1050DWR SOIC DW 16 2000 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 2

www.ti.com

PACKAGE OUTLINE

C10.710.1 TYP

6X 2.54

4X(1.524)

2X7.62

0.3550.204 TYP

0 - 4

8X 0.5550.355

6.626.52

0.38 MIN

0.635GAGE PLANE

4.85 MAX

1.451.15

A

9.559.02

NOTE 3

B 6.676.57

4X (0.99)

4222355/D 08/2017

SOP - 4.85 mm max heightDUB0008ASMALL OUTLINE PACKAGE

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.254 mm per side.

18

0.1 C A B

54

PIN 1 ID

ALTERNATEPIN 1 ID

SEATING PLANE

0.1 C

SEE DETAIL A

TOP MOLD

DETAIL ATYPICAL

SCALE 1.200

www.ti.com

EXAMPLE BOARD LAYOUT

(9.1)

0.07 MAXALL AROUND

0.07 MINALL AROUND

8X (2.35)

8X (0.65)

6X (2.54)

(R0.05)TYP

4222355/D 08/2017


SYMM

SYMM

LAND PATTERN EXAMPLEEXPOSED METAL SHOWN

SCALE:5X

1

45

8

NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METALSOLDER MASKOPENING

NON SOLDER MASKDEFINED

SOLDER MASK DETAILSNOT TO SCALE

EXPOSED METAL

SOLDER MASKOPENING

METAL UNDERSOLDER MASK

SOLDER MASKDEFINED

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(9.1)

6X (2.54)

8X (0.65)

8X (2.35)(R0.05) TYP

4222355/D 08/2017


NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design.

SYMM

SYMM

1

45

8

SOLDER PASTE EXAMPLEBASED ON 0.125 mm THICK STENCIL

SCALE:5X

IMPORTANT NOTICE重重要要声声明明

德州仪器 (TI) 公司有权按照最新发布的 JESD46 对其半导体产品和服务进行纠正、增强、改进和其他修改，并不再按最新发布的 JESD48 提供任何产品和服务。买方在下订单前应获取最新的相关信息，并验证这些信息是否完整且是最新的。

TI 公布的半导体产品销售条款 (http://www.ti.com/sc/docs/stdterms.htm) 适用于 TI 已认证和批准上市的已封装集成电路产品的销售。另有其他条款可能适用于其他类型 TI 产品及服务的使用或销售。

复制 TI 数据表上 TI 信息的重要部分时，不得变更该等信息，且必须随附所有相关保证、条件、限制和通知，否则不得复制。TI 对该等复制文件不承担任何责任。第三方信息可能受到其它限制条件的制约。在转售 TI 产品或服务时，如果存在对产品或服务参数的虚假陈述，则会失去相关 TI 产品或服务的明示或暗示保证，且构成不公平的、欺诈性商业行为。TI 对此类虚假陈述不承担任何责任。

买方和在系统中整合 TI 产品的其他开发人员（总称“设计人员”）理解并同意，设计人员在设计应用时应自行实施独立的分析、评价和判断，且应全权负责并确保应用的安全性，及设计人员的应用（包括应用中使用的所有 TI 产品）应符合所有适用的法律法规及其他相关要求。设计人员就自己设计的应用声明，其具备制订和实施下列保障措施所需的一切必要专业知识，能够 (1) 预见故障的危险后果，(2) 监视故障及其后果，以及 (3) 降低可能导致危险的故障几率并采取适当措施。设计人员同意，在使用或分发包含 TI 产品的任何应用前，将彻底测试该等应用和该等应用中所用 TI 产品的功能。

TI 提供技术、应用或其他设计建议、质量特点、可靠性数据或其他服务或信息，包括但不限于与评估模块有关的参考设计和材料（总称“TI 资源”），旨在帮助设计人员开发整合了 TI 产品的应用，如果设计人员（个人，或如果是代表公司，则为设计人员的公司）以任何方式下载、访问或使用任何特定的 TI 资源，即表示其同意仅为该等目标，按照本通知的条款使用任何特定 TI 资源。

TI 所提供的 TI 资源，并未扩大或以其他方式修改 TI 对 TI 产品的公开适用的质保及质保免责声明；也未导致 TI 承担任何额外的义务或责任。TI 有权对其 TI 资源进行纠正、增强、改进和其他修改。除特定 TI 资源的公开文档中明确列出的测试外，TI 未进行任何其他测试。

设计人员只有在开发包含该等 TI 资源所列 TI 产品的应用时，才被授权使用、复制和修改任何相关单项 TI 资源。但并未依据禁止反言原则或其他法理授予您任何TI知识产权的任何其他明示或默示的许可，也未授予您 TI 或第三方的任何技术或知识产权的许可，该等产权包括但不限于任何专利权、版权、屏蔽作品权或与使用TI产品或服务的任何整合、机器制作、流程相关的其他知识产权。涉及或参考了第三方产品或服务的信息不构成使用此类产品或服务的许可或与其相关的保证或认可。使用 TI 资源可能需要您向第三方获得对该等第三方专利或其他知识产权的许可。

TI 资源系“按原样”提供。TI 兹免除对资源及其使用作出所有其他明确或默认的保证或陈述，包括但不限于对准确性或完整性、产权保证、无屡发故障保证，以及适销性、适合特定用途和不侵犯任何第三方知识产权的任何默认保证。TI 不负责任何申索，包括但不限于因组合产品所致或与之有关的申索，也不为或对设计人员进行辩护或赔偿，即使该等产品组合已列于 TI 资源或其他地方。对因 TI 资源或其使用引起或与之有关的任何实际的、直接的、特殊的、附带的、间接的、惩罚性的、偶发的、从属或惩戒性损害赔偿，不管 TI 是否获悉可能会产生上述损害赔偿，TI 概不负责。

除 TI 已明确指出特定产品已达到特定行业标准（例如 ISO/TS 16949 和 ISO 26262）的要求外，TI 不对未达到任何该等行业标准要求而承担任何责任。

如果 TI 明确宣称产品有助于功能安全或符合行业功能安全标准，则该等产品旨在帮助客户设计和创作自己的符合相关功能安全标准和要求的应用。在应用内使用产品的行为本身不会配有任何安全特性。设计人员必须确保遵守适用于其应用的相关安全要求和标准。设计人员不可将任何 TI 产品用于关乎性命的医疗设备，除非已由各方获得授权的管理人员签署专门的合同对此类应用专门作出规定。关乎性命的医疗设备是指出现故障会导致严重身体伤害或死亡的医疗设备（例如生命保障设备、心脏起搏器、心脏除颤器、人工心脏泵、神经刺激器以及植入设备）。此类设备包括但不限于，美国食品药品监督管理局认定为 III 类设备的设备，以及在美国以外的其他国家或地区认定为同等类别设备的所有医疗设备。

TI 可能明确指定某些产品具备某些特定资格（例如 Q100、军用级或增强型产品）。设计人员同意，其具备一切必要专业知识，可以为自己的应用选择适合的产品，并且正确选择产品的风险由设计人员承担。设计人员单方面负责遵守与该等选择有关的所有法律或监管要求。

设计人员同意向 TI 及其代表全额赔偿因其不遵守本通知条款和条件而引起的任何损害、费用、损失和/或责任。

邮寄地址：上海市浦东新区世纪大道 1568 号中建大厦 32 楼，邮政编码：200122Copyright © 2017 德州仪器半导体技术（上海）有限公司

http://www.ti.com/sc/docs/stdterms.htm