intelsat - digital satellite communications technology handbook

PREFACE

The INTELSAT Digital Satellite Communications TechnologyHandbook has been prepared by the INTELSAT ApplicationSupport and Training department. The handbook is providedfree of charge to INTELSAT signatories and users under theINTELSAT Assistance and Development Program (IADP) andINTELSAT Signatory Training Program (ISTP).

INTELSAT will update the handbook from time to time. Pleaseaddress your questions or suggestions concerning thehandbook to:

ManagerApplication Support and Training (IADP/ISTP)Mail Stop 20BINTELSAT3400 International Drive, NWWashington, DC 20008-3098, USA

Telephone: +1 202 944 7070Facsimile: +1 202 944 8214Telex: (WUT) 89-2707International Telex: (WUI) 64290

First printed on: December 1989Revision 1: April 1992Revision 2: April 1995Revision 3: April 1999

Digital Satellite Communications Technology Handbook Contents

Last Updated: 12 March 1999 of 229 Doc. No.: DIGITECH-1998-HNDBK-102 Verify document currency before use. Pub. Rel. No.: 1

Contents

Chapter 1 - Overview

1.1 INTELSAT Overview.................................................................................................... 71.2 Digital Revolution ......................................................................................................... 81.3 Why Digital Instead of Analog? .................................................................................... 8

Chapter 2 - Digital Basics

2.1 Pulse Code Modulation (PCM)..................................................................................... 92.2 Delta Modulation ........................................................................................................ 142.3 ADPCM...................................................................................................................... 172.4 Advances in Speech Coding ...................................................................................... 252.5 Speech Coding at 16 Kb/s Using LD-CELP Technique.............................................. 252.6 Digital Multiplexing Basics.......................................................................................... 282.7 Time Division Multiplexing.......................................................................................... 292.8 Digital Hierarchies ...................................................................................................... 322.9 Digital Multiplexing/ Multiple Access........................................................................... 352.10 PCM Signaling Systems............................................................................................. 422.11 Alarms in Digital Environment .................................................................................... 442.12 Redundancy Switching............................................................................................... 502.13 Higher Order Digital Multiplexing................................................................................ 512.14 Multiple-Access Techniques....................................................................................... 60

Chapter 3 - Modem Basics

3.1 Modulation.................................................................................................................. 633.2 Network Line Codes................................................................................................... 683.3 User Interfaces........................................................................................................... 743.4 Echo Control .............................................................................................................. 813.5 Synchronization.......................................................................................................... 833.6 Digital Impairments..................................................................................................... 923.7 Errors ....................................................................................................................... 1063.8 Error Detection and Correction................................................................................. 112

Digital Satellite Communications Technology Handbook Contents


Chapter 4 - Applications

4.1 Network Architecture: Principles and Applications................................................... 1294.2 Data Network Compatibility and ISO........................................................................ 1334.3 Intermediate Data Rates (IDR) Carriers ................................................................... 1364.4 IDR Implementation ................................................................................................. 1484.5 Engineering Service Circuits (ESC) for IDR Carriers................................................ 1604.6 Alarm Concepts in IDR............................................................................................. 1664.7 Digital ESC............................................................................................................... 1674.8 TDMA and SSTDMA................................................................................................ 1684.9 INTELSAT Business Service (IBS) .......................................................................... 1684.10 INTELNET................................................................................................................ 1704.11 Circuit Multiplication Equipment ............................................................................... 1724.12 Packet Circuit Multiplication Equipment (PCME)...................................................... 1914.13 INTELSAT DAMA ................................................................................................... 1984.14 Very Small Aperture Terminal (VSAT) Networks...................................................... 2084.15 VSAT IBS................................................................................................................. 2084.16 Trellis-Coded Modulation Intermediate Data Rate (TCM IDR) Carriers.................... 210

Appendix A - Echo Control

1.0 Introduction .............................................................................................................. 2152.0 Echo Problems in Satellite Communications............................................................ 2153.0 Echo Control ............................................................................................................ 2164.0 Echo Suppressor...................................................................................................... 2165.0 Principle of Echo Cancellers .................................................................................... 2196.0 Summary.................................................................................................................. 224

Glossary


Digital Satellite Communications

Technology Handbook

Revision 3

Digital Satellite Communications Technology Handbook Chapter 1 - Overview


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INTELSAT is an acronym for International TelecommunicationsSatellite Organization. INTELSAT is an organization that belongs tomore than 142 countries, and owns and operates the most extensiveglobal communications satellite system. Many customers around theworld use INTELSAT’s communications satellite system for high-quality, reliable, and cost-effective international telecommunicationsservices. Many countries also use INTELSAT satellites for domesticpublic communications. INTELSAT is the major provider of internationalvoice and data communications traffic whose global satellite systemcarries much of the international television transmissions.

Since INTELSAT first began operations in 1965, communicationssatellites have virtually revolutionized society. Today, instantaneous"live" television coverage of headline events is commonplace, thetelevising of special events continues to claim increasingly largeraudiences, and efficient, low-cost telecommunications services arenow at one's fingertips. All of this happened much faster than anyonecould have envisioned at the time when the United Nations first put outits call for the peaceful exploration of outer space.

In accordance with its charter, INTELSAT provides international publictelecommunications services of high quality and reliability to allcountries of the world on a nondiscriminatory basis, and at the lowestpossible cost. Over 40 countries provide domestic services usingINTELSAT space segment capacity. International television services,including full-period leases, continue to grow rapidly, as do INTELSATBusiness Services (IBS) that provide fully integrated digital voice, data,and videoconferencing capabilities.

The successful implementation and growth of the INTELSAT systemhas, in large measure, been the result of an efficient organizationalstructure, a solid financial basis, and close continuing cooperationamong the organization and its users. The INTELSAT charter has

Digital Satellite Communications Technology Handbook Chapter 1 - Overview


enabled countries with different political systems and economiccapabilities to collaborate in an efficient commercial organization.INTELSAT has grown from a consortium consisting of a small numberof countries to a global organization, whose members include a majorityof the States in the International Telecommunication Union (ITU).

The achievements of INTELSAT during its relatively short historydemonstrate the enormously useful results that can be gained bycooperative efforts between the nations of the world. INTELSAT hasprovided international digital communications since the days of itsearliest satellites, and is now in the throes of a new revolution intelecommunications -- the “digital revolution”.

To encourage digitalization, INTELSAT has introduced new digitalservices and tariffs to provide an economic incentive for administrationsto convert from analog to digital operation. This handbook was createdto help support this initiative by providing an introduction to digitalsatellite communications technology.

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When INTELSAT was first formed, all satellite telephone traffic wascarried over the system using analog modulation . In the early 1960s,an alternative to analog modulation became a reality, and soon foundits place among the range of services offered by INTELSAT. Thealternative technique, known as Pulse Code Modulation (PCM), wasdigital technology, offering many advantages over the earlier analogtransmissions.

Now, more and more traffic carried by INTELSAT uses digitaltechniques as countries convert their national communications systemsto digital systems. This handbook provides the knowledge necessaryto operate and maintain digital services carried through an INTELSATEarth station.

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Advantages of digital over analog systems are, by now, too well knownto be repeated here. Digital systems have superior quality of receptionand regeneration capabilities, and offer highly cost-effective solutions inaddition to better network management capabilities.

Digital Satellite Communications Technology Handbook Chapter 2 – Digital Basics


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The object of any transmission system is to produce at the output, anexact replica of any input signal. In an AM or FM system, a carrier iscontinuously varied by the signal, i.e., in an analog manner. Thiscontinuous transmission of information about the original signal is notnecessary; it is sufficient to send "samples" at certain intervals torepresent it fully. This is similar, in concept, to a movie, where thesamples are individual photographs, which give the impression ofcontinuous motion when displayed at the correct rate. If this "sampling"is carried out at a rate of at least twice the highest frequency in thesignal, it is possible to recover all the information at the receiving endby suitable processing. For example, it is sufficient to sample anordinary telephone speech channel at 8000 times per second toreconstruct the signal fully.

PCM is the representation of a signal by a series of digital pulses;sampling, quantizing, and encoding. Such a system offers significanttechnical and economic advantages over an analog system. A.H.Reeves, an Englishman, invented PCM in 1937, but it was not until theadvent of the transistor technology that the complicated circuitrybecame a practical proposition.

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Sampling of an analog waveform results in a train of Pulse AmplitudeModulation (PAM) signals. Each sample is encoded into a binarynumber that represents the amplitude of the sample. It undergoesfurther processing, and is transmitted. These digital signals can be"regenerated" and retransmitted free from accumulated noise at anypoint in the transmission path. It is in this regeneration process thatPCM has an advantage over an analog system.



In an analog system, the amplification of the signal at repeaters alsoresults in the amplification of noise and crosstalk "picked-up", thus thesignal-to-noise ratio deteriorates progressively. In the case of PCM, thefinal output signal should be completely free from induced noise,irrespective of the complexity of the system, as the regenerators andreceiving equipment only detect whether a pulse is present or not.

At the receiver the digits are decoded and reformed into an analogsignal.

Figure 2.1 shows the basic process. For reasons of clarity, only oneregenerator is shown.

ENCODER

TRANSMIT TERMINAL

Analoginput

Noise

Noise

REGEN

REMOTE REGENERATOR

REGEN DECODER

RECEIVE TERMINAL

Reformed analog

output, free from

line noise

x10

DECISIONLEVELS

Figure 2.1 Simplified Digital Transmission System



PCM is the classical and PCM is the classical and most widely usedform of digital transmission. It converts the quantized samples intocode groups of binary pulses using fixed amplitudes. It allows onlycertain discrete values of sample size, rather than transmitting theexact amplitude of the sampled signal. When the signal is sampled in aPAM system, a discrete value closest to the true one is transmitted. Atthe receiving end, the signal level will have a value slightly differentfrom any one of the specified discrete steps due to noise anddistortions encountered in the transmission channel. If the disturbanceis negligible, it will be possible to tell accurately which discrete valuewas transmitted, and the original signal can be almost accuratelyreconstructed.

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Representing the original signal by discrete values which leads to alimited number of signal values is called “quantizing”. This processintroduces an error in the magnitude of the samples, called quantizationnoise. However, once the information is in a quantized state, it can berelayed over a reasonable distance without further loss in quality throughregeneration of the binary levels.

Systems using codes to represent discrete signal values (samples) arecalled PCM systems. In general, a group of on-off pulses can be used torepresent 2n discrete sample values. For example, 8` pulse positionswould yield 256 sample values.

For a linear codec with “n” binary digits per sample, the ratio of the signalpower to quantizing-distortion power (S/D) is given by the equation:

S/D = 6n + 1.8 dB

This relationship shows that each added binary digit increases the S/Dratio by 6 dB.

In practice, it is almost impossible to transmit information about the exactamplitude of the analog signals at various levels, as it will requireenormous bandwidth and power. Thus, when the analog signal issampled in a PAM system, the level nearest to the true amplitude istransmitted. At the receiving end, the signal is reformed to this level. Thisprocess of representing the signal by allowing only certain discreteamplitudes is called quantizing. It introduces an initial error in theamplitude of the samples, giving rise to quantization noise, or quantizationdistortion.



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Provided that line impairments do not prevent a correct decision regardingthe presence or otherwise of a pulse, the regeneration process caneliminate line noise. Therefore, only quantization noise will be present inthe reformed signal at the receiving end. In quantized signal transmissionsystems, design considerations decide the maximum noise whereas inanalog systems the transmission path determines it.

(Note: If the analog/digital transformation is made more than once, thequantization noise is cumulative.)

Figure 2.2 illustrates linear quantization coding and decoding processes.Let the actual amplitude of the signal be +1.7V. This is assigned decisionlevel 2, the same for any voltage between 1V and 2V, and is transmittedto the line as code 101. At the receiving end, the sample with code 101 isconverted to a pulse of +1.5V, the middle value of the decision level at theencoder. This results in an error of 0.4V between the input and the outputsignals. This type of error will occur in every sample except when thesample size exactly coincides with the mid-point of a decision level.

Decoder characteristicsEncoder characteristics

input code

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011

111

110

101

100

000

001

010

011

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3

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3

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samples

inputsignal

originalsignal

outputsignal

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Quantization error will be less if there are smaller steps. However,because increasing the number of steps complicates the subsequentcoding operation and increases the bandwidth requirements, it isdesirable not to use more steps than necessary.

Quantization noise depends on step size and not on signal amplitude. Iflinear quantization is used, the signal-to-quantizing noise ratio, or simplysignal-to-distortion ratio, will be large for high-level signals and small forlow-level signals. For this reason, it is preferable to use a nonlinearquantizing characteristic to obtain uniform distortion ratio.

By tapering the step size, it is possible to divide small signals into manysteps while large signals have correspondingly fewer steps for a givennumber of levels. This results in much better signal-to-distortion ratios forthe weak signals, but is slightly worse for the stronger signals. Becausethe quantization process is now virtually compressing the signal, it has tobe connected to a device at the distant end that performs the reverseprocess. This process of compressing and expanding is called“companding”. Hence this nonlinear process is said to have acompanding characteristic.

Two separate coding systems are in use, A-Law and µ-Law. Figure 2.3shows the A-Law companding characteristics for positive signal amplitudeadopted by the ITU-T for 30-channel PCM systems. As the negative partis identical, it follows that the complete characteristics consist of 8 positiveand 8 negative segments. Each segment consists of 16 equal quantizingsteps giving a total of 256 steps (0 to +127 and 0 to -127), but as theslope of adjacent segments (except 0 and 1) changes in the ratio 2:1, thesteps of segment 7, for instance, cover twice the range of signalamplitude as those in segment 6. It is possible to relate input levels(measured in dBmO) to the highest quantizing level. The highest signallevel allowed is about +3dBmO, corresponding to a highest quantizinglevel (or "peak code") of ±128. Lower signal levels correspond to lowerpeak codes.

A-Law characteristic is most commonly used throughout the world. Adifferent curve, known as the µ-Law characteristic, is used mainly in theU.S.A. and Canada. The shapes of the two curves are very similarexcept that they are coded differently.



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Earlier, a reference was made about the relationship between the highestinput frequency and the sampling rate. If this relationship is notmaintained, the frequency of the output signal will be incorrect. This error,or distortion, is called “aliasing”. To prevent it from occurring, a low passfilter, cutting off at 4 kHz, is fitted at the analog input to every PCMmultiplexer. The filter is known as the anti-aliasing filter.

input signal level

Any signals above thisampitude will be sent

as level 127

Completecharacteristic

0 x x x x x x x

1 x x x x x x x

input+-

Quantizing level

16

32

48

64

80

96

112

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16 steps each of range 1 amplitude unit

16 steps each of range 1 amplitude unit

16 steps each of range 2 amplitude units




16 steps each of range32 amplitude units

16 steps each of range64 amplitude units

Figure 2.3 ITU-T A-Law Encoding Characteristics: Positive Values

Delta modulation is an alternative method to encode an analog signalinto a digital bit-stream. There are several alternatives to conventionalPCM. Most of these result in bit rates lower than 64 Kb/s thatconventional PCM requires for each voice channel, and are commonlyknown as Low Rate Encoders (LREs). One such example is deltamodulation. Figure 2.4 shows the principal components used in theencoding process, and Figure 2.5 shows the process.

The audio signal is band limited by a low pass filter and is applied to acomparator. Here, it is compared with the output of an integrator whosevoltage level is dictated by the preceding bit pattern that was transmittedto the line.



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The comparator output has two states:a. Positive output, if the audio signal is at a higher level than theintegrator.b. Negative output, if the audio signal is at a lower level than theintegrator.

Then the comparator output is fed into a sampling gate before being fedto a squaring circuit.

The sampler (shown as a switch) opens and closes at the output bit rate,typically 32 Kb/s. The bits transmitted to line depend on the state of thesquaring circuit:

positive = 1negative = 0

Simultaneously, the output bit pattern is fed into the integrator.

In its simplest form, the integrator can be a capacitor charged via aresistor, where a "1" charges the capacitor in a positive direction. Thecharge on the capacitor is fed to the comparator. As the audio input levelcontinues to rise, it will be at a higher level than the integrator and another"1" will be transmitted to the line. This positive voltage charges thecapacitor, which is again compared with the audio input.

While the audio input rises rapidly, it will keep ahead of the chargingcapacitor in the integrator and a string of "1"s will be transmitted at 32Kb/s. (Refer to Figure 2.5.) When the audio input falls to a level which isbelow that of the integrator, a "0" is transmitted which, in turn, charges thecapacitor in the opposite direction, i.e., the positive charge is reduced.From Figure 2.5, it can be seen that the integrator voltage approximatelyfollows the input waveform, the shape of the integrator variations beingcontrolled by the transmitted bit pattern.

The incoming bit pattern at 32 Kb/s is applied to an integrator identical tothat shown in the feedback path at the transmit end. The integrator’soutput voltage will vary in a manner dictated by the bit pattern. Thisanalog output is applied to a low pass filter that removes residual highfrequency components.

The integrator voltage variations are, at best, only an approximaterepresentation of the input waveform. The integrator will be unable tofollow a rapidly rising input, due to the finite time required to charge thecapacitor. This gives rise to a distortion, called “Slope Overload”.



Similarly, the output bit pattern oscillates between "1" and "0" during flatportions of the input waveform; hence, the charge on the integrator variesgiving rise to quantizing error.

SQUARER

INTEGRATOR

INTEGRATOR

TRANSMIT SECTION

RECEIVE SECTION

SAMPLER

Figure 2.4 Principles of Delta Modulation



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Figure 2.5 Process of Delta Modulation

Delta modulation is one of the groups of codes known as DifferentialCodes, where the difference between two signals is transmitted instead ofa series of coded signal samples. One of the most commonly useddifferential codes is Adaptive Differential Pulse Code Modulation(ADPCM).



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ADPCM is a code recognized by INTELSAT and the ITU-T as a methodof at least doubling the number of analog users on most digital links, andis commonly used by Digital Circuit Multiplication Equipment (DCME) toincrease the circuit usage even more.

In ordinary PCM, S/D performance can be made more satisfactory over awide range of signal powers and the quantizer step size is made roughlyproportional to the signal amplitude. Adaptive PCM (APCM) systems, incontrast, use a linear quantizer in which the step size is adjusted in timeto match the short-term statistics of the signal. The coder is effectivelyoperated at its instantaneous peak S/D point.

One practical use of APCM is Nearly Instantaneous Companding (NIC),which is compatible with 15-segment, µ-255 and 13-segment, A-lawPCM.

The principle of ADPCM, shown in Figure 2.6, is to take conventionallyproduced 8-bit words that represent coded samples of analog signals,and compare each with an estimate of what that 8-bit word will be. Thedifference between these two signals, the real and the estimate, istransmitted. Provided that the estimate is good enough, there will be nodifference between the two 8-bit words. Consequently, less than 8 bits areneeded to represent the signal.

TRAFFIC INPUT(8-BIT WORDS)

COMPARATOR

RESULTINGDIGITAL OUTPUT

ESTIMATE(8-BIT WORDS)

Figure 2.6 ADPCM Principle



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If the actual incoming traffic sample to have ADPCM applied is:

10110101 (= quantizing level +53)

and that the estimate of what that word might be is:

10101110 (= quantizing level +46)

The resulting difference between these two words will be:

10110101 = quantizing level +53-10101110 = quantizing level +4600000111 = 7

Because the estimate was quite close, the difference between the two 8-bit words is so small that the leading four zeros can be dropped, and the4-bit word:

0111is transmitted in place of the original 8 bits.

The performance of this system will be degraded if the estimate is notclose to the actual signal. The estimate comes from a circuit moduleknown as an estimator, which examines the result of the previous 8-bitcomparison, and is then able to make a judgement of what the next 8-bitword is likely to be. The circuit uses a series of complicated rules, knownas an algorithm, to make this judgement. The rules have beenstandardized by the ITU-T to enable different manufacturers to makecompatible equipment.

This is true for one type of ADPCM, and providing that a similar decoderis present at the receiving end of the circuit, a surprisingly good qualitytelephone circuit can be obtained. A diagram showing the basiccomponents of an ADPCM encoder is shown in Figure 2.7, where theestimator circuit is a little more complex than described above.



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64kbit/s

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PCMCONVERTER

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Figure 2.7 ADPCM Encoder: Basic Components

ADPCM provides such a good quality on each voice circuit that it wasdeveloped further to take account of the possibility of using circuits for"Voice Frequency Data" (VF data), which is more difficult to predict.

Before ADPCM is applied, a circuit is examined to see the nature of thetraffic. If a voice circuit occupies the circuit, then the ADPCM process isaltered to code each 8-bit word into a 3-bit word, and if a VF data circuitoccupies any circuit, then each 8-bit word is made into a 5-bit word. Thisprocess, which could be continuously changing, still produces a tolerablevoice quality circuit, while allowing up to 9.6 Kb/s data. Further details ofthe coding algorithm can be found in ITU-T Recommendation G.723.

There are four different ITU-T recommendations for ADPCM algorithms.ITU-T G.721 was the first ADPCM recommendation to use 4 bits persample. The process reduced the digital rate from 64 Kb/s to a fixed rateof 32 Kb/s. This algorithm had two drawbacks: voice band data rateshigher than 4.8 Kb/s could not be transmitted and low speed voice banddata rates (< 1.2 Kb/s with FSK modulation) were affected by high BER.

ITU-T G.723 introduced the variable bit rate concept to cope with thevoice band data limitation. The bit rate can be 3/4/5 bits per sample; 3 or4 bits for speech (24 and 32 Kb/s respectively), and 4 or 5 bits (32 and 40Kb/s) for voice band data up to 9.6 Kb/s. Moreover 3 bits per sample canalso be used for overload channels carrying voice in DCME.



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ITU-T G.726, the last enhancement to ITU-T G.723, recommends the useof 2 and 3 bits per sample (16 and 24 Kb/s) for overload channelscarrying voice in DCME. The overload channels are created by a ’bitrobbing’ method.

ITU-T G.727, known as ’Embedded ADPCM,’ is an extension of ITU-TG.726 and is recommended for use in packetized speech systems(PCME). In this algorithm, the overload channels are created by ’bitdropping’.

Both recommendations (G.726 and G.727) for ADPCM show essentiallythe same performance for voice and voice band data rates from 16 to 40Kb/s.

The differences between ADPCM and Embedded ADPCM are the waythe predictor operates and how the quantized signal is encoded. Reviewthe steps to convert a PCM signal into an ADPCM.

The 64 Kb/s PCM (refer to Figure 2.8) is first converted from A-law or µ-law to uniform PCM signal (S). A difference signal (D) is obtained bysubtracting the input signal (S) from the estimated signal (E).

The difference signal (D) is quantized in the adaptive quantizer where thesignal is scaled and converted to a base 2 logarithmic representation. Anadaptive 31-, 15-, 7-, or 4-level quantizer is used to assign 5, 4, 3 or 2 bitsrespectively to the value of the difference signal for transmission to thedecoder.

The inverse quantizer produces a quantized difference signal (D1), whichis a reconstruction of the difference signal, from the 5, 4, 3, or 2 bits. Thissignal is added to the estimated signal (E) and a reconstructed version ofthe input signal (S1) is obtained. Both signals (S1 and D1) are fed to theadaptive predictor, where a new signal estimate will be generated for thenext PCM sample. A process summary is shown in Table 2.1.



Table 2.1 Description of ADPCM Prediction Process

« Remember the last PCM input sample.

« Predict what the next PCM sample will be.

« Compare the actual PCM sample with prediction.

« Determine the difference signal (actual minus

prediction).

« Quantize the difference signal.

« Encode the quantized difference signal.1

In G.726, the adaptive predictor relies on the whole ADPCM codeword --its adaptation, as well as the adaptation of the inverse quantizer, dependson all the output bits (2, 3, 4, or 5). (See Figure 2.8.)

Remember that a 31-, 15-, 7-, or 4-level nonuniform adaptive quantizer isused for operation at 40, 32, 24, and 16 Kb/s, respectively. Each rate hasits own separate quantizer table and the decision levels are not aligned.When the ADPCM codeword representing the PCM sample is obtained,the value is transmitted and also used to obtain the next prediction.

The decoder includes a structure identical to the feedback portion of theencoder, together with a uniform PCM to A-law or µ-law conversion and asynchronous coding adjustment.

The synchronous coding adjustment prevents cumulative distortionoccurring on synchronous tandem coding (ADPCM-PCM-ADPCM, etc.,digital connections), and is achieved by adjusting the PCM output codesin a manner which attempts to eliminate the quantizing distortion in thenext ADPCM encoding stage.



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DECODER

S

E

D

D1S1

Figure 2.8 Simplified Block Diagram of G.726 ADPCM Encoder /Decoder

In G.727, a 32-, 16-, 8-, or 4-level nonuniform adaptive quantizer is usedto quantize the difference signal for 40, 32, 24, or 16 Kb/s ratesrespectively. (See Figure 2.9.)

Various quantizer tables are embedded within each other so that thedecision levels are forcibly aligned to ensure that the decision levels for16, 24, and 32 Kb/s quantizers are subsets of those for the 40 Kb/squantizer. This contrasts with the algorithm for G.726 where the decisionlevels are not aligned.

The output codeword is structured as core bits and enhancement bits.(See Figure 2.10.) Core bits are used for prediction both in the encoderand decoder, while enhancement bits are used to reduce the quantizationnoise in the reconstructed signal. Thus, the core bits must reach thedecoder to avoid mistracking, but the enhancement bits can be discarded.



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PCM

ADAPTIVEQUANTIZER

INVERSEADAPTIVE

QUANTIZER

ADAPTIVEPREDICTOR

ADPCMOUTPUT

64 kbit/sPCM

FEED-BACKINVERSE

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+

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64 kbit/sPCM


RECONSRUCTED SIGNAL

ENCODER

DECODER

BITMASKING

BITMASKING

FEED-FORWARDINVERSE

ADAPTIVEQUANTIZER

+

Figure 2.9 Simplified Block Diagram of G.727 ADPCM Encoder/Decoder

As there are four embedded ADPCM rates, the embedded ADPCMalgorithms are referred to by (x, y) pairs, where x refers to the core plusenhancement bits and y to the core bits. For example, if y is set to 2 bits,(5, 2) will represent the 40 Kb/s embedded ADPCM algorithm, (4,2) the32 Kb/s, (3,2) the 24 Kb/s and (2,2) the 16 Kb/s. Not all the bitsnecessarily arrive at the decoder (because some can be dropped), but fora given sample, the core bits must be received.

Bit masking is another difference with G.726. Through this process theenhancement bits are discarded by logically right-shifting the ADPCMcodeword. The remaining bits are the core bits.



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ENHANCEMENTBITS

Figure 2.10 Core and Enhancement Bits

Several speech coding techniques are available that will enable speechcoding at low bit rates. The advantage of low bit rate speech coding isobvious. It will require less bandwidth, and hence a service providercan multiplex an additional number of voice channels in a givenbandwidth.

High bit rate coders, such as 64 Kb/s PCM and 32 Kb/s ADPCMprovide very good quality speech. Nowadays, several codingtechniques, such as Linear Predictive Coding (LPC), AdaptivePredictive Coding (APC), Adaptive Transform Coding (ATC), and Code-Excited Linear Prediction (CELP) are available that can provide goodspeech quality at 16 Kb/s. However, these coding techniques produce alarge coding delay, typically up to 60 ms. This delay is undesirable inmany applications. Current ITU-TU standards require very low delay.An important requirement is that one-way encoder/decoder delayshould not exceed 5 ms, with the objective being less than 2 ms.

This section describes speech coding at 16 Kb/s using Low Delay-CodeExcited Linear Prediction (LD-CELP) that ITU-T RecommendationG.728 recommends. The LD-CELP uses a backward adaptation ofpredictors and gain to achieve an algorithmic delay of 0.635 ms.



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Figure 2.11 shows a simplified block diagram of an LD-CELP encoder.The input signal from the PCM encoder, either A-law or 1-law, isconverted into uniform PCM signal. The uniform PCM signal ispartitioned into blocks of five consecutive input signal samples. Foreach input block, the encoder passes each of 1024 codebook vectorsthrough a gain scaling unit and a synthesis filter. The 1024 codebookvectors are stored in an excitation codebook. Each of these vectors isquantized into signal vectors and is compared with the input signalvector. The encoder identifies the one vector out of 1024 codebookvectors (codevectors) that produces least mean-squared error withrespect to the input signal vector. The index of each of the 1024codevectors is 10 bits long. The 10-bit codebook index of the bestcodevector that gives rise to that best candidate quantized signalvector, is transmitted to the decoder. The best codevector is thenpassed through the gain scaling unit and the synthesis filter to establishthe correct filter memory in preparation for the encoding of the nextsignal vector. The synthesis filter coefficients and the gain are updatedperiodically in a backward adaptive manner on the previously quantizedsignal and gain-scaled excitation. This backward adaptation ofpredictors enables achieving low delay.

16 Kb/s output

Convert touniform

PCM

Synthesisfilter

Perceptualweighting

filter

MinimumMSEG

ain

Vectorbuffer

Backwardpredictoradaptaion

Backwardgain

adaptation

ExcitationVQ

codebook

VQ index

64 Kb/s A-law or

-law PCM input1

Figure 2.11 Simplified Block Diagram of LD-CELP Encoder(Reference: ITU-T Recommendation G.728)



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n

Backwardpredictoradaptaion

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codebook

64 Kb/sA-law or -

lawPCM output

VQindex

16 Kb/s input

1

Figure 2.12 Simplified Block Diagram of LD-CELP Decoder(Reference: ITU-T Recommendation G.728)

Figure 2.12 shows a simplified block diagram of an LD-CELP decoder.Just like the encoder, the decoding operation is also performed on ablock-by-block basis. When the decoder receives a 10-bit index, it looksup to a table to extract the corresponding codevector from theexcitation codebook. The extracted codevector is passed through again scaling unit and a synthesis filter to produce the current decodedsignal vector. The synthesis filter coefficients and the gain are thenupdated in the same way as in the encoder. The decoded signal vectoris then passed through an adaptive postfilter to enhance the perceptualquality. The postfilter coefficients are updated periodically using theinformation available at the decoder. The five samples of the postfiltersignal vector are next converted to five A-law or 1-law PCM outputsamples.

The 16 Kb/s LD-CELP speech coding technique produces a near-tollquality signal. It requires less bandwidth and power, and is suitable inresource-constrained satellite communications, particularly in VSAT-type applications.



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After learning about how analog signals are converted into digital streamsthrough filtering, sampling, quantizing, and coding,and alternative codingtechniques, such as delta modulation that produce lower bit rates, thissection studies the principles of multiplexing.

The primary multiplexer, sometimes called the first order multiplexer, isthe first stage in the multiplexing process. The multiplexer combineseither 24 or 30 voice channels into a digital stream, and does roughly thesame job as the Channel Translating Equipment (CTE) in FDMtechnology.

The primary multiplexer was the first to be developed, and 24 channelswere initially multiplexed together in both the European and NorthAmerican Systems (NASs). Europe, however, went on to develop the 30-channel system that is different from the NAS version.

Primary multiplexers were first used to upgrade the capacity of existingline plant, particularly multi-pair cables. Two pairs of wires that wereearlier capable of carrying only one two-way conversation were now ableto carry 24 or 30 conversations. Thus these links were used to providetrunk connections between exchanges.

Many systems around the world still operate this way, except thatnowadays it is usual to find specially manufactured cable, “TransverseScreened Cable". In several locations, this forms the backhaul route fromEarth station to the International Telephone Exchange.

Most primary order multiplexers are either fitted in the InternationalTransmission Maintenance Center (ITMC) or combined with theinternational exchange, or "switch". There will probably be one or twoprimary multiplexers for service channels to the ITMC or Main Office.

The 2 Mb/s, or 1.5 Mb/s signal consists of all the channels from thatmultiplexer into one digital stream. In most cases, the 2 Mb/s signals arereceived from the ITMC, and fed into the IDR channel modems at theEarth station.



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In Time Division Multiplexing, many channels can share the samemedium by "taking turns", each being connected to the line very briefly,then replaced by the next. This is repeated again and again so swiftlythat there is no loss of data from any channel.

At the receive end of the link, a matching demultiplexer carries out thereverse action. It receives a digital stream and feeds it out, 8 bits at atime, first to one channel then to another, like dealing playing cards toeach player in a game of cards. It is apparent that to work properly, thedistant demultiplexer must be "locked" to the transmit multiplexer.

The receive demultiplexer, must "know" the sequence to "deal out" the 8bit words it receives. This is done by inserting a synchronizing "word" intothe traffic at the transmitting multiplexer that can be recognized at thedistant end, and is used as a reference by the demultiplexer.

Several extra words are added to the traffic. This extra information is oftenreferred to as "overhead", because it is carried along with the traffic, andhas nothing to do with the traffic information.

The 2 Mb/s rate is actually 2.048 Mb/s and not 1.92 Mb/s because ofthese overheads.

Traffic 30 x 64 Kb/s = 1.92 Mb/sOverheads 0.128 Mb/sLine Rate 2.048 Mb/s



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RecoveredTiming

Decoders

Receive Primary Multiplexer (part)

101 110 0 0

1 cycle = 2 bits

Figure 2.13 Clock Recovery

It is not just sufficient for the receiver to recognize a particular startingpoint in the digital sequences; the receiver actually has to work at thesame speed as the transmitter. The way in which this is usually achievedis through clock recovery.

A multiplexer is operating at a particular rate. The ITU-T sets limits forpermitted deviation from the nominal. The demultiplexer monitors andextracts the signal-timing rate from the incoming signal. Although it is notcommon these days, a simple tuned circuit could be employed, as shownin Figure 2.13. As long as signals are present on the line, there will beenergy at the output of the tuned circuit, which will be at the samefrequency as at the transmitting multiplexer. This recovered timing signalcan be used to operate the demultiplexer that will extract the signal atexactly the same rate as that the transmitting multiplexer.



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The multiplexer usually transmits signals at a rate controlled by a veryaccurate oscillator located within the network. Figure 2.14 shows theoscillators located at both ends of the network. Their frequencies arenearly, but not exactly, the same, and thus, the rates will not be same atboth the ends. This type of system, where traffic in opposite directions isnearly synchronized, is called a plesiochronous system [Greek : "Plesio" ="nearly"].

This type of system is most commonly encountered in internationaloperations.

PRIMARYMUX

PRIMARYMUX

f1

1 2

f2

f IS NOT EXACTLY EQUAL TO f

Figure 2.14 Plesiochronous Operation

There will be rate discrepancies if two ends of a network operate witheven slightly different clock speeds. The network will experience aproblem because one of two situations is possible:

Situation 1: Incoming traffic is fast. In this situation, an odd incomingtraffic bit will be lost occasionally, resulting in errors being created andpassed out to end users.

Situation 2: Incoming traffic is slow. In this situation, an occasionalincoming traffic bit will be repeated, again causing an error to be sent toour end user.



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These two situations are shown diagrammatically in Figure 2.15.

There are ways to minimize the error rate. This will be the subject of alater section (3.5) and involves the use of a buffer, which is often installedat the Earth station.

ERRORERROR

bit 1

bit 2

bit 3

bit 4

bit 5

bit 6

bit 7

bit 1

bit 2

bit 3

bit 5

bit 6

bit 7

bit 1

bit 2

bit 3

bit 4

bit 5

bit 1

bit 2

bit 3

bit 4

bit 5

bit 3

InterfaceInterface

1) Incoming Traffic Too Fast 2) Incoming Traffic Too Slow

Figure 2.15 Clock Slip

In the same way that groups are combined into supergroups in analogsystems to carry more traffic over a single carrier system, outputs fromthe primary multiplexers are combined into higher bit rate blocks foronward transmission in digital systems.

There are three different hierarchies, which are recognized by the ITU-Tin G.702.

Commonly called the CEPT hierarchy, the European hierarchy is built onthe basic building block of 2.048 Mb/s primary multiplexers, and isillustrated in Figure 2.16.

The process that the ITU-T recommends is to combine four of these 2Mb/s blocks into an 8 Mb/s data stream. This is achieved by taking one bitfrom each 2 Mb/s input in turn and adding framing signals to produce anoutput of 8.448 Mb/s. The name given to each input is tributary, “trib”. Themultiplexer described is a second order multiplexer.



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Four 8 Mb/s blocks can be combined to produce a 34 Mb/s data streamby a third order multiplexer, and so on. Other higher order multiplexersare 140 Mb/s and up to 565 Mb/s.

1st Order(Primary)

2nd Order 3rd Order 4th Order 5th Order

2.048 Mbit/s

8.448 Mbit/s

34.368 Mbit/s 139.264 Mbit/s 564.992Mbit/s

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4

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G742

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G735

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only

Audio&/or

64 Kbit/s

Audioonly

1

30

1

30

1

31

Figure 2.16 CEPT Digital Hierarchy

The NAS has, as its basic building block, a 1.544 Mb/s multiplexer,illustrated in Figure 2.17. Four primary streams of 1.544 Mb/s arecombined to produce a 6 Mb/s stream by a second order multiplexer.The next stage combines seven 6 Mb/s tributaries into a 45 Mb/s stream.

Note: Often, one single piece of equipment will do all of this, taking up to28 1.544 Mb/s systems, and multiplexing them to produce 45 Mb/s.

Above 45 Mb/s, the current trend is to multiplex three 45 Mb/s streams toproduce one 140 Mb/s stream that is same as the CEPT hierarchy.

Japan uses a slightly different version of the NAS. The basic buildingblock, as before, is a 1.544 Mb/s stream, and is illustrated in Figure 2.18.It starts with the NAS hierarchy, using µ-Law coders, but changes as thehierarchy develops.



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24

1

24

G 733(2)

G 733(1)

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DS - 3MUX

DS - 4MUX

(G 752)(G 743)

1

7

T1LINES1.544Mbit/s

T1LINES6.312Mbit/s

T3LINES44.736Mbit/s

T2LINES

274.176Mbit/s

SPEECH& /or

56 Kbit/s

SPEECH& /or

64 Kbit/s

DS - 1channel

bank

Figure 2.17 NAS Digital Hierarchy

PRIMARYORDER

MUX

SECONDORDER

MUX

THIRDORDER

MUX

FOURTHORDER

MUX

97.728Mbit/slines

32.064Mbit/slines

6.312Mbit/slines

1.544Mbit/slines

Figure 2.18 Japanese Digital Hierarchy

As one can easily notice, different hierarchies are incompatible, and theITU-T recommends that, whenever possible, international traffic should beexchanged using the CEPT hierarchy because it is used in morecountries. Hence, some conversion may be necessary at Earth stations.However, when both ends of an international link use the NAS hierarchy,administrations can exchange the traffic in the NAS.



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This is the first of three sections that will discuss details of multiplexingand multiple access.

A digital system combines 30 or 24 channels into a digital block. Theequipment that carries out this function is called a Primary, or First Order,Multiplexer.

The European (CEPT) system will be described first. The NAS will beintroduced later. The primary stages of Japanese hierarchy are identicalto the NAS.

The CEPT Frame Structure and Timing are shown in Figure 2.19. The 8-bit words are produced every 125msec, using the anti-aliasing filter,sampler, quantizer, and encoder.

In the CEPT system, 30 channels are multiplexed together onto the sameline by transmitting an 8-bit word from each channel in turn - thetechnique is known as Time Division Multiplexing (TDM). The 8-bit wordsare produced from each channel at the rate of 8000 samples everysecond. In a time period of 125msec between two words from channel 1,an 8-bit word from each of the channels 2-30 will be transmitted. Thisperiod of 125msec is called a frame.



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0 1

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magnitudesign

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Sampling and Encoding Processes

Figure 2.19 Frame Structure and Timing

It is essential that the receiver operate in synchronization with thetransmitter. To achieve this, an identification signal is transmitted at thestart of every frame. This is recognized at the receiver, bringing thesystem into synchronization. The name given to this signal is the FrameAlignment Word (FAW).

The FAW is a particular 8-bit word specified by the ITU-T in G.704paragraph 5. It is:

X 0 0 1 1 0 1 1

The bit marked “X” could be either 1 or 0. Although the bit marked “X” ispart of the FAW, it plays no part in the synchronization - it is reserved foranother purpose.



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To introduce alarm and telemetry systems into the frame structure, theFAW is alternated with a data signal, known as the Frame Data Word(FDW), or sometimes as the NOT Frame Alignment Word. Although thisis its main purpose, one bit is permanently set to a 1, to assist with initialsynchronization.

Each 8-bit word, whether FAW, FDW, or encoded audio, occupies a timeslot (TS). The first time slot in a frame is called time slot zero, or TS0, andcontains alternately the FAW or FDW. The encoded audio for channel 1is in TS1 and for channel 2 is in TS2.

It is essential to accommodate telephone signal transmission. Telephonesignaling is taken to mean on-hook/off-hook conditions and/or dial pulsesnecessary to set up a call. There are several ways to do this, but theyoften demand the use of one dedicated time slot per frame. The signalinginformation is inserted in TS16.

Figure 2.20 shows a complete frame structure that is made up of 32 timeslots, each containing an 8-bit word. There are therefore 32 x 8 = 256 bitsmaking up each frame.

The first time slot TS0 contains alternately the FAW or FDW. The nexttime slot TS1 contains an 8-bit word from channel 1; TS2 contains an 8-bit word from channel 2, and so on, until 15 8-bit words have been sent,one from each of the first 15 channels. The next time slot, TS16, isreserved for signaling purposes, and the remaining time slots, TS17-31,contain 8-bit words from channels 16-30.

As the duration of each frame is 125msec, the bit rate can be calculatedto be 2.048 Mb/s.



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Figure 2.20 Multiframe Structure and Timing

The NAS differs from the CEPT system in the makeup of the framestructure. The process by which each 8-bit word is produced from eachsample 8000 times a second is identical, although the encoder used isthe T-Law.

Figure 2.21 shows a sequence of 12 frames in the NAS structure. Eachframe starts with one single alignment bit, followed by an 8-bit word fromeach channel in turn. As there are 24 channels in each frame, plus thealignment bit, each frame contains 193 bits (24 x 8 + 1 = 193). Theduration of each frame is 125ms, so the bit rate is 1.544 Mb/s. Thealignment bits at the start of each frame build up into the frame alignmentword and multiframe alignment word as shown.

When channel -associated signaling systems (such as ITU-T R1) areused, a process known as bit stealing often carries signalingrequirements. In bit stealing, the least significant bit of each 8-bit word ineach 6th and 12th frame is used to carry the signaling for that channel(i.e., bit 8 of channel 2 in frame 6 carries signaling information for channel2).



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Alarm information is transmitted by changing the status of the alignmentbit of the 12th frame or by setting one bit of each 8-bit word to a 1.

There are various restrictions in using the frame structure just described.The most significant is the absence of any useful telemetry channel, andabsence of provision for extra bits reserved for development. Analternative structure, called the "extended superframe" has beenintroduced to deal with these limitations.

The extended superframe has been developed from the standard NAS byextending the frame structure to include 24 frames. Figure 2.21 shows afull frame structure, and the use of the alignment bits is given below.

In the irregular pattern 001011, the first bits of the frames indicated makeup the frame alignment bits. The fact that the pattern is irregular avoidsthe necessity of a multiframe alignment signal.

The 12 telemetry alignment bits, marked “D”, of the frames indicatedprovide a data link for control purposes. Because 8 bits are available inevery 24 frames (3 msec), the usable data rate is 4 Kb/s.

The six alignment bits marked “E”, associated with the frames indicated,provide the capability to check the presence of errors. This system isknown as cyclic redundancy checking (CRC) and will be discussed later.



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6

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signalling bit

101010 (bit 1, frames 1,3,5,7,9,11)

001110 (bit 1 frames 2,4,6,8,10,12)

bit 8 of each on time slot frames 6.12

Figure 2.21 NAS Multiframe Structure



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alignment bit

chan 1 chan 2 chan 3 chan 22 chan 23 chan 24

Figure 2.22 NAS "Extended Superframe" Format

A word about terminology:

Bell Telephone Laboratories Inc., which developed the NAS, called theprimary multiplexing equipment DS1. To transmit the 1.5 Mb/s signals,they used lines called T1 lines. Over the years, the two terms havebecome synonymous, and these days the multiplexer itself is often calleda T1 MUX. CEPT primary multiplexers are called E1 MUX.



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Table 2.2 shows a list of the important differences between the CEPT andNAS Primary Multiplexers.

Table 2.2 CEPT and NAS - Differences

Characteristics NAS PRIMARY MUX CEPT PRIMARY MUX

Bit Speed 1.544 Mb/s 2.048 Mb/s

Traffic capacity 24 Channels 30 Channels

Frame synchronization Distributed in alignment bits Bunched in TS0

Multiframe synchronization Distributed in alignment bits TS16 of frame 0

Alarms Either Alignment bit frame 12 or one Bitof each > ’1’

Carried in frame data word

Signaling Bit stealing Data word

Digital channel data rate 56 Kb/s, although 64 Kb/s available withB8ZS*

64 Kb/s

Coding law µ-Law A-Law

* Note: This will be covered in Section 3.2.

A number of signaling systems are in use worldwide, and they fall into twomain groups:

- Common Channel Signaling (CCS)- Channel Associated Signaling (CAS)

Figure 2.23 tabulates these two groups, and gives a breakdown of thevarious types.

CAS systems are systems where the signaling for each channel is eithersent on that channel, or in a specially dedicated signaling link.

An analog example of CAS is VF, either “in band” using a singlefrequency (SF) tone, or “out of band” using a frequency of 3825 Hz thatfalls outside the normal audio channel frequency band.

In digital transmission, CAS uses TS16 to transmit the signalinginformation for two specific channels in every frame. It would alsodescribe the system used in the NAS, where signaling for channel 1 iscarried as the least significant bit of that channel in every sixth frame.



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In CCS, the signaling information relating to a number of circuits isconcentrated into one transmission path dedicated exclusively tosignaling.

There may, for example, be several primary digital blocks operatingbetween two locations. On one of these blocks, one of the channelsmight be given over to a 64 Kb/s data link between the exchanges. Thisdata link would carry the signaling for all the circuits.

ITU-T systems 6 and 7 are both examples of CCS.

Signaling over PCM Systems

Common Channel

Variable lengthmessage

Fixed lengthmessage

International National

CCITT No.7

CCITT No.6 ** CCITT No.6

DPNSS*

DASS* 2

Channel Associated

Inband VF DCSignaling

In Slot Out Slot

Bell D1 (T1) CEPT 30chan system * UK Systems

** North America (AT&T)

Figure 2.23 Signaling over PCM Systems

Advantages of CCS are:

• Greater signaling speed• Enhanced system flexibility• Higher reliability



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Problems can arise because the signaling link might fail, leaving thetelephone trunks unusable. For this reason, wherever possible, thesignaling link is duplicated over another route.

Another problem source is that the 64 Kb/s data channel is sometimescarried in TS16, in which this case, it is important to differentiate betweenthe use of TS16 as a carrier of CAS or of CCS. If this is not clear, then agood indication of which type is in use can be obtained from examiningTS16 of frame 0 to see whether a multiframe structure exists. If such astructure exists, then it is likely that CAS is in use.

The direct conversion from A-Law to T-Law is straightforward. Theshapes of the two curves are almost identical; so, the ITU-T has preparedtwo "look up" tables (ITU-T Recommendation G.711) to convertquantizing levels of one law to the other.

Alarms in the analog (FDM-FM) environment have been based mainly onpilot monitoring systems. A pilot is always associated with each group andsupergroup, and it becomes an integral part of that group until it isdisassembled. It is possible to recognize whether that group is beingreceived or not by monitoring the pilot.

Some problems with pilot monitoring systems exist which make it unclearwhere exactly the failure is, particularly if one is monitoring a pilot that hastransited through another country.

ITU-T has recommended an alarm system for the digital environment thatwill help identify the exact location of faults. This will ensure that:

• the right people are sent to• the right place with• the right equipment with• the right information at• the right time to perform• ITU-T Recommendation M20

ITU-T has established two alarm categories, called “PROMPT” and“DEFERRED”.



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PROMPT: action required by service personnel attending to thatequipment.

DEFERRED: this is an advisory alarm, indicating that all the trafficpassing that point has been degraded in some way, but the fault does notfall into the area of maintenance responsibility for personnel attending tothat equipment.

It is sometimes said that "PROMPT" and "DEFERRED" are the equivalentto the "URGENT" and "NON-URGENT" alarms. This tends to be anoversimplification and should not be used because it can be misleading.

There will be one prompt alarm for one fault that affects traffic, located ata point which will enable service personnel to logically identify the faultyequipment or section without any ambiguity. This normally means that aprompt alarm is displayed close to the actual source of the fault.

To understand the operation of alarms in practice, consider the situationsthat can cause prompt alarms on a higher order multiplexer, and thenexamine some examples.

In general, faults that will cause a prompt alarm are:

• Loss of input at higher orders (e.g., loss of 34 Mb/s incoming for an8/34 multiplexer).

• Loss of tributary input (e.g., loss of at least one 8 Mb/s input of an8/34 multiplexer).

• Loss of frame alignment (e.g., loss of the frame alignment wordreceived in the 34 Mb/s incoming signal of the 8/34 equipment).

• Loss of power (e.g., a component failure within the equipment itself).

Note: Other faults may be added. These are the minimum requirementssuggested by the ITU-T. Refer to Table 2.3 for an example of alarms at athird order multiplexer.



Table 2.3 Fault Conditions and Consequent Action(ITU-T Table 2/G.753) Third Order (8/34 Mb/s) Multiplexing

Equipmentpart

Multiplexerand

demultiplexer

Multiplexeronly

Demultiplexeronly

Fault conditions

Failure ofpower supply

Loss ofincoming signalon a tributary

Loss of incomingsignal at 34 Mb/s

Loss of framealignment

AIS recived from theremote multiplexer

Promptmaintenance

alarmindicationgenerated

Alarmindication tothe remotemultiplexergenerated

To alltributaries

To thecomposite

signal

To the relevanttime slots of

the compositesignal

AIS applied

YES

YES

YES

YES YES YES

YES YES

YES

Yes, ifpracticable

Yes, ifpracticable

Yes, ifpracticable

Consequent actions

Note:– A “Yes” in the table signifies that appropriate actionshould be taken as a consequence of the relevant fault condition.An open space in the table signifies that the action should not betaken as a consequence of the relevant fault condition, if thiscondition is the only one present. If more than one fault conditionis present simultaneously, appropriate actions should be taken if a“Yes” is defined in relation to this action for at least one of theconditions.

Examples:Consider the section of a digital network illustrated in Figure 2.24.

2

8

34

8

8

234

8

A B C D

Figure 2.24 Part of a Digital Network



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Case 1: Multiplexer C not receiving signal from B

Consider the case of a break in the 34 Mb/s line between B and C suchthat C does not receive any signal from B, but the opposite direction isoperating satisfactorily.

The most logical position for a prompt alarm to show is on multiplexer C,as that equipment is receiving no high order signal.

Case 2: Multiplexer A not receiving signal from B

Consider next the case of a break in the 8 Mb/s connection between Band A. The prompt alarm would show on multiplexer A, as A has no 8Mb/s input.

When equipment experiences a problem that leads to a prompt alarm,ITU-T recommends that the equipment should automatically advise itscounterpart of that fact. In the two cases above, C should automaticallyinform B of a problem in case 1, and A should automatically inform B of aproblem in case 2. This is not done on FDM systems.

The way in which any multiplexer can inform its counterpart of a problemis by using a bit in the frame structure specially reserved for this purpose,called the alarm bit.

In case 1, where C does not receive any signal from B, the equipment atC will automatically alter the state of the alarm bit in its transmitted framestructure at 34 Mb/s from a 0 to a 1. Multiplexer B constantly scans the34 Mb/s incoming signals, and if the alarm bit is seen to be a 1, it realizesthat multiplexer C has a problem. In this way, we have achieved theobjective of automatically informing our counterpart of a problem.

The second consequential action is called the Alarm Indication Signal(AIS) that is automatically inserted to take the place of a traffic stream,which is lost, or degraded. This signal is unique because it is a series of"1"s, without any frame structure whatsoever, although a different uniquesignal is used at 45 Mb/s.



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Any multiplexer receiving this series of 1s will recognize the pattern. It willnot only realize that there is a fault somewhere between the signal sourceand the multiplexer input port, but will also be assured that the link directlyincoming is operating satisfactorily - the very fact that something isreceived means that something is transmitting the signal.

Referring to the examples and Figure 2.24 again, if the 34/8 multiplexer atC does not receive any signal from B (case 1), then multiplexer C willautomatically feed the AIS to each of its four tributaries. Multiplexer D willrecognize this and indicate a “Receipt of AIS” condition on its alarmdisplay unit. Multiplexer D, in turn, will feed the AIS to each of its 2 Mb/stributaries, where a similar indication will be displayed. Figure 2.25 showsthe complete set of alarms activated in this case.

Case 2 is straightforward. A receives nothing from B, so all the 2 Mb/stributaries going out from A are replaced by the AIS.

2

8

34

8

8

234

8

A B C D

PROMPTALARM DEFERRED

ALARM

DEFERREDALARM

DEFERREDALARM

ALARM BIT IN8 Mbit/s FRAME

BREAK AIS

ALARM BIT IN34 Mbit/sFRAME

Figure 2.25 Alarms Present as a Result of a Fault

Faults, which will cause a deferred alarm on a high order multiplexer, arein general:

• Receipt of AIS at higher order (e.g., the 34 Mb/s incoming signal hasbeen replaced by the AIS); and,

• Receipt of a distant alarm from far end (e.g., the distant 8/34multiplexer is experiencing a problem at its end).



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Note: Others may be added. These are the minimum requirementssuggested by ITU-T. ITU-T alarms around a primary order multiplexer are different becausetheir operation includes aspects of analog-to-digital conversion. If, forexample, a primary order multiplexer receives a large number of errors inthe incoming digital signal, these must be suppressed, otherwise they willbe decoded (digital to analog), and fed into the customer’s telephoneearpiece as a burst of noise. Table 2.4 from ITU-T RecommendationG.732, shows the alarms and consequential actions of a 2 Mb/s primaryorder multiplexer, and a comparison with Table 2.3 will make thedifferences clear. Faults, which will cause a prompt alarm, are: • Failure of power supplies (e.g., a component failure within the

equipment itself).• Loss of frame alignment (e.g., the frame alignment word, FAW, from

the distant end is not being received).• High Error Rate in the incoming signal (e.g., the number of errors

received at 2 Mb/s is worse than 1 in 103).• Failure of (A-Law) coder/decoder - Codec Failure (e.g., the

coder/decoder is tested on a regular basis automatically. If anydiscrepancy is noticed, an alarm is raised).

• Loss of 64 Kb/s input (e.g., no signals coming from a 64 Kb/scustomer).



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Table 2.4 Fault Conditions and Consequent Actions (ITU-T Table2/G752) for a 2.048 Mb/s Primary Multiplexer

yes yes yes yes

yes yes

yes yes

yes yes

yes yes

yes yes yes yes

yes yes

yes yesyes

yes

yes

yes

yes

YES(if practicable)

YES(if practicable)

YES(if practicable)

YES(if practicable)

Equipmentpart

Multiplexerand

Demultiplexer

Multiplexeronly

Demultiplexeronly

Faultconditions

Failure of powersupply

Failure of codec

Loss of incomingsignal at 64 Kbit/sinput time slot 16

Loss of incomingsignal at 2048

Kbit/s

Loss of framealignment

Alarm indicationreceived from theremote end (bit 3

of time slot 0)

Service alarmindicationgenerated

Promptmaintenance

alarmindicationgenerated

Alarmindication tothe remote

endtransmitted

Transmissionsuppressed atthe analog

outputs

AIS appliedto

64 Kbit/soutput (time

slot 16)

AIS applied totime slot 18 of

the 2048Kbit/s

compositesignal

Consequent actions

Error ratio 10on the frame

alingment signal

- 3

Faults, that will cause a deferred alarm, are: • Receipt of AIS (i.e., 2 Mb/s incoming signal has been replaced by the

AIS.

NOTE: The Prompt Alarm, loss of FAW, will also be received.)

• Receipt of Distant Alarm from far end (i.e., the distant primarymultiplexer is experiencing a problem at its end).

• Receipt of Distant Multiframe Alarm (i.e., the distant end is havingtrouble receiving multiframe alignment word (MFAW)).

Present-day equipment offers many varieties of redundancy switchingcapabilities that permit very reliable remote control of digitalcommunications facilities. Reliable remote control and monitoring isusually based on a central monitor facility that monitors remote equipmentunits, circuit cards, and equipment configurations.



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Such monitoring may include, but is not limited to:

• Antennas and path switching• Up-converters and path switching• Down-converters and path switching• Modems and path switching

Entire networks are now frequently monitored and controlled veryefficiently in this manner. When faults or out-of-parameter conditions aredetected, backup equipment is automatically switched into service andthe control facility notified. The desired ratio of online to backup equipment is for the user to decide.The reliability of modern digital equipment now permits one backup unitfor several online units. New digital communications equipmentpurchasers are well advised to research the latest market developmentsbased upon system requirements. If a user has an extensive network,introduction of new network control and monitor facilities may also warrantconsideration. Earlier sections described the detailed operation of a primary ordermultiplexer, and the need to synchronize the multiplexer with the network.This section studies details of higher order multiplexing equipment. In the FDM-FM environment, higher order multiplexing refers tocombining several basic groups into a supergroup, or severalsupergroups into a hypergroup. The reason for doing this is to reduce thenumber of required transmission carriers (e.g., satellite carriers), andhence, economize on the transmission equipment. In the digital environment, this is achieved by concentrating several low-bit rate systems into a higher rate system by a process of time divisionmultiplexing. The objective is the same as before, i.e., reduction of carriersystems, and hence costs.



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Higher order multiplexers are used to combine received traffic fromseveral destinations with any local traffic onto a common backhaul. Thiscan be seen in Figure 2.26 where two 2 Mb/s IDR channels from differentdestinations are combined with a single 2 Mb/s system for local traffic(Earth station phones, fax, etc.) onto an 8 Mb/s radio backhaul. Somelarge Earth stations will require higher order multiplexing towards thesatellite.

Main Office Site Earth Station Site

LocalTraffic

InternationalExchange

8

2

PLocalTraffic

DigitalRadio

Backhaul

IDRModems

RAD RAD

2

8

1

2

1P1

Figure 2.26 Digital System Block Diagram

The lower order traffic inputs are called tributaries. One bit at a time istaken from each tributary input and transmitted into the line at a higherbit rate. This process is known as bit interleaving, and is shown inFigure 2.27. This process is adopted in each hierarchy, and at each level in thehierarchy.



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1

3

4

2.048 Mbit/s

F.A.W. F.A.

8.448 Mbit/s 2.048 Mbit/s

1 2 3 42

1

3

4

1

2

3

4

1

2

3

4

MULTIPLEXER DEMULTIPLEXER

Det.

Figure 2.27 Principle of Higher Order Multiplexing

The receiving equipment requires synchronization with the transmittingequipment. This is achieved by inserting a frame alignment signal intothe higher order traffic which, when detected at the receiver, enablesalignment. This principle is also shown in Figure 2.27. Although the principle is the same in each hierarchy, the details differ. Inthe CEPT hierarchy, for example, the frame alignment word is transmittedas a block of 10 bits at the start of each 8 Mb/s frame. In the NAS andJapanese hierarchies, the frame alignment word is scattered through theframe structure. Figure 2.26 shows an Earth station that combines traffic originating fromthree sources: two via satellite, probably from different countries, and onelocally derived. Because each of these traffic streams originates from adifferent place, they will all be operating at slightly different rates. ITU-TRecommendation G.703 states that the output of a primary multiplexermay vary by ± 50 parts per million, i.e., about ± 100 Hz at 2 Mb/s. Tocombine all four tributaries, each operating at a different rate, a processknown as justification, or bit stuffing is adopted. These inputs are calledplesiochronous inputs, because they are operating near the nominal rate. To ensure that any tributary operating within a certain degree of thenominal tributary rate can be carried over a higher order system, the rateof each tributary is increased by the multiplex equipment to a commonspeed which is higher than that normally envisaged. This is achieved byoccasionally adding an extra bit into each traffic stream.



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The process is generally referred to as bit stuffing. Bits will be added toeach tributary running at a different rate, to increase their rate to acommon rate. One bit is reserved for each tributary in each frame forpossible bit stuffing to do this. Consider a second order multiplexer in the CEPT hierarchy, combiningfour tributaries at 2.048 Mb/s into one data stream of 8.442 Mb/s. If the rate of each tributary is to be raised to 2.052 Mb/s, then for anytributary running at exactly 2.048 Mb/s, 4000 bits will have to be addedevery second (2052000 - 2048000 = 4000). For any tributary running at2.0481 Mb/s, 3900 bits will have to be added every second, and for anyrunning at 2.0479 Mb/s, 4100 bits must be added each second. From these examples, it is clear that a range of tributary rates that varyfrom nominal rates can be carried over a higher rate system. Because a number of extra bits are added to each tributary, some methodof removing them at the receiver has to be adopted. A control signal isadded by the transmit multiplexer to each frame to indicate whether or notstuffing has taken place. This control signal is called the justificationcontrol word, or stuffing indicator, and is transmitted three times eachframe to ensure correct interpretation of the stuffing indicator, in case oferrors. It has been mentioned earlier that the output traffic should be the same asthe input traffic. This applies to the bit rate as well as to the actual trafficcontent. Figure 2.28 shows how this is achieved. The amount of bitstuffing varies according to the speed of the traffic entering the transmitmultiplexer, is monitored at the receiver, and produces a control voltagethat serves to finely adjust the frequency of a VCO operating normally atthe nominal output rate. To use the example quoted earlier, if 4000 extra bits are added eachsecond to any one tributary, the control voltage would be that isnecessary to produce an output of 2.048 MHz from the VCO. For 3900extra bits, the control voltage produced causes the VCO to run at aslightly higher frequency so that the output traffic is at 2.0481 Mb/s. For4100 extra bits, the output rate would be 2.0479 Mb/s.



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control voltageVCO

Tributary Output

Traffic

Elastic Store

Received traffic

CR

Figure 2.28 Receive Elastic Store

The operation of a CEPT high order multiplexer is identical at eachhierarchy. A second order multiplexer (2/8 Mb/s multiplexer) is describedhere, and any significant differences will be highlighted later. Operation of the second order multiplexer can be understood by referringto the 8 Mb/s frame structure shown in Figure 2.29. More details areprovided in ITU-T Recommendation G.742. The frame alignment signal is a 10-bit word transmitted at the start ofeach frame: 1111010000 Two service digits follow the frame alignment signal and are used in thefollowing ways. • Distant alarm The first service digit is used to inform the distant second ordermultiplexer of a problem at the local multiplexer. This is the remote ordistant alarm. Refer to Section 2.8. • National bit The second service digit is available for national use. One of the possibleuses is an error-checking system, but when not in use, it is set to a 1. Oninternational systems, this bit is set to 1.



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Bit

1 1 1 1 0 1 0 0 0 0 0/1 N 1 2 3 4 1 2 43 1 2 etc. 43 1 3 42

21250 bits from each of 4 inputs

J J J J 1 2 3 4 1 2 3 4 1 2 3 4 1 2 43 1 2 etc. 43 1 3 42


J J J J 1 2 3 4 1 2 3 4 1 2 3 4 1 2 43 1 2 etc. 43 1 3 42


J J J J J J J J 1 2 3 4 1 2 3 4 1 2 43 1 2 etc. 43 1 3 42


FRAME ALIGN ALARM

JCW1213

JCW2425

JCW3637

Justifiablebits

No. of bits in frame: 848 frame repitition rate 9962/s

Figure 2.29 Frame Structure of 8448 Kbs/s Digital Multiplexer for Plesiochronous Inputs Cyclic Bit Interleaving

ITU-T Recommendation G742 Fifty bits of traffic are transmitted from each tributary, using the principle ofbit interleaving. The next four bits make up the first justification control word (JCW). Bythis time, a decision has been taken whether or not to add an extra bit inthe frame, and the JCW is set for each tributary: a 1 indicates bit stuffingwill take place, and a 0 indicates it will not. As an example, if the JCW or stuffing indicator is 1 0 0 1, it would indicatethat in this frame, tributaries 1 and 4 have extra bits added, and tributaries2 and 3 do not. Traffic continues from each tributary, for two more blocks, carrying 52 bitsfrom each tributary in each block. The same JCW is repeated two more times. This is done to help thereceive multiplexer correctly decide whether bit stuffing takes place or not.If one JCW contains an error, a correct decision can be deduced bycomparing all three JCWs.



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As an example: Tributary 1234 1st JCW 1001 2nd JCW 1101 3rd JCW 1001 Correct output 1001 The correct output is deduced by taking the majority decision. In the firstJCW, tributary 2 is 0, in the second it is a 1, and in the third it is a 0.Because there are more 0s than 1s, the receiver interprets the portion ofthe JCW associated with tributary 2 as a 0. The next four bits are those reserved for possible bit stuffing. If the threeJCWs are 1001, bits 641 and 644 in the frame are stuffed bits, insertedbecause tributaries 1 and 4 are running a little slow, while bits 642 and643 are bits of real traffic, and will be fed to the outputs in the normal way. The remaining bits in the frame are used to transmit more traffic, bit-interleaved, as earlier. The 8 Mb/s frame is made up of 848 bits, and has a duration of 100.38msec. Each frame contains: A frame alignment signal 10 bits Service digits 2 bits Justification Control Words (4 x 3 =) 12 bits Traffic (4 x 205) 820 bits Justifiable bits 4 bits 848 bits The differences between multiplexers at different hierarchical levels canbe seen from the table in Table 2.5. There are two significant differences: • More traffic/frame There is more traffic squeezed into each frame: 1508 bits in the case of34 Mb/s, and 2888 bits for 140 Mb/s.



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• Five JCWs at 140 Mb/s

Five JCWs are used at 140 Mb/s so that extra security can be applied tothe interpretation of the justifiable bits. An incorrect decision will lead toloss of frame synchronization at lower orders, hence degrading theperformance of the network as a whole. Operation of the NAS second order (1.5/6 Mb/s) system in the NAS willbe studied. Refer to Figure 2.30. The 6 Mb/s frame is made up of four subframes, comprising 1176 bits. Alignment of the frames is achieved by four bits marked F0 and four bitsmarked F1 (F0 = binary 0 and F1= binary 1). Subframe alignment isachieved by the four bits M1 to M4 (M1=0, M2 = 1, M3 = 1, and M4 =alarm bit). The only service digit in the NAS higher order system is the M4 bit, whichmay be used for distant alarm indication. Traffic is carried using bit interleaving, as shown in Figure 2.30. Eachsubframe carries 288 bits of traffic, 72 from each tributary, including onejustifiable bit. The stuffing indicator for tributary 1 is carried as bits C11, C12 , and C13in subframe 1. The stuffing indicator for tributary 2 is carried as bits C21,C22 , and C23 , in subframe 2. Tributaries 3 and 4 are carried insubframes 3 and 4 in a similar manner.



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Table 2.5 Higher Order CEPT Frames

Multiplexed bit rate (Mbit/s)

No. of tributariesTributary bit rate

SEQUENCE:Frame Alignment SignalService Digits

Digits from tributaries(bit interleaved)1st JCWDigits from tributaries2nd JCWDigits from tributaries3rd JCWDigits from tributaries4th JCWDigits from tributaries5th JCWJustifiable digits(one per tributary)Digits from tributaries

Total digits in frame

8.448

42.048

102

200

420842084----4

204

848

34.368

48.448

102

372

438043804----4

376

1536

139.264

434.368

124

472

448444844484448444

480

2928

The justifiable bit for tributary 1 is the first tributary 1 bit after F1 insubframe 1. The justifiable bit for tributary 2 is the first tributary 2 bit afterF1 in subframe 2. The justifiable bits for tributaries 3 and 4 are the firstbits for tributaries 3 and 4 in subframes 3 and 4. These bits are indicatedin Figure 2.30. The 6 Mb/s frame is therefore made up of the following: Traffic (287 x 4) 1148 bits Justifiable bits 4 bits Frame alignment bits (F1, F0) 8 bits Multiframe alignment bits (M1-M4) 4 bits Stuffing indicator (C bits) 12 bits 1176 bits The duration of each 6 Mb/s frame is therefore about 186.3msec.



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F0 = 0 F1 = 1 is the frame alignment signal

M1 M2 M3 M4 are multiframe alignment signals

at 011X pattern. X may be used as

an alarm service digit.

Ci1 Ci2 Ci3 (j = 1,2,3,4) are justification control signals

Note 1: The bit available for the justification of tributary j is the first time slot of tributary j following F1in the jth frame.

M1

2

3

4

M

M

M

48 DATA BITS 48 DATA BITS 48 DATA BITS 48 DATA BITS 48 DATA BITSC11

C

C

C

21

31

41

F0

F0

F0

F0

C

C

C

C

12

22

32

42

13

23

33

43

C

C

C

C

11 2 3 4

11 2 3

11 2 3

11 2 3

4

4

4

time slots available forstuffed bits (See Note

F1

1

1

1

F

F

F

M1 SUBFRAME

M2 SUBFRAME

M3 SUBFRAME

M4 SUBFRAME

Figure 2.30 NAS 6 Mb/s Frame Structure

In the INTELSAT system, two main Multiple-Access schemes are inoperation. • FDMA - Frequency Division Multiple Access Each Earth station employing this mode of operation is required totransmit one or more carriers to the satellite. Each carrier contains trafficto one or more different destinations. These multichannel carriers havetheir own preassigned uplink frequencies, hence the term “FrequencyDivision”. In the downlink, Earth stations will receive and demodulatedifferent carriers from various destinations. Only the traffic that a particularEarth station requires is extracted from the demodulated baseband, andthe remainder is ignored because it is meant for other destinations.



• Time Division Multiple Access (TDMA)

TDMA is characterized by the allocation of a preassigned TS for access.Each Earth station transmits at the same frequency to the satellite andthus there will be only one carrier on the transponder at any time. Refer toFigure 2.31.

Because there is only one carrier operating at any one time,intermodulation noise is nonexistent and a greater amount of traffic canbe handled. Each Time Slot or burst can contain traffic for many differentdestinations. The allocation of time slot bursts from the various sources iscontrolled by a Reference Earth Station. A further advance in INTELSATTDMA system is use of Satellite Switched TDMA (SS-TDMA) onINTELSAT VI satellites. This means that each Earth station is allotteddifferent time slots for traffic, and also the bursts are also allocated to anybeam at a given time. This SS-TDMA results in greater flexibility.

RB

1

BEL

832 321

20,000 40,000

HOL RB

2

60,000 80,000 100,000 120,000120,832

870 483 586

F G I

0

TDMA FRAME (120,832 SYMBOLS < = > 2 msec)(OPERATING IN 72 MHz)

Figure 2.31 Time Division Multiple-Access System

Digital Satellite Communications Technology Handbook Chapter 3 – Modem Basics


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Modulation is a process by which some characteristics of the waveform isvaried in accordance with another signal. For example, a sinusoidal wavehas three features that can distinguish it from other sinusoidal waves,namely amplitude, frequency, and phase. For radio transmission,modulation is essentially varying amplitude, frequency, or phase of aradiofrequency (RF) carrier in accordance with the information to betransmitted. Figure 3.1 shows examples of digital modulation formats forPhase Shift Keying (PSK), Frequency Shift Keying (FSK), Amplitude ShiftKeying (ASK), and a combination of ASK and PSK, also known asQuadrature Amplitude Modulation (QAM). Figure 3.1 also shows the so-called M-ary PSK (MPSK) signaling case, where the processor accepts ksource bits at a time, and instructs the modulator to produce one of anavailable set of M = 2k waveform types. In practice, M is usually a non-zero power of 2 (2, 4, 8, 16, ....)

When a receiver in a transmission system makes use of the carrier’sphase reference to detect the information, it is called coherent detection.Otherwise it is referred to as noncoherent detection. In ideal coherentdetection, prototypes of all the possible arriving signals would be availableat the receiver. These prototype waveforms replicate the signal set, evenRF phase, and the receiver would be phase-locked to the transmitter.During detection, the receiver correlates the incoming signal to theprototypes.

Transponder nonlinearities and power efficiency usually requirethe modulation format to have a constant envelope and this means thatAmplitude Shift Keying (ASK) cannot be used in satellite communications.Thus for satellite communications, primary interest in PSK and the phase-continuous version of FSK known as minimal shift keying. Biphase orBPSK modulation is the simplest form of PSK. The phase shift changeswith each new data bit and a binary source code is mapped one bit at atime into a pair of phase states with 180-degree phase difference.



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Biphase or Binary Phase-Shift Keying (BPSK) modulation is the simplestform of PSK, where the phase shift changes with each new data bit. Inthis case, a binary source code is mapped one bit at a time into a pair ofphase states with 180-degree phase difference.

Quadriphase modulation or Quadrature Phase Shift Keying (QPSK)encodes each pair of bits into one of four phases, as shown in Figure 3.2.One of the principal advantages of QPSK over BPSK is that QPSKachieves the same power efficiency as BPSK with only half of thebandwidth. QPSK is of particular importance for satellite datatransmissions and, therefore, for the IBS and Intermediate Data Rate(IDR) services. The name four-phase or quadriphase refers to the factthat one carrier is modulated along a 0-degree, 180-degree phase vector(the in-phase or cosine channel), and the other along a 90-degree, 270-degree phase vector (the quadrature or sine channel). Ideally, the twochannels are independent.

Μ = 2

S2 S1

Ψ1(t)

FSK

Μ = 3S2

S1

Ψ1(t)

Ψ2(t)

Ψ3(t) S3

PSK

ASK

Μ = 2

S2 S1

Ψ1(t)

Μ = 8

Ψ1(t)

Ψ2(t)

ASK/PSK orQAM

ANALYTIC WAVEFORM VECTOR

I = 1,2....M0 < t < T

Si(t) = 2E/T Cos (ω0t + 2niM)

Si(t) = 2Ei/T Cos (ωot)

Si(t) = 2Ei/T Cos (ωot + φi)

Si(t) = 2E/T Cos (ωit)

t

T

T

t

T

t

t

T

Figure 3.1 Digital Modulation Formats



QPSK modulation encodes each pair of bits into one of the four phasesas described above. A typical PSK modulator is shown in Figure 3.3.The input streams are converted into two analog multilevel signals at theD/A converter that also performs signal encoding. The two signals haveamplitudes varying with Ak Sin Qk and Ak Cos Qk and so that they aremapped to vector point K. The signals pass through a low pass filter andare filtered for cosine roll-off shaping. They modulate carriers that arearranged to have a quadrature phase relationship. The two modulatedcarriers are summed to get a modulated carrier. This process convertsthe baseband digital signal into a modulated Intermediate Frequency (IF)signal.

A digital modem at the receiving end uses coherent detection with aninstantaneous sampling decision. A typical demodulator is shown inFigure 3.4. The received signal (1) is band-limited at band pass filter 2and divided into two signals (3). The local carrier recovery circuit thatprovides two signals in a quadrature relationship coherently detects thesesignals. The detected signals (4) are low-pass filtered to restore datasignals (5). The demodulated signals (5) each have amplitude Ak Sin Qk

and Ak Cos Qk corresponding to the input signal vector position. The A/Dconverts these signals into the original data signals (6). Operation of thedemodulator requires the provision of a carrier recovery as well as asymbol timing recovery circuit.



180 0

’0’

’1’

’11’

’10’

’00’

’01’i.e. 2 BIT STREAM EACH AT 32 kbit/s.

EACH PHASE REPRESENTS 2 BITS (DIBITS)

1 1 1 010

64 kbit/s

1) 2 Phase PSK

2) 4 Phase PSK

Figure 3.2 Example of 2- and 4- Phase PSK

D/A

&

SIGNALPROCESSOR

LOW-PASSFILTER

LOW-PASSFILTER

IFOSCILLATOR

PHASESPLITTER

90o

0o

AK Cos (θK)

AK Sin (θK)

bn

b1

b2

Modulatedsignal

5

1

2 3 4

2 3 4

Figure 3.3 Block Diagram of a PSK Modulator



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In eight-phase shift keying, eight phase states are used. Adjacent phasestates are separated by 45 degrees. Each phase state represents asymbol consisting of a sequence of three bits: 000, 001, 010, 100, etc.Thus a representation for three bits is sent each time the transmitter iskeyed. Hence this technique provides a theoretical limit of 3 bits/s per Hz.

The BER performance of 8-PSK using coherent detection is:

BER=1/3 erfc{Sqrt (3Eb/No) sin(X/8)}

The relationship between the bits to be transmitted and the carrier phaseof the modulator output is given in Table 3.1.

Table 3.1Relationship Between Transmitted Bits and

Carrier Phase of the Modulator Output

Transmitted bits Resultant phaseP Channel Q Channel R Channel

0 0 0 22.5°0 0 1 67.5°0 1 1 112.5°0 1 0 157.5°1 0 0 202.5°1 0 1 247.5°1 1 1 292.5°1 1 0 337.5°



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For a given bit-error ratio, 8-PSK modulation technique has a higherspectral efficiency than QPSK modulation, but it requires more satellitetransmit power.

Figure 3.5 shows a typical block diagram to implement an 8-PSKmodulator. The input stream is split into three streams. The transmit logiccircuit produces two 4-level streams, which are used to modulate twoquadrature carries using double sideband suppressed-carrier amplitudemodulation. The power combiner, accordingly, produces the 8-PSKoutput centered at 70 MHz. The inverse functions are accomplished in thereceiver.

Transmit Logic Circuits

IF Local Oscillator

4-level modulator

AmplifierPower Combiner

4-level modulator

90 degreePhase Splitter

i3(t)

i1(t)

i2(t)

Fig 3.5 Block Diagram of 8-PSK Modulator

When interconnecting various pieces of equipment, there are variouspoints to consider regarding the interface. In analog systems, it isimportant to make sure that the transmission levels are compatible. Indigital transmission, it is important to consider that the amplitudes of thepulses are within clearly defined limits, so that they can be correctlydetected. It is also necessary to ensure that the clock recovery systemswork properly. These are all taken care of by the correct use of linecodes.

A most straightforward code is the one that produces pulses of alternatepolarity, called Alternate Mark Inversion (AMI). Whenever a binary “1” isapplied to the input of the coder, the output alternates between a positiveand a negative voltage. (A binary "0" applied, leaves the output at zerovolts.)



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One of the requirements of line codes is to ensure efficient working of theclock recovery circuits.

In Section 2, the need for clock recovery was discussed. It was explainedthat the system relies on tuned circuits being able to recover energy fromthe signals present on the line. To do this, there have to be a relativelylarge number of transitions transmitted.

The NAS ensures that there are a sufficient number of transitions presentby adopting the T-Law encoding characteristic. A low-level signal, or nosignal, is allocated a small quantizing level, e.g., level 1 or 2 of 128.

The binary codes produced by these quantizing levels using the A-Lawcharacteristic would be:

Level 1 (positive) - 10000001, or Level 2 (positive) - 10000010.

Along with the T-Law code, the binary signal is inverted; the mathematicalterm is to say that the 2’s complement was taken, so that the low-levelsignals just considered would become: Level 1 (positive) - 11111110, or Level 2 (positive) - 11111101.

The theory is that it is very unlikely that the highest possible peak codeswill be present on several encoded voice channels simultaneously, andconsequently a long sequence of zeros will be naturally avoided.

Although it is quite unlikely that several encoded voice channels will jointogether to produce a long sequence of 1s, this may not be the case indata channels. In the NAS and AMI, this is avoided by changing a longsequence of zeros into a maximum of 15 zeros, followed by a 1.

Long sequences of zeros are likely to occur naturally in the CEPThierarchy. This is particularly likely during nighttime when all the 30channels might well be idle. To counteract this problem and still allowdata customers to operate, an alternative line code was adopted by theCEPT, called HDB-3.



This code is a bipolar code, designed to ensure a large number oftransitions, by limiting the maximum number of zeros to three (HDB-3 =High Density Bipolar code, with a maximum of 3 zeros.). The code isbased on AMI, but is modified by the following rules:

Rule 1: If more than 3 consecutive zeros occur, the fourth zero ischanged to a "1", known as a V pulse.

Rule 2: Successive V pulses must be of alternate polarity.

Rule 3: Every V pulse must be of the same polarity as the last transmittedpulse.

Rule 4: If rules 2 and 3 cannot both be satisfied, the first of fourconsecutive zeros is changed to a 1, which must be of opposite polarity tothe last transmitted pulse. This pulse is called a B pulse.

The name given to the V pulse is a violation, because it breaks theestablished rules. The name given to the B pulse is a balancing pulse,because without it, the code would become unbalanced (e.g., morepositives than negatives). Figure 3.6 shows the operation of this code.

The first example in Figure 3.6 shows alternate V pulses occurringnaturally; consequently, rules 1, 2, and 3 can be applied without difficulty.The second example in Figure 3.6 just as likely in real traffic, shows thecase where rule 2 cannot be applied directly and rule 4 has to be applied.

Because this code replaces a sequence of eight zeros by a unique,recognizable sequence, all 8 bits can be offered to data customersallowing 64 Kb/s.



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Figure 3.6 HDB-3 Examples

An alternative line code, used in the NAS, has been developed thatallows 64 Kb/s to be offered to customers in the US environment. This isachieved by replacing a sequence of eight zeros by a unique code,recognizable by the receiver, and which is capable of being convertedback into a sequence of eight zeros.



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The code, known as B8ZS (= Binary, 8 Zeros Suppressed), is illustratedin Figure 3.7.

A sequence of eight consecutive zeros is replaced either by:0 0 0 - + 0 + -

if it follows a negative pulse, or by:0 0 0 + - 0 - +

if it follows a positive pulse.

These sequences can be recognized by the violations, and hence can betranslated back into a sequence of zeros. As a result, 64 Kb/s can beoffered to customers.

The line codes discussed all apply to the primary order of multiplexing,CEPT and NAS.

The CEPT higher order line code is HDB-3 for 2, 8, and 34 Mb/s,whenever an interface point appears on cable.

At bit rates above this, the interface is generally not on copper cable, andother line codes, such as Coded Mark Inversion (CMI) are used.

The NAS higher order line codes are variations of the B8ZS codedescribed above. ITU-T Recommendation G.703 provides completedetails.

ITU-T Recommendation G.703 specifies the line codes used in the CEPT,NAS, and Japanese hierarchies. Table 3.2 provides a summary of thesecodes.



LINECODEROUTPUT

B8ZSOUTPUT

LINECODEROUTPUT

B8ZSOUTPUT

1 0 1 0 0 0 0 0 0 0 0 1

1 1 1 0 0 0 0 0 0 0 0 1

B8ZS - Case 1

B8ZS - Case 2

Figure 3.7 B8ZS Line Code

Table 3.2 Summary of ITU-T Line Codes

Bit Rate at HierarchialInterface (Mb/s)

Line Codes Recommendedby ITU-T (G.703)

1.544 2.048 6.312 8.448 32.064 34.368 44.736 97.728139.264

AMI or B8ZSHDB-3B8ZS or B6ZSHDB-3AMIHDB-3B3ZSAMICMI



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CMI is a two-level code and is ideal for optical fiber communication,where a laser would be either on or off.

A high density of transitions is achieved by subdividing each bit intervalinto two, and coding a 0 as 01, and a 1 as either 00 or 11. Figure 3.8illustrates the application of CMI to a binary sequence.

1 0 0 1 1 0

1

0

0 0 0 1 0 1 1 1 0 0 0 1

LINECODERINPUT

CMIOUTPUT

Figure 3.8 Coded Mark Inversion

This section examines how the user interfaces with the networkparticularly at the FDM/digital interface, the data users interface, andthe way an analog user interfaces with the network.

Some Earth stations around the world still operate FDMA systems oversatellite links. A problem arises when converting the networks to digitalregarding how to connect FDM satellite traffic to a digital backhaul. Twopossible ways of achieving this are:

(i) FDM/Digital Interface at Channel Level

One method to interconnect FDM and digital systems is to convert alltraffic to channels and crosspatch at the channel level. This is apractical solution when the existing channeling equipment is locatedwhere the digital channel interface is being installed.



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However, this is not a practical solution when the existing channelbanks are in the ITMC, and the requirement is to upgrade the link fromthe Earth station to the ITMC. This is because a set of ChannelTranslating Equipment (CTE) and channel carrier generating equipmentwould be required at the Earth station instead of at the ITMC. Thiswould mean either purchasing new equipment or transferringequipment from the ITMC to the Earth station.

(ii) FDM/Digital Interface Using Transmultiplexers

A transmultiplexer, or T-Mux, is a self-contained unit that automaticallyconverts the FDM hierarchy to the digital hierarchy and vice versa.There are several versions recognized by the ITU-T, but basically theyall do the same job; namely, accept a properly formatted digital block(or blocks), and convert them to a properly formatted FDM baseband.

Typical T-Mux equipment in the CEPT network accepts one basicsupergroup (312-552 kHz) and converts it into two 2.048 Mb/s digitalblocks. It also performs the reverse conversion. Typical T-Muxequipment in the NAS network accepts two basic groups (60-108 kHz)and converts them into one 1.544 Mb/s digital block. There is no loss oftraffic in either case- a supergroup carries the same number ofchannels as two 2 Mb/s blocks, and two groups carry the same as one1.5 Mb/s block.

There is also logic to the conversion. For example, in the CEPT system,Channel 1 of group 1 becomes channel 1 of the first digital block;Channel 12 of group 5 becomes the last channel of the second digitalblock, and all the other channels are allocated as shown in the table inTable 3.3.

The signaling systems used in FDM networks are different from thoseused in PCM networks. The T-Mux is capable of automaticallyconverting between many of these. For example, in many FDMnetworks the telephone circuit, busy/idle condition is transmitted bymeans of a 3825 Hz “out-of-band” frequency. The T-Mux can beconfigured to detect this tone in each channel, and convert it intoappropriate signaling bits of the TS16 associated with individualcircuits.

One of the signaling systems that T-Mux can not support is ITU-Tsystem Number 7 because it depends on a continuous 64 Kb/s datacircuit between switches.



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Table 3.3 Digital/Analog Channel Interchange for Transmultiplexer

FDM DIGITAL GROUP CHANNEL TS DIGITAL BLOCK

1 1 12 2 1

1 . . .. . .

12 12 11 13 12 14 1

2 . . .. . .

12 24 11 25 12 26 1. . .

3 6 31 17 1 2. . .

12 6 21 7 22 8 2

4 . . .. . .

12 19 21 20 22 21 2

5 . . .. . .

12 31 2

The CTEs or GTEs normally produce pilot frequencies, but when a T-Mux replaces this equipment, the pilots are generated by the T-Mux. Analarm indication from the digital to the FDM network is achieved byremoving a pilot if the digital network becomes faulty, thus alerting thedistant end. In the opposite direction, loss of a supergroup into the T-Mux would result in an AIS being sent forward.



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It is common for the T-Mux equipment to be installed at the Earthstation where FDM international networks have to interface with digitalbackhaul equipment. A typical application is shown in Figure 3.9.

2x2 Mbit/s Blocks

T-MUX

FDMNETWORK

BASICSUPERGROUP

FDMSATELLITE LINK

Figure 3.9 Typical Application of a Transmultiplexer (T-Mux)

Output data from a T-Mux will conform to ITU-T RecommendationG.703. For a CEPT T-Mux, this means that the output bit rate shouldbe 2.048 Mb/s ±50 parts/million. The transmit clock could be eitherderived from a suitable stable internal oscillator or from the nationalclock.

Receive digital traffic is detected initially by using recovered timing, butthen they are stored in a buffer before being processed into an FDMsignal. The buffer, which is an integral part of the T-Mux, is necessarybecause there may be two different digital streams entering the T-Mux,each originating in different countries operating at different rates. EachT-Mux operates plesiochronously, which is adequate for the voicegrade circuits carried over these systems.

Sometimes, an analog signal has to be carried between two places thatare connected by an existing digital system. This situation can beovercome by using a coder/decoder system. A common example is inhandling analog TV over a digital backhaul.

Analog TV transmission is still popular, although use of digital TV oversatellite is increasing. Therefore, the problem of getting an analog TVbaseband signal over a digital backhaul remains.



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Figure 3.10 illustrates a solution that is a logical application of PCMprinciples. The TV baseband typically occupies a bandwidth of 5.5MHz. This signal can be filtered to prevent aliasing, sampled at twicethe highest frequency (11 million samples/sec), and coded to produce adigital signal. At present there are a number of coding laws available -some linear, some nonlinear - all producing different digital bit rates.The bit rate used depends on the picture quality required.Transmission rates for compressed digital TV are discussed in anotherINTELSAT handbook entitled Digital Compressed TV.

TVCODEC

34 Mbit/smicrowave

34 Mbit/smicrowave

TVCODEC TV GCEVIDEO

TV STUDIO EARTH STATION

DIGITAL TVBASEBAND 34 Mbit/s

ANALOG TVBASEBAND0 - 5.5 MHz

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DC

KEY:

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For many years, data customers used FDM network channels to carrytraffic at bit rates up to 9.6 Kb/s, or 13.2 Kb/s occasionally. If the userwanted to operate at higher rates, they used a complete basic group(60-108 kHz) to transmit traffic up to 64 Kb/s. This was, of course,expensive, but did follow a set of rules developed by the ITU - i.e., ITU-T Recommendation V.35. Although this recommendation has beensuperseded by more recent ITU-T recommendations, it is stillsometimes referred to for the physical and electrical interfaces betweenthe customer equipment (FAX, PCs, etc.) and the network.



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There are a number of different customer/network interfaces - many areproprietary, but all have some aspects in common.

Data customers need to be able to transmit and receive data traffic atrates up to 64 Kb/s. Additionally, they need to transmit and receivetiming signals as well as alarm and other control signals.

Usually an interface or converter box, sometimes incorrectly referred toas a modem, connects the network to the customer. The correct namefor this box is Data Circuit Terminating Equipment (or DCE). Adoptingmore recent ITU-T terminology, the data user’s equipment is called theData Terminal Equipment (DTE). Between the DTE and the DCE isnormally a fairly short connection - tens of metres, and interfacing hereis often achieved by multipair cables. Between the DCE and thenetwork is often one single cable pair for transmit data, timing, andcontrols, and another for receive data, timing, and controls.

The usual interface between the DCE and the network is a systemknown as Codirectional Interface, from ITU-T Recommendation G.703.This type of channel is sometimes called “Isochronous” or“Synchronous”. This interface combines data and timing information.

The codirectional interface sends network timing information to theDCE, together with the data. The timing frequencies supplied are 64kHz for bit timing, and 8 kHz for byte timing. The 64 kHz timinginformation is used to ensure that the DCE can transmit traffic back tothe network at the correct bit rate. The 8 kHz timing signals are alwaystransmitted from the network, but are not always used by the DTE. Thetiming signals are sent to signify the end of each sequence of eight bits.

The operation can be described by the five stages in the codingprocess.

Step 1 - 64 Kb/s bit period is divided into four unit intervals.Step 2 - binary 1 is converted to 1100.Step 3 - binary 0 is converted to 1010.Step 4 - binary signal is converted to 3 levels by alternating thepolarity of consecutive blocks.Step 5 - alternating of polarity is violated every 8th block.

The violated block marks the last bit of an octet.



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Note: Steps 1-3 ensure that there are sufficient transitions toenable clock recovery to work. Step 4 ensures that there is nobuild up of charge on the line. Step 5 enables byte timing to berecovered, if required.

There are many protocols at this level, but one of the most commonlyused protocols is known as V.24. The main interconnections are listedbelow along with their standard names (circuit numbers).

Consider each circuit number as a wire (or pair, if appropriate) betweenDTE and DCE. Not all will always exist - only those required by theuser. The section marked “use” lists the functions only. No attempt ismade to define voltages, or pulse shapes, in this recommendation.

Circuit Use102 Signal Earth: a reference for signal measurement.103 Transmit Data: from DTE to DCE.104 Receive Data: from DCE to DTE.

In addition, there may be control data.

Circuit Use105 Request to send: informs DCE that DTE wishes to

transmit data.106 Ready to send: allows DCE to inform DTE that it is able

to transmit.109 Data channel received line signal detector: allows DCE to

inform DTE that it is able to accept incoming data (whichwill appear at DTE on circuit 104).

There may also be certain enabling signals.

Circuit Use107 Data set ready: informs DTE that DCE is operational.

(Data set is one terminology for modem.)108/1 Connect data set to line: passes an instruction from DTE

for the DCE to connect its signal conversion equipment to the line. This is normally in response to a signal on circuit 125 (below).

108/2 Data terminal ready: indicates to DCE that DTE is ready to operate. Normally it only enables the DCE and a supplementary operation, e.g., depression of telephone DATA button, is required before signal conversion equipment is connected to the line.

125 Calling indicator: is used by DCE to inform DTE that a calling signal is being received.



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Finally, there may be certain timing signals.

Circuit Use113 Transmitter signal element timing (DTE source).114 Transmitter signal element timing (DCE source).115 Receiver signal element timing (DCE source).

These three circuits are used to convey timing information betweenDTE and DCE. They do this by means of regular transitions from ON toOFF and vice versa. ON to OFF transitions on 113 indicate the rate atwhich DCE should sample transmitted data on 103. DTE is responsiblefor timing. OFF to ON transitions of 114 indicate to the DTE when thenext data element for transmission should be presented on 103. DCEis responsible for timing.

ON to OFF transitions on 115 indicate the times at which DTE shouldsample received data on 104. Note that other circuits are used tocontrol or indicate changes of data rate, standby operation, a backwarddata channel, usually low speed, and other less frequently usedfunctions.

The connection between analog user input and the network relies onthe correct use of levels, and the conventional interface between twoand four wire lines. ITU-T Recommendation G.711 defines theapplication of A-Law and T-Law coding to analog levels and allowsthem to be related to peak codes. For example, an input signal of +3dBm will produce a peak code of ±127. This will only hold true if thedBr points are correctly set. Echo control must also be taken intoconsideration.

Echo is not a new problem to telecommunications staff: a poor match ata 2-wire/4-wire conversion point causes it. Echo is discussed in greaterdetail in Appendix 1. The traditional solution is to install an echosuppressor at each end of the analog circuit, which allows transmissionin just one direction at a time. There are problems with this.

1. Clipping occurs, as speech has to rise above a certain level before itcan be detected.2. Level variation occurs, particularly during 2-way speech (both partiestrying to talk simultaneously).



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The solution most widely adopted nowadays is the use of EchoCancellers.

Echo cancellers overcome the drawbacks of the echo suppressor byattempting to duplicate the local echo path to produce a replica of theecho, and use this to cancel the echo. This is a continuous process,and once the echo path has been duplicated for a particular correction,the echo can be effectively eliminated. Echo cancellers are placed inthe 4-wire portion of a circuit that may be an individual circuit path, ormore usefully in a path carrying a multiplexed digital signal. They aredesigned to be compatible with each other, as well as with any echosuppressor that may be present at the distant end.

Refer to Figure 3.11. A portion of the receive path is fed into a variabledelay circuit where the delay can be adjusted so as to be the same asthe delay of the signal in the local echo path. The delayed signal isthen modified in amplitude and phase to form a replica of the echo. Thissignal is then combined with the transmit path in such a way as tocancel out the echo signal. The time taken for the initial setting up isless than 500 ms.

In any transmission system, impedance mismatches will inevitablyoccur at interface points between pieces of equipment and/or lines.These mismatches cause a certain amount of power to be reflectedback to the sending end, depending on the degree of mismatch.Measurement of the return loss, i.e., the reflected power compared withthe transmitted power is more important than the measurement ofactual impedance in the circuits, because it is the reflected powerwhich, if large enough, can seriously degrade a connection. Thereflected power arrives back at the talking subscriber as an echo with atime delay equal to twice the time for the speech to reach the mismatchpoint. On a satellite system, this would typically be in the order of 500msec.



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Figure 3.11 Principle of an Echo Canceller

If the echo is severe enough, its effects can prevent a talker fromcontinuing with conversation. The tolerance of an average subscriber toecho has been subjectively measured. It is found to depend upon twothings: level of the received echo compared to the transmitted power,i.e., echo path loss, and the time taken for the echo to return to thetalking end, echo path delay. For example, a subscriber can tolerate ahigh level of echo provided the delay is short, or, a low-level echo if thedelay is long.

The point in a circuit that gives most trouble is the 2W-4W interface-terminating unit. It is impossible for the balance to accurately match thewide range of impedance presented by a variety of 2-wire lines in theswitched network, and this, in turn, gives rise to poor balance returnloss at some frequencies. The result is that some power is reflected intothe terminating unit from the 2-wire system, and this is returned to thesubscriber and will appear as echo. Echo path loss under suchconditions will be about 10 dB.

This section discusses synchronization and focuses on practicalaspects on how the various subsystems of an overall end-to-endnetwork are kept in perfect synchronization with one another.



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This section has three parts. The first part will discuss how the primarymultiplexers keep in synchronization, the second part on how thecustomers synchronize with the primary multiplexers, and the third partwill provide an overview of network synchronization.

In an earlier section, we discussed a method to recover a timing signalfrom the incoming traffic. The recovered timing is used to ensure thatthe circuits in the receive equipment operate at the same speed as thecircuits in the transmit equipment.

It is not sufficient to operate the two terminals at the same speed. Theycould be operating at exactly the same speed, but 180 degrees out ofphase, for example. It is essential that the traffic is also synchronizedbetween receiving and transmitting equipment. This is achieved by useof a Frame Alignment Word (FAW).

FAW is a specially defined word that is inserted in the frame structureat regular intervals. In the CEPT frame structure, it is composed of one8-bit word inserted into every alternate time slot zero (TS0). The ITU-Tdefines this word in Recommendation G.704, and it is illustrated below.

X 0 0 1 1 0 1 1

Note: The X in the FAW could be either a 1 or a 0. It plays no part inthe frame synchronization procedure.

The receiving equipment detects this word so that it can recognize thestart of the new frame. The problem is that this word can occur inrandom data. Hence, to reduce the possibility of false synchronizationin the CEPT system, a different word is transmitted in the remainingTS0s. This word, illustrated below, the FDW, is defined in ITU-TRecommendation G.704.

The FDW is used for several purposes:

a. To allow for an optional telemetry channel (the bitsmarked "T")

b. To convey an alarm to the distant end (the bit marked"A")

c. To allow for the provision of an error checking facility(the bits marked "X" in the FAW and FDW) and

d. To transmit a synchronizing bit which will help withinitial synchronization (the 1)



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The bit which is used to help with initial synchronization is the "1" in theCEPT FDW above. As it is not the same as the second bit in the FAW,it can be used to check that the FAW has been replaced by somethingelse.

X 1 A T T T T T

CEPT Frame Data Word

A logical process to achieve synchronization in the CEPT system isillustrated in Figure 3.12(a), and is described in ITU-T RecommendationG.706. To quote from G.706, paragraph 4.1.2:

“Frame alignment will be assumed to have been (achieved)when the following sequence is detected:

- for the first time, the presence of the correct frame alignmentsignal;

- the absence of the frame alignment signal in the followingframe detected by verifying that bit 2 of the (FDW) is a 1;

- for the second time, the presence of the correct framealignment signal in the next frame;

...failure to meet one or both of these requirements shouldcause a new search to be initiated.....”

The process described above may seem complex, but in practice itappears to be almost instantaneous when the equipment is plugged in.It could take just the reception of two complete frames to verifysynchronization. This could take 125msec x 2 = 250ms, althoughnormally it will take slightly longer.



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(125 u sec la te r)

Figure 3.12 CEPT Primary Synchronization Logic



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Once synchronization is achieved, the receiving equipment regularlychecks the incoming signal to ensure that it remains in synchronization.This is done by checking the presence of the FAW at the beginning ofevery alternate frame. Note that the FDW is no longer used for thesynchronization. The receiving equipment now proceeds to monitor bit3 to determine the presence of a distant alarm.

ITU-T Recommendation G.706 states that “frame alignment will beassumed to have been lost when three consecutive incorrect framealignment signals have been received” (Paragraph 4.1.1). This processis shown diagrammatically in Figure 3.12(b). If the FAW is corruptedonce, this fact is remembered. If it is corrupted again on the nextexpected occasion, this is also remembered. If it is corrupted on thethird consecutive occasion, the receiving equipment drops out ofsynchronization and the whole process of searching for the FAW isrepeated. If only one or two FAWs are corrupted, then the equipmentremains in synchronization provided the third consecutive one is notcorrupted. When the next correct FAW is received, the circuit counterreturns to zero.

It has to be noted that although the equipment remains insynchronization, the receipt of an occasional error is remembered and itcan be used by some receiving equipment to automatically calculate abit rate error ratio.

The time taken to lose synchronization will appear to be instantaneous,although it will actually take between four and six frame periods (500-750 msec) depending on when synchronization is actually lost.

Standard NAS frame structure:

FAW in the standard NAS is scattered through the frame structure,using the alternate alignment bits. Because this pattern is repetitive(101010 .... etc.), the nonrepetitive multiframe alignment word isdistributed through the other alignment bits.

Synchronization is achieved once the whole complete alignment pattern(spread through 12 frames) is detected. This will take at least 11 x 125msec = 137.5 msec. In this case, loss of synchronization is confirmed“over several frames” (ITU-T Recommendation G.706 paragraph 2.).



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The six alignment bits making up the frame alignment signal areirregular in pattern and serve the double purpose of frame andmultiframe alignment. Once these six bits have been detected at thereceiver in the correct sequence, frame alignment is achieved. Loss offrame alignment should be recognized if the frame alignment signal hasbeen missing for a maximum of 12 msec.

For data transmission, the receiver must be in synchronization with thetransmitter, and this can be achieved in one of two ways.

This is the type of synchronizing process used by, for example, ateleprinter. Each letter typed is represented by a five-bit code, and thecode is preceded by a start bit, and followed by a stop bit. It iscommonly called a "START/STOP" system, and although it is relativelysimple, it is rather inefficient. This system is used for relatively low-speed circuits (say up to some 9.6 Kb/s).

Generally, this type of system uses VF modems to convert the low-speed data into audio signals that can be passed through an audiochannel. For this reason, it is not necessary to synchronize the datacustomer with the network.

A far more efficient system is known as a synchronous system. Thisallows the transmitter to produce traffic without start and stop bits bysynchronizing the transmitter and receiver from a common source. Themost convenient synchronizing signal source is the network clock.Hence this clock source is used most often to synchronize 64 Kb/sterminals. This concept is illustrated in Figure 3.13.

The network-timing signal can be sent to the data user by a separatecable, or superimposed on the traffic. Superimposing the networktiming signal on the traffic is the most common system, because itrequires less line plant. The superimposed timing signal is at a rateappropriate to the system in use, namely 8 and 64 kHz when customersrequire 64 Kb/s, and 56 kHz when customers require 56 Kb/s.



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DATA TRAFFIC ANDTIMING ON SEPARATE

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DATA AND TIMINGCOMBINED ON TOONE CABLE PAIR

CHANi/p

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CHANo/p

CHANi/p

PRIMARYMUX

INTERFACEUNIT

CUSTOMEROFFICE

INTERFACEUNIT

PRIMARYMUX

DATA TRAFFIC ANDTIMING ON SEPARATE

WIRES

Figure 3.13 Codirectional Interface

There are a number of other data applications, each requiring differentlevels of synchronization. They are:

S+dx: The means whereby a voice channel is reduced in bandwidth topermit use of the higher frequency band for telegraph transmission.The telegraph machines, telex, or teleprinters, use start/stopsynchronization. Speech and low-speed data can also be combineddigitally often using proprietary equipment. In such cases, although thenetwork and combining equipment must be synchronous, the linkbetween the data customer and combining equipment could be eithersynchronous or asynchronous.

Fax: Fax, or Facsimile transmission has been in use for many years,and its use is increasing. Many fax machines operate digitally, althoughthe telephone lines in use are analog. Recent developments haveproduced a new breed of machine, called Group 4 fax. This machine isintended to operate at 64 Kb/s and offer, for example, a 3-secondtransmission time for an A4 document. The earlier machines’“handshake” at the beginning and end of transmission, is similar to thestart/stop system discussed earlier. Group 4 fax machines aredesigned to operate in a synchronous mode.

Although ITU-T does not recommend a specific method ofsynchronization, there are a number of systems in use, three of whichfollow.



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a. A system that uses a central clock which is distributed tosynchronize the primary multiplexers only.

b. A network that uses two or more mutually synchronizedclocks, that are distributed to all primary multiplexers.

c. A wholly synchronized system.

Each of these systems is described below.

This system, illustrated in Figure 3.14, uses a very accurate and highlystable clock source, which is centrally located in the network. This clockin the network is called a Stratum 1 clock in ITU-T G.811, although theterm normally used is LEVEL 1 CLOCK.

STRATUM 1

STRATUM 2 STRATUM 2

STRATUM 3 STRATUM 3 STRATUM 3

STRATUM 4

ACCURACYLEVEL1

LEVEL2

LEVEL3

LEVEL4

MINIMUM 1 in 10USUAL (Caesium Beam) 7 in 10

1112

1 in 109

1 in 107

Figure 3.14 Distribution of Clocks

The level 1 clock is distributed to a number of less stable clocks, knownas level 2 clocks, which in turn control level 3 clocks. The level 2 andlevel 3 sources are used to ensure that primary multiplexers, switches,Earth station plesiochronous buffers, etc., are all synchronous.

In some cases where it is not practical to have a single timing source,two or three identical sources are located in different areas. Forexample, in a hurricane-prone zone, it makes good sense to have twoor three clocks located in different areas of the country to providebackup.



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They are all considered as level 1 clocks, and are mutuallysynchronized. A possible configuration is shown in Figure 3.15. In thisconfiguration, the level 2 sources would then be fed from any two of thelevel 1 sources, and the level 3 sources from the level 2 sources, asbefore.

STRATUM 1 STRATUM 1 STRATUM 1

2 2 2 2

3 3 3 3 3 3

P S P P P P PS S S S S

P S P S P S P S

SYNC

SYNC SYNCLEVEL 1

LEVEL 2

LEVEL 3

P = PRIMARY PATHS = SECONDARY

Figure 3.15 Mutually Synchronous Stratum 1 Clocks

This system, illustrated in Figure 3.16, could be used to synchronize allmultiplexers, switches, etc., but it is not commonly used.

There are two basic methods of distributing the synchronization signals.These are discussed below.

Over a Separate Distribution System

Where there is enough spare capacity on existing line systems, thetiming signal can be carried directly to each station or office within anetwork. The separate distribution system could also rely on the receiptof a very stable radio signal. The two most commonly used are Loran-C, which is a 100 kHz radio signal, and navigational satellite system,known as the Global Positioning System or GPS. The use of either ofthese sources requires the use of specialized receiving equipment, butthe accuracy of the received timing source is sufficient to make it aLevel 1 source in any network.



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Over the Traffic Carrying Network

In many cases, a Level 1 clock is distributed by superimposing thetiming on the normal traffic paths. The Level 1 clock externally feeds anumber of specific primary multiplexers that carry traffic to maincenters. The clock is recovered from the bit stream at each center, andis used to derive the Level 2 clock. This process is repeated at othercenters to produce the Level 3 clock. At each level, the clock timing isdistributed to Earth stations, multiplexers, switches, customers, etc.,as required. Often the routes are duplicated to provide reliability.

P

P

P

P

2

8

2

8

8

2 EXCHANGE8 34

14034

140

34

34

8

8

2EXCHANGE

CLK

Figure 3.16 Wholly Synchronized Network

Previous sections discussed how a digital signal is produced from ananalog input, and how a number of channels can be combined into onedata stream. This section considers what can go wrong with a digitalstream, how to count errors, whether the errors can be corrected, andhow.

The only thing that can happen to a digital signal is that a 1 is receivedinstead of 0, or 0 instead of 1, i.e., errors are introduced. There are threecauses of error- Clock Slip, Jitter, and Noise. We will examine them inturn.

Clock Slip is a timing problem that occurs when two networks meet. Thissituation exists in every Earth station, where one country’s networkinterfaces with several others. To control this situation, it is necessary touse buffer stores (plesiochronous or Doppler).



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Section 2.7 described the concept of Clock Slip. As a review, suppose anEarth station receives digital signals originating from another country.Although the nominal bit rate received might be 2.048 Mb/s, it is unlikelyto be exactly 2.048 Mb/s. It is also unlikely that the receiving country willbe operating from oscillators running at exactly 2.048 Mb/s.Consequently, from time to time, a bit may be lost or gained. This will bean error.

Ideally, the way to overcome this problem would be to have bothcountries use the same oscillator, but this is seldom possible. So, the nextbest alternative is to use extremely accurate oscillators. These areusually based on atomic standards that are used to time an entirenetwork in a country. The order of accuracy of a moderntelecommunication standards oscillator is ± 1 part in 1011. Even with suchan accuracy, an error may occur occasionally. But, if the occurrence oferrors can be controlled, the disruption will be minimized.

Clock slip results from differences between synchronized timing sources.It occurs at the point of interface between one national timing system, andone or more timing systems elsewhere. The result of a clock slip is thaterrors will occur which, if not controlled, will produce a large proportion ofseverely errored seconds at regular intervals.

The presence of Doppler shift buffers or plesiochronous buffers atnetwork interfaces (i.e., the Earth station) controls the rate of slip to atheoretical maximum of 1 in 70 days. Effectively, this means that one 8-bitword at 64 Kb/s would be lost or repeated once every 70 days.

Slips will cause errors to data circuit users, “clicks” to audio circuit users,streaks on fax printouts, and other problems to users. The ITUrecommends maximum tolerable slip rates for various types of service.They are:

Category A - generally unnoticeableCategory B - some services affected (Fax, 64 Kb/s data)Category C - all services affected

The mean slip rate corresponding to these categories is reproduced fromITU-T from Recommendation G.822 in Table 3.4.



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Table 3.4 Allowable Slip DurationCategory A For at least 98.9 percent of testing time, there should be

fewer than 5 slips/24 hours.Category B For a maximum of 1 percent of testing time, there could

be between 5 and 720 slips/24 hours.Category C For a maximum of 0.1 percent of testing time, there may

be more than 30 slips/hour.

Measurement of clock slip is normally performed in the InternationalSwitching Center (ISC) as part of a readout of control information from amodern telephone exchange. Slip counters are available as part ofnetwork analyzers, and can also be used by data centers.

In practical end-to-end connections, the actual slip rate may considerablyexceed recommended targets. Whether or not it will affect the service canbe deduced from the above Table 3.4 and ITU-T RecommendationG.822. In the Earth station environment, there are three potential sourcesof excessive clock slip:

a. Human error - statistically, this is the largest source of errors in thenetwork. This includes patching errors, short interruptions, excessivemanual switching of transmission equipment, etc.

b. Excessive switching - includes switching main to standby equipment formaintenance, diversity switching on radio backhauls, etc.

c. Wander - controlled by Doppler buffers.

Jitter is defined as the displacement in time of a signal from its idealposition.

As an analogy, consider a fleet of buses leaving a bus station precisely at10-minute intervals. Because of the flow of traffic through a city, some ofthe buses might be delayed, and some might run ahead of schedule. Toan observer several miles along the route, the flow of buses will appear tobe jittered.

Three main causes of jitter in a transmission system are the process ofmultiplexing, particularly in higher order multiplexers, regeneration, andthe transmission path itself.



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Earlier sections discussed how overheads are added to digital signals forvarious purposes, e.g., synchronization. These overheads should existonly when the signal is passing between corresponding multiplexers, andmust be removed before the digital signal is fed to the end user. Theoutput signals are not regular and, therefore, pauses occur while theoverheads are removed. These pauses are smoothed out in the finalstages of the multiplexer, but some unsteadiness remains as jitter.

A regenerator has the job of receiving a degraded signal, extracting timinginformation, and retransmitting a new signal, recreated from what hasbeen received, at the recovered clock rate. The main problem lies withthe recovered clock rate that tends to be pattern-dependent. Problemsalso arise in regenerators due to equalizer misalignments, componentaging, and mistuning of the clock recovery circuits.

Because characteristics of the transmission path are subject to change,the signals passing along that path are also subject to change. Thisdegradation tends to be fairly slow, and is known as Wander.

Wander is best described as "slow jitter", because the timing varies at aslow rate. The two main causes already mentioned are now explained ingreater detail.

Source 1: Radio Propagation

The most significant radio path for satellite communication is that from thetransmitting station to the satellite to the receiving station. Because ofsatellite movements, the path length between two ground stations willchange through a 24-hour period. Hence, the signals can take a longeror shorter time to travel the distance depending upon the satellite position.The wander frequency is one cycle per day. This phenomenon is dealtwith by the use of Doppler shift buffer stores at the receive Earth stations.

Source 2: Temperature Variations

Both copper and fiber cable systems with regenerators may be affectedby temperature, especially if there are large daily temperature changes orseasonal variations. Propagation time will alter at a low rate. This mightapply to a backhaul, especially if regenerators are included in overheadplant (i.e., installed on poles).



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There are two parameters associated with the measurement of jitter - theamplitude and the frequency of the jitter.

Jitter amplitude is the amount in time by which the signal is displacedfrom its ideal position. Usually, reference is made to the peak amplitude,which is the maximum displacement from the ideal. Jitter frequency is ameasure of how often the jitter amplitude varies from peak, through zero,and back to peak. In terms of the bus fleet analogy introduced earlier, theamplitude of the jitter is the number of minutes the bus is delayed or early.The frequency of the jitter would be a measure of how often each busarrives late or early.

The amplitude of the jitter is measured in unit intervals, abbreviated as UI.A unit interval is the duration of each bit period. At 2.048 Mb/s, theduration of each bit is 488 nsec. If that signal were to arrive early or lateby, say, 244 nsec, the amplitude of the jitter would be described as:

244/488 = 0.5 Unit Interval

The frequency of a jittered signal is measured in kHz, Hz, or evencycles/day. When observed on an oscilloscope, it will be seen that thereare a number of frequency components present on the jittered signal.Hence, measurements of jitter frequency are often taken over a range offrequencies, i.e., wideband, rather than at spot frequencies. Wander hasalready been described as "slow jitter", and is usually taken as anythingslower than 20 Hz.

If excessive jitter is present on a digital system, errors will occur. Signalsare expected by the receiving equipment at specific times, e.g., every 488ns, for a 2 Mb/s signal. If those signals arrive early or late they will bemissed, and errors will be introduced. To limit errors, the ITU-T quotesmaximum figures for jitter anywhere in a network. These are measuredusing a jitter receiver, and maximum jitter amplitudes are defined overspecific ranges of frequency.

There are three basic sets of jitter tests:

1. A test to measure the maximum allowable jitter at the output of anyequipment or network.

2. A test to ensure that receiving equipment will tolerate a certain amountof jitter at its input.



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3. A test to examine how a jittered signal is handled by a transmissionnetwork or piece of equipment.

These tests will be examined in turn and their limits discussed. Analternative method of measuring jitter (using "eye patterns"), and amethod of reducing jitter, will also be discussed.

Because an excessive jitter at the output of a network can cause errors, itis necessary to define the maximum amount allowable at any point. Thereare several sources of jitter, all acting on the same digital signal.Consequently, a signal is not jittered by one frequency, but by severalfrequencies simultaneously. To take this into account, jitter measurementmeasures the maximum jitter amplitude over a range of frequencies.

Many sources of jitter introduce fairly low frequency components,although some sources introduce higher frequency components also. Todifferentiate between them, the normal jitter measurements are performedover two ranges of frequency, as shown in Figure 3.17(A).

Figure 3.17(B) shows relative passbands for the jitter measuringequipment illustrated above, and quotes frequencies appropriate tomeasurement of jitter at any 2 Mb/s point.

When measuring jitter in the manner described above, the figures for themaximum acceptable jitter at any point in the digital hierarchy can befound in ITU-T Recommendations G.823 for CEPT hierarchy, or G.824 forthe NAS hierarchy. INTELSAT specifies these targets in IESS-308,paragraph 10.7, and the most useful figures are reproduced here inFigures 3.18 and 3.19.



MEASUREMENT ARRANGEMENTS FOR OUTPUTFROM A HIERARCHIAL INTERFACE OR AN

OUTPUT PORT FROM CCITT REC. G.823

HIERARCHICALINTERFACE OR

EQUIPMENTOUTPUT PORT

JITTERDETECTOR

MEASUREDJITTER

AMPLITUDE

B UNITINTERVALS

1

B UNITINTERVALS

2

BAND PASS FILTER

BAND PASS FILTER

(A)

CUT-OFF F AND F3 4

CUT-OFF F AND F1 4

BAND PASS FILTERS FOR JITTER RECEIVERS

JITTER FREQUENCYf 3 f 4f 1

20Hz 18kHz 100kHzeg. for 2.048 Mbit/s

(B)

Figure 3.17 Jitter Measurement



Network limit

Digital rate(Kb/s)

Hierarchical Interface

or equipmentoutput port

JitterDetector

Band pass filter cut-off f1 and f4

Band pass filter cut-off f3 and f4

B1 unitintervals

B2 unitintervals

Measuredjitter amplitude

0.25

1.5

1.5

1.5

1.5

0.05

0.2

0.15

0.2

0.075

20

20

20

100

200

3

18

3

10

10

20

100

400

800

3500

64

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8 448

34 368

139 264

Measurement filter bandwidthParametervalue

B 1 B 2 f1 (Hz) f4 (kHz)

(unit interval peak-to-peak)

Band-pass filter having a lower cut-off frequencyf1 or f3 and a minimum upper cut-off frequency f4

f3 (kHz)

Figure 3.18 Maximum Output Jitter from a CEPT Port

Maximum permissible output jitter at hierarchial interfaces

Network limit(UI peak-to-peak)

B 1 B 2

5.0

3.0

2.0

5.0

1.0

0.1

0.1

0.1

0.1

0.05

10

10

10

10

10

8

3

8

30

240

40

60

400

400

1000

f1

(Hz)

f3

(kHz)

f4

(kHz)

Band-pass filter having a lower cut-off frequencyf1 or f3 and a minimum upper cut-off frequency f4

Digital rate(Kb/s)

1 544

6 312

32 064

44 736

97 728

Hierarchicalor equipmentoutput port

JitterDetector

Band pass filtercut-off f1 and f4

Band pass filtercut-off f3 and f4

B unitintervals

1

B unitintervals

2

Measuredjitter amplitude

Figure 3.19 Maximum Output Jitter from a NAS Port



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Read the table for the amount of jitter measured at 2.048 Mb/s in Figure3.18, which refers to the CEPT hierarchy. Drawing a line under 2.048Mb/s, the filter frequencies range from 20 Hz to 100 kHz (f1 to f4) for thewider filter, and 18 kHz to 100 kHz (f3 to f4) for the higher part of the band.By referring to the drawing, a maximum of 1.5 UIs (B1) is tolerable overthe wider band, while 0.2 UI is the maximum tolerable between 18 kHzand 100 kHz.

Most jitter measuring sets will automatically select the correct filterfrequencies when the speed is selected, so the only figures usuallyneeded are for B1 and B2 UIs.

As jitter tends to occur randomly, it is normal to run a test for a fewminutes, noting the maximum jitter amplitude during that time. Most testinstruments will do this automatically. Tests will typically be performedover a satellite link or over a backhaul, and may be performed while inservice. Refer to Figure 3.20.

The above tests have specified the maximum jitter that may be apparentat the output of a network or at any hierarchical interface. Because theremay be a certain amount of jitter present at the output of the network, it ispossible that there may be a jittered signal into your receiver. The jittertolerance test, therefore, tests the receiver to ensure that it will handle ajittered input up to a certain extent.

The arrangement for testing the input jitter tolerance of transmissionequipment is shown in Figure 3.21. An unjittered input signal isdeliberately jittered by a specific amount. At the system output, the signalis fed into an error detector. The equipment operates satisfactorily if noerrors occur.



DIGITALTX EQPT

DIGITALRX FROM

BACKHAUL

JITTERRECEIVER

DIGITALRX EQPT

DIGITALTX FROM

BACKHAUL

(1)

(2)

JITTER TEST (1) WILL MEASURE JITTER PRODUCED BY THEBACKHAUL.

JITTER TEST (2) WILL MEASURE JITTER PRODUCED BY THEINTERNATIONAL LINK.

Tests could be made in-service

Figure 3.20 Jitter Tests

8

2

Jitter Tolerance Testfcomplete

l i l

Jitter ToleranceTfor receive sectionfmultiplexe

JitterGenerator

JitterGenerato

ErrorDetector

PatternGenerator

PatternGenerator

ErrorDetector

8

2

JITTER TOLERANCE SPECIFIES DEGREE OF INPUT JITTERWHICH MUST BE TOLERATED BY RECEIVE EQUIPMENT

(out-of-service checks)

Figure 3.21 Jitter Tolerance Test



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Figure 3.22, taken from ITU-T Recommendation G.823, lays down theobjectives for this test. Using 2.048 Mb/s as an example, and relating thefigures in the table to the graph adjacent to it, one will notice a certaindegree of agreement between this test and the maximum output jitter test.Between frequencies f1 and f2, 20 Hz and 2.4 kHz, the transmissionequipment should operate with A1 (1.5) UIs of jitter. Between thefrequencies f3 to f4, 18 kHz to 100 kHz, the equipment should operate withA2 (0.2) UIs of jitter. Similar graphs and tables can be found in G.824 forthe NAS.

Although the test just described checks that the equipment operatescorrectly, it is unclear just how much better it is than the graph. Forexample, at 30 Hz, the equipment may be able to handle 1.5 UI, but not1.6 UI of jitter. There is very little margin for equipment aging. It is usual,especially when commissioning new equipment, to test a few spotfrequencies to check how much margin exists. The same test set up asearlier is used. One frequency is selected, say 30 Hz, and the amplitudeof jitter is increased from 1.5 UI until errors occur. This is repeated atseveral frequencies to determine the margin. Refer to Figure 3.23.Although no figure for margin is specified, any narrow margin should beinvestigated, especially when testing new equipment.

The test setup is shown in Figure 3.24. A signal with a known jitteramplitude is inserted into transmission equipment, and the amplitude ofjitter present at the output is measured. The jitter transfer is calculatedfrom the formula:

Jitter Transfer = 20 log10 (Jitter Amplitude Out, UI) dB (Jitter Amplitude In, UI)

This test is repeated at various frequencies, and compared with theappropriate ITU-T Recommendation, e.g., G.742 for a 2/8 Mb/smultiplexer. See Figure 3.25. At the higher frequencies, it is sometimesdifficult to measure the jitter being inserted because of the amplitude ofthe lower frequency jitter. Readings can be improved in accuracy byusing a selective measurement of jitter. The manufacturer of the jittermeasuring equipment should describe how to perform this in thehandbook.



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152

0.25

1.5

0.05

1.5

Peak-to-peakjitter

andwanderamplitude

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Jitter frequency

f 0 f 1 f 2 f 3 f 4

A 2

A 1

A 0

Frequency

f 1 f 2 f 3 f 4

Pseudo-randomtest signalRecs 0.151and 0.152

20 Hz

20 Hz

600 Hz

2.4 Hz

3 kHz

18 kHz

20 kHz

100kHz

20 Hz

100 Hz

200 Hz 500 Hz

1 kHz

400 Hz 3 kHz 400kHz

800kHz

3500kHz10 kHz

10 kHz

2 - 115

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2 - 123

2 - 115

2 - 111

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1.2 x 10 Hz-5

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*

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Parametervalue

Peak-to-peakamplitude unit

interval

A 0 A 1 A 2 f 0

0.2

0.2

0.15

0.075

* Values under study

Figure 3.22 Input Jitter and Wander Tolerance(ITU-T Recommendation G.823)

JITTER MARGIN

Slope equivalent to20 dB/decade

Pea

k-to

-pea

k jit

ter

and

wan

der

ampl

itude

0

0.2

1.5

20 Hz 2.4 kHz 18 kHz 100 kHz

Jitter frequency

Figure 3.23 Jitter Margin Results - 2 Mb/s Tributary



JITTERRECEIVER

JITTERGENERATOR

Jitter Transfer = 20 log Jitter Amplitude Out (UI)Jitter Amplitude In (UI)10 dB

NB: This is an out-of-service test

8

2

Figure 3.24 Jitter Transfer Test

dB

0.5

-19.5

20 dB/decade

100 kHz400 Hz40 Hz

20 log

outin

f 0 f 5 f 6 f 7

T 1501590-88

J J

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As a network becomes more complex, the amount of jitter present willincrease. Much study has been performed on this, and computer modelshave been produced. Jitter does not increase linearly, i.e., if there are twodigital processes instead of one, it does not double, but actually increasesat a slower rate. For details, refer to ITU-T study group documentation.

One way of displaying jitter and other impairments is by using anoscilloscope to produce an eye pattern. A received signal is fed into acorrectly terminated oscilloscope, which is triggered from an accurateexternal clock. The trace on the oscilloscope will not be a fixed one, butwill thicken if jitter is present. A badly jittered signal will show as a verythick display. Because the display can be thought of as being similar inshape to a human eye, it is called an eye pattern. The advantage of thistest is that it does not require any special test equipment, but it is verysubjective.

It is often necessary to remove any jitter present in a received signal. Theblock diagram in Figure 3.26 illustrates the principles of a jitter reductioncircuit. The operation of this circuit is described below.

CONTROLVOLTAGE

VCO

C/R

JITTEREDTRAFFICINCOMING

WRITE CLOCK READ CLOCK

JITTER - REDUCEDOUTPUT TRAFFIC

First in, First outBuffer Store

CLOCKRECOVERY

PHASECOMPARATOR

Figure 3.26 Diagram of a Jitter Reduction Circuit

The incoming jittered traffic signal is written into a first-in, first-out bufferstore, by a write signal recovered from the incoming signal. The Writesignal will be jittered by the same amount as the traffic signal. The trafficsignal is read out from the store by using a Read signal, also derived fromthe incoming traffic, but with the jitter removed.



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The jitter removal circuit includes a Voltage Controlled Oscillator(VCO)which operates nominally at the line frequency 1.024 MHz. A DC voltagethat will either raise or lower the VCO frequency according to the polarityand size of the DC voltage drives the VCO. The DC voltage is derivedfrom the difference between the VCO frequency and the line frequencyproduced by a phase comparator. As the line frequency varies (the jitter),so will the VCO.

However, there is a low pass filter between the phase comparator and theVCO. If the incoming signal varies at too high a rate, i.e., if the jitterfrequency is too high, the varying DC voltage will not pass through the lowpass filter, and the VCO will assume a rate approximating the averageincoming frequency. The VCO will therefore be a smoothened recoveredclock that can be used to read the traffic smoothly out of the buffer. Thistype of circuit is built into every receive card on high-order multiplexers sothat excessive jitter is reduced automatically in the multiplexer.

Previous sections discussed the various ways in which a digital signal canbe degraded as it passes through a system. This section describesmethods to measure the degree of degradation particularly in an Earthstation environment, and consider what is an acceptable limit. In thissection, the subject of errors will be examined in detail, and a method ofsetting objectives introduced. A simple method of counting errors andquoting error performance is the Bit Error Ratio, BER.

Noise is an important cause of errors, and degrades the incoming signal.The regenerator makes a decision based on the level of the incomingsignal. If there is noise on the signal, a wrong decision introduces anerror. At an Earth station, noise can occur as a result of poor carrier-to-noise ratio (C/N), or interference on the satellite link. A laser or lightdetector failure will introduce noise. A microwave backhaul might sufferfrom errors due to interference or propagation phenomenon.

An ideal system will have no errors. If there are errors, something iswrong. However, the matter of interest is whether the errors arenoticeable to circuit users. The effects of errors vary with the differentcircuit users.

An audio circuit user - a telephone user, for example - will be listening to adecoded digital signal. Whether the user will notice the introduction of anerror depends on which bit of an 8-bit word is corrupted. Tests haveshown that the average user only notices 1 error in about 20. Even if anerror is noticed, it will not be noticed immediately.



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It depends on the distribution of errors. If all the errors occur together,they will be noticed. If they are evenly spread out, more errors persecond can be tolerated before an audio user will reject the signal.

From the above description it can be seen that if all the errors occur inbunches, they are more likely to be rejected by audio users than if theyare evenly spaced. The number of errors per second is of secondaryimportance; it is the grouping that counts.

Data users normally organize the data into blocks. The length of theblocks depends on the protocol in use, but some bits in each block areusually reserved for error checking purposes. The method may vary fromsimple parity checking to complex methods.

Once the data user has detected an error in the received traffic, it is acommon practice to request a retransmission of that and subsequentblocks.

Other circuit users include FAX, TV, and VF data. Each use has its ownrequirements. A TV system can be quite forgiving because the humaneyes and brain can link from one good picture to the next, skipping overthe occasional degraded picture. FAX messages may have to becompletely re-sent if errors occur, but VF data users may tolerate asurprisingly high concentration of errors.

Three terms have been introduced to refer to errors, concentration oferrors, and background errors. These terms are: errored seconds,severely errored seconds, and degraded minutes. Refer to ITU-TRecommendation G.821 paragraph 1.4.

If any 1-second interval contains any error, that second is called anerrored second. The number of errored seconds in a data circuit isnormally expressed as a percentage of the total testing period hence:

Errored Seconds = Number of seconds containing errors x 100 percent Total testing period in seconds



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It is psychologically more positive to talk about error-free seconds, (thenumber of 1-second intervals completely free of error), than erroredseconds, particularly in dealing with customers. It is quite common to seethis term used in place of errored seconds. The relationship between thetwo is:

Error-Free Seconds = Total Test Period - Errored Seconds

This figure is commonly quoted as a percentage.

Error Free Sec. (%) = 100 - Errored Sec. (%)

This term is used to refer to any 1-second interval where the bit errorratio, BER, is worse than 1 in 103. For a 64 Kb/s, a severely-erroredsecond is one that contains more than 64 errors. Hence the number oferror bursts can be measured. As with errored seconds, SES is normallyquoted as a percentage of the total testing period:

Severely-Errored Seconds =Number of seconds with BER > 1 in 103 x 100%

Total testing period in seconds

This figure takes a longer measuring period of sixty seconds, and if theBER is worse than 1 in 106, the period is counted as a degraded minute.If measurements are performed at 64 Kb/s, any period of 60 secondscontaining more than 4 errors is counted as a degraded minute. This isused to count the long term, background, distribution of errors, and is alsonormally expressed as a percentage:Degraded Minutes = Number of minutes with BER > 1 in 106 x 100%

Total testing period in minutes

Error measurements at 64 Kb/s should include simultaneousmeasurement of all the three parameters: errored seconds, severely-errored seconds, and degraded minutes to analyze the performance of acircuit, and relate it to user requirements. Many manufacturers build thisfacility as a standard feature of measuring equipment.



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The ITU-T has set error objectives in the terms discussed above, andrelated them to a standard reference circuit known as the HypotheticalReference Connection (HRX). Having set these objectives for the HRX,the ITU-T then provides a method to calculate the objectives for anycircuit. This is a test mainly of interest to the data department of anorganization. INTELSAT’s interest is that the satellite link and backhaulform part of the international connection, and should not, therefore,contribute an excessive amount of errors. Consider the HRX to seeexactly where satellites fit in.

Figure 3.27 shows an HRX with a total end-to-end length of 27500 km. Itis mainly made up of an international connection, which may passthrough up to three different countries at their ISCs. Each terminalcountry will have a local connection between the 64 Kb/s users and theirnearest exchanges, remote line unit, switch, distribution node, etc., andalso a national trunk connection between the local exchanges and theISC.

LOCAL NATIONAL INTERNATIONAL NATIONAL LOCAL

27,500 km

S LE PC SC TC ISC ISC ISC ISC ISC TC SC PC LE S

S - SubscriberLE - Local ExchangePC - Primary Centre

SC - Secondary CentreTC - Tertiary CentreISC - International

Centre

Switch

Transition Element

Figure 3.27 Digital Hypothetical Reference Connection (HRX)

Figure 3.28 illustrates relative quality of each constituent part of the HRX,and indicates distances. The international section, from one terminal ISCto another terminal ISC, is considered to stretch 25,000 km and providesa high grade of service.

The national section, from a local exchange via an intermediate nationalexchange to ISCs, performs to a medium grade, and the usually short linkfrom subscriber to local exchange performs to a local grade of service.



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The Earth station typically forms part of the international connection asshown in Figure 3.29. Hence it contributes to the high-grade section ofany network. An Earth station-to-Earth station link is considered as beingequivalent to 12,500 km of the high-grade section, leaving up to 12,500km for backhauls and/or international transit sections.

27,500 km

1,250 km 25,000 km 1,250 km

note 2 note 2

T -reference

point

LE

LOCALGRADE

MEDIUMGRADE

HIGHGRADE

MEDIUMGRADE

LOCALGRADE

LET -reference

point(note 1)

NOTES:

1. The T-reference point is a CCITT defined subscriber/network ISDN interface.

2. This point may be at the LE, PC, SC, TC or ISC depending on country size.

Figure 3.28 System Quality Demarcation for Longest HRX

LOCALGRADE

MEDIUMGRADE

HIGH GRADE MEDIUMGRADE

LOCALGRADE

3000 km 240 km

ISC LEISCLESub Sub

Figure 3.29 A Typical 64 Kb/s Connection that includes a Satellite Link



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Whenever a new service is implemented, SSOG tests betweencorresponding Earth stations are necessary. The tests include a receiveBER measurement [SSOG-308, paragraph 8.13 for IDR services], whichis performed to give a quick check of circuit continuity, and ascertainwhether detailed end-to-end testing by data test centers is required. TheINTELSAT specification for a "quick test" is for a BER no worse than 1 x107 over a 15-minute period.

Table 3.5 shows digital error performance that ITU-T recommends inRecommendation M.555, which states that tests can be performed onloopback. The maximum acceptable error count would then be doublethe figure mentioned above

Table 3.5 Quick Checklist of Digital Error Performance(Provisional from ITU-T M.555)

Effective distance (note 1)kilometres

5001000200040008000

12 50018 00025 000

Minimum test duration(in minutes)

1515151515151515

510204080

125180250

Maximum allowed counts(note 2) in errored seconds

1. May be linearly interpolated for other distances.

2. Values relate to 1.5 or 2 Mb/s.

Daily maintenance and operation in the digital environment are generallyless tedious than in the analog environment. Nevertheless, care shouldbe taken to ensure that the BER and/or concentration of errors do notincrease and that antenna tracking accuracy is maintained. If the carrier-to-noise ratio worsens, so will the BER, resulting (initially) in worseningerrored seconds and degraded minutes figures. Propagation difficulties,Sun interference, spurious carriers, etc., will increase severely-erroredseconds and degrade BER. In extreme conditions, there will be acomplete loss of service.



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The measurement of errors is complex because different users expectdifferent performance standards of the network. However, the simplestway to measure errors is to count the number of errored bits received,and express this as a proportion of the total number of bits received.

Example

A 64 Kb/s data test resulted in 3840 errors in 10 minutes. What is theBER?

BER = Total number of errored bits·Total number of bitsTotal number of errored bits = 3840Total number of bits = 64000 x 60 x 10BER = 3840·(64000 x 60 x 10)

= 1·10000or 1 in 104

Parity checking, code violations, and CRC are some ways to detecterrors. Once an error is detected, it can be corrected or an automaticrequest for a retransmission can be made. The latter is called AutomaticRepeat reQuest (ARQ).

Parity checking involves breaking the data stream into a series of blocks.At the transmitter, the number of 1s in that block is counted, and if thenumber is even, an extra parity 1 is added. At the receiver, each block ischecked to ensure that an odd number of 1s has arrived. An even numberof 1s indicates presence of error(s) and an ARQ is sent.

Code violation involves coding each bit of information in a unique manner.For example, each time a 1 is transmitted, the polarity or phase might beinverted. If two signals of the same polarity were received consecutively,an error might have occurred, and an ARQ is sent.

This is an established technique in lower rate systems. At a transmitterminal, the signals are fed into a modified counting circuit. After aspecific number of bits, the contents of the counter are transmitted. At thereceive terminal, there is an identical counting circuit, and after the samenumber of bits, the contents of the receive counter should be the same asthe contents of the transmit counter; if not, an ARQ can be generated, oran alarm condition displayed. One drawback of ARQ is that a bufferstorage is necessary to hold errored and subsequent blocks until the errorcan be corrected by the retransmission of the affected blocks.



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A commonly adopted alternative at Earth stations is Forward ErrorCorrection (FEC). This method relies on a convolutional code, wheresufficient information is transmitted to allow the receiver to not only detectan error, but also correct it without sending an ARQ.

FEC is required to achieve optimum use of satellite power and bandwidth,and to provide the best possible reliability within the system limitations.The major considerations on the satellite system follow.

a. The principle disturbance is additive wideband white noise.

b. The transmission delay is relatively large, about 250 ms, forgeostationary orbits.

In general, satellites are more often power-limited than bandwidth-limited.Hence, sufficient bandwidth is available to allow the bandwidth expansionthat a FEC will require. This power limitation reduces the ability to usehigh power signals to overcome noise problem. By coding, an apparentgain in signal level against noise power is obtained due to the errorcorrecting capabilities of the code structures used. This apparent gainis known as the coding gain. Figure 3.30 shows a typical BERperformance with and without coding.

The satellite transmission delay limits use of an ARQ system to low datarates. This is because ARQ requires buffers capable of holding blocks ofdata until a confirmation signal from the distant equipment is received.As an example, a 10 Mb/s bearer would require a buffer capable ofholding a minimum of 5 Mb/s.

For the above reasons, FEC is used where the information fortransmission is coded using known patterns that will allow reliabledecoding at the distant end. On all coded systems, the bit rate to thesatellite is greater than information rate into the FEC encoder. Figure3.31 shows the position of the FEC encoder and decoder in an IDRchannel unit.



10 -7

10-6

10-5

10-4

10-3

10-2

10 -1

0 2 4 6 8 10 12 14Eb/No (dB)

BER

Typical ValueIdeal Value

Without FEC

R = 3/4

WithFEC

Figure 3.30 BER Performance With and Without FEC

RECEIVE INTERFACES

A

a b c d eTO UP-

CONVERTER

FROM DOWNCONVERTER

OVERHEADREMOVAL

DE-SCRAMBLER

FECENCODER(Rate 3/4)

QPSK

DEMODULATOR

SCRAMBLERCCITT REC.

V.35

FECENCODER(Rate 3/4)

QPSKMODULATOR

OVERHEADADDITION

TRANSMIT CHANNEL UNIT

RECEIVE CHANNEL UNIT

a b c d e

H

D

Ea INFORMATION RATE IRb/c COMPOSITE RATE CR = IR PLUS OVERHEADd TRANSMISSION RATE R = CR/C (C = Code Rate = 3/4)e SYMBOL RATE SR = R/2

TRANSMIT INTERFACES

Figure 3.31 Basic IDR Block



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A convolutional code uses preceding data to form the code.Convolutional codes prove to be particularly suitable for systems wherethe information to be transmitted arrives serially in long sequences ratherthan in blocks. The information symbols are then encoded continuouslyin serial form.

Coding is achieved by entering the symbols into a shift register. (Refer toFigure 3.32.) Following each shift, a number of coded symbols areobtained by the Modulo-2 addition of the contents of selected stages ofthe shift register (Modulo-2 addition is addition with no carry facility, i.e.,1+0+0 = 1, 1+1+0 = 0, etc.). Each stage of the shift register has a binarydigit acting on it according to the code generation bits known as theoperating polynomial G1 and G2 (A polynomial is an algebraicexpression consisting of 3 or more parts). The number (n) of codedsymbols at the output per information bit gives the code rate (1/n), e.g., ½or ¾.

A

1 2 3

B

1001

0011

Input1101

Output10, 00, 01, 11

X1i

X2i

Figure 3.32 Simplified Encoder

Figure 3.32 shows a simple ½ rate encoder with a three-stage shiftregister. The number of stages of the register is known as the encoder’sconstraint length (K). The coded output is taken from X1i and X2ialternately via the switch. The code generation polynomials in this caseare given by:

Polynomial G1 = 111 (A)Polynomial G2 = 101 (B)



Referring to Figure 3.32 and assuming that the encoder starts in the allzeros state, the first four bits 1011 produce an output of 11, 10, 00, and01, respectively, as shown. Clearly, the output corresponding to eachnew input bit depends on the previous 2 input bits that are stored in theshift register.

The output bits can also be derived from the trellis diagram, shown inFigure 3.33, which has been drawn to match the code generation for theencoder in Figure 3.32. The trellis starts at the all zeros state, node a, attime t = 0. Transitions are made corresponding to the input bit. Thesetransitions are denoted by a solid line for a 0 input, and a broken line for a1 input. The output bits obtained are shown next to the transition.

The four states “a” to “d” equate to the conditions of stages 1 and 2 of theshift register prior to the insertion of the next bit.

a = 00, b = 10, c = 01, d = 11

Figure 3.33 Trellis Diagram



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Two output bits represent each input bit to the above encoder. Thelocation of any two output bits within the trellis can be identified from thepreceding and the following bit pairs, which are dependent on thepreceding and following input bits. Obviously, the error correctingperformance of the encoder and the decoder are improved by increasingthe number of input bits which have an effect on the output bit pairs of theencoder. This is achieved by increasing the constraint length of theencoder. However, it can be shown that little improvement is achieved fora constraint length greater than 8.

Figure 3.34 shows a Rate ¾ convolutional encoder. This code is knownas a punctured type of convolutional code and is constructed from a Rate½ encoder by periodically deleting specific bits from the Rate ½ output bitsequence. It has been shown that punctured codes operating at rateshigher than ½ rate result in a performance loss of only 0.1 dB to 0.2 dB,but the main advantage is reduced circuit complexity. The encoder has aconstraint length of 7 and generates polynomials of 133 and 171 in octalnotation or binary 1011011 and 1111001, respectively.

Bit Selector P

Q

Generator Polynomial = 171 (Octal)

= 1111001 (Binary)

Generator Polynomial = 133 (Octal)

= 1011011 (Binary)

Deleting BitPattern = 101

Deleting BitPattern = 110

Uncoded

Data Input

Rate 3/4Punctured

Coded Data

Rate 1/2Coded Data

Bit Selector

Figure 3.34 IDR Encoder

Figure 3.35 shows the four major processes associated with the operationof a punctured code scheme. The data input at the transmit point (A) isinitially encoded by a rate ½ convolutional encoder implementing theconstraint length 7 code. The encoded output (B) consists of twocodewords, C0(n) and C1(n), for each input bit D(n). Certain codewordsare deleted from the data stream to be transmitted as shown in (B), andthe remaining codewords are regrouped into two-codeword symbols fortransmission over the IDR QPSK modulated channel (C).



Note that the result of this deletion of two codewords is that fourcodewords are actually transmitted for every three information bits, thusachieving a rate ¾ code scheme. At the receiver, the received symbolsare again regrouped to form the codeword pairing of the original rate ½encoded output. Null information codewords that convey no informationto the decoder are inserted in place of the codewords that were deletedby the symbol puncture circuit at the transmitter (D). The encoded datastream with null symbols inserted is then decoded by a rate ½ Viterbidecoder back to the original data stream (E).

The code used for the encoder in Figure 3.34 is, however, transparent to180-degree carrier phase ambiguities when decoded. As a result, theincoming data stream needs to be differentially encoded prior to beingpassed to the FEC encoder.

Rate 1/2Convolution

Encoder

Rate 3/4Puncture

Multi-SymbolInsertion

Rate 1/2Viterbl

Decoder

EncodedData

PuncturedEncoded

Data

Rx Data with NullInsertions

DataOutput

EDCBA

TransmittingStation

SatelliteChannel

ReceivingStation

DataInput

D (1) D (2) D (3) D (4) D (5) D (6)A

CO (1) CO (2) CO (3) CO (4) CO (5) CO (6)

C1 (1) C1 (2) C1 (3) C1 (4) C1 (5) C1 (6)

CO (1) CO (3) CO (4) CO (6)

C1 (1) C1 (2) C1 (4) C1 (5)

CO (1) CO (3) CO (4) CO (6)

C1 (1) C1 (2) C1 (4) C1 (5)

D (1) D (2) D (3) D (4) D (5) D (6)

= Null Symbol Inserted

= Symbol Deleted (Punctured)

B

C

D

E

Q ChannelP Channel

Figure 3.35 Rate 3/4 Punctured Code Operation



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Differential encoding and decoding are used to remove phase ambiguitiesof the received phase modulated signal caused primarily by the methodsused within the demodulator to recover the carrier. By encoding the dataas differences between adjacent symbols, the effect of the ambiguity isremoved. Figure 3.36 shows a block diagram of a differential encoder,and the output sequence.

The operation of the decoder is as follows:

If the sequence of input bits to the differential encoder is 1001, theencoder is assumed to have transmitted a 1 as the previous bit. Thisbit is compared with the first input bit. If the bits are the same, a 0 istransmitted; if they are different, a 1 is transmitted. The encoding rule is:the next transmitted bit is the Exclusive OR of the previous transmitted bitand the input bit. At the receiver, the demodulator output bits aredifferentially decoded by comparing adjacent bits. If they are the same,the source bit was a 0; if they are different, the source bit was a 1.



DIFFERENTIAL ENCODER

DIFFERENTIAL DECODER

EX OR

INPUT DATA OUTPUT DATA

A Bn

Bn-1

INPUT DATA OUTPUT DATA

A Bn

Bn-1

EX OR

MODULO 2ADDITION

MODULO 2ADDITION

Figure 3.36 Differential Encoder/Decoder



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Assume Bn-1 = 1Input (A) = 1011Output (B) = 10010

With no ambiguity, the decoder output for the input from the aboveencoder will be:

Demodulator Output 10010Decoder Output 1011

With a 180-degree phase ambiguity the output of the decoder will be:

Demodulator Output 01101Decoder Output 1011

By definition, maximum likelihood decoding implies comparing thereceived sequence with all possible transmitted sequences before makinga decision on the correct sequence. Decoding an n bit long binarysequence would, therefore, require the decoder to compare all 2n differentsequences that could have been transmitted. Because of this exponentialincrease in decoding effort with the length of the sequence, maximumlikelihood decoding is difficult to implement and is rarely used.

Considering the trellis structure code in Figure 3.37, Viterbi proposed asimpler form of decoding which produces a metric algorithm for everypossible path. By comparing the incoming sequences with the possiblepaths through the trellis, and giving an accumulated weight to eachpossible transition, it is possible to obtain the path closest to thetransmitted sequence. Paths with higher weights at each node arediscarded after each transition, thus reducing the number of possiblepaths to manageable levels. Although this is not Maximum LikelihoodDecoding in the true sense, the results obtained are identical.

From the trellis diagram in Figure 3.37, it can be seen that there are twopaths from each node. These two paths are each weighted by comparingthe received bit pair to the bit pairs produced by each path. The path withthe lowest accumulated weight at each node in the next level is selectedas the surviving path. For the present, we will consider only a binarydecoding technique, hard decision, in which the weight will be theHamming Distance.



The Hamming Distance is calculated by comparing the two bit pairs, i.e.,the incoming data pair and one of the transition data pairs. For every bitthat is different, a value of 1 (decimal) is given, as shown in Figure 3.37.

00

10 10 10 10 10

10 10 00 10 00 10 00 10 00 10 00

11 11 11 11 11 11 11 11 11 11 11 11

01 01 01 01 01 01 01 01 01 01 01

a

b

c

d

t = 3 t = 4 t = 5 t = 6 t = 7t = 1 t = 2t = 0

00 00 00 00 00 00

Incomingdata

TrellisTransition

data

Hamming Distance

00

01

01

01

01

00

00

01

10

11

0

1

0

2

1

.... and so on for all possible combinations

Figure 3.37 Trellis Diagram and Hamming Codes



The weights are accumulated for each path. At each node the path withthe lowest value, Hamming Distance, is selected as the surviving path,while the other is rejected. In the case of two paths yielding the sameweight, the survivor is chosen at random. There is no benefit fromretaining both paths. Hence, at each step, the extensions increase thenumber of paths by a factor of 2, while the comparisons reduce thatnumber by a factor of 2 resulting in a constant number of surviving paths.Refer to Figure 3.38.

11 10 00 01 01 11 00InputData

a

b

c

d

t = 7t = 6t = 5t = 4t = 3t = 2t = 1t = 0

(3)

2

(5)

0

(4)

3

(4)

3

Figure 3.38 Decoding Sequence to T = 3

After a number of steps through the trellis, it will be noted that all thesurviving paths have a common root. This root has the most likelihood ofbeing the transmitted sequence as shown in Figure 3.39, and as such isdecoded. The recovered data are passed to the output port.



11 01 00 10 10 8

3

(8)

0

3

(7)

201

1010

01 00

11(5)

0

t = 5t = 4t = 3t = 2t = 1t = 0

Figure 3.39 Step by Step Decoding Process

The operation of the Viterbi decoder is always forward without backing up.A decoding step involves only the determination of the branch weight, thetotal accumulated weight and the pairwise comparison and proper pathselection. These operations are identical from level to level, and as theymust be performed at every state, the complexity of the decoder isproportional only to the number of states, and hence grows exponentiallywith constraint length. This provides a practical limit for Viterbi decodingto convolutional codes of short constraint length (k<8).



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As an illustration, consider Viterbi decoding for the K=3, rate 1/2 codepreviously given. Let the input sequence be 1, 0, 1, 1, 0, 0, 0. Thecorresponding output sequence will be 11, 10, 00, 01, 01, 11, 00. This isshown in bold lines through the Trellis in Figure 3.39.

Figure 3.39 traces the states up to the time interval t=5. The HammingWeights for each path are shown. The path with minimum HammingDistance (bold line) is retained and the others are omitted. The minimumHamming Distance traces out the received data stream of:

11 10 00 01 01.

Figure 3.38 shows the decoding sequence to t=3. It has been assumedthat the coder was in the all-zero’s state initially. The nonsurvivor pathsare shown as dotted lines. The accumulated weights for each path areshown. Those for the nonsurvivor paths are shown in brackets.

Let us assume that an error is introduced during the transmission asshown in Figure 3.40:

Transmit Data 11 10 00 01 01Receive Data 11 10 10 01 01

where the third bit-pair is transmitted as 00 but received as 10. As can beseen in Figure 3.40, by discarding the nonsurviving paths and their roots,the correct path is decoded to t=5 despite the introduced error.

As discussed previously, a number of decoding steps need to becompleted before the correct path through the trellis can be established.The decoder must, therefore, be able to store the path data andaccumulated weights for each path in the Trellis for sufficient levels toallow the sole surviving path to be made apparent. It has been foundthrough simulation that a memory capable of holding these data for 4- to5- thousand levels of the trellis is sufficient in a majority of cases. Shouldthe buffer be filled, and a sole surviving path is not available, the survivingpath with the lowest accumulated weight is selected. The size of thememory within the decoder gives the length of the delay between thecode sequence that goes into the decoder and the correspondinginformation bit appearing at the output.



InputData

1100 00

11 11 11

01

10 10 10

ERROR

1 3

(4)

3

(4)

4

1

3

(3)01

(3)

10 10 10

10

00

01

00

0

111 01

t = 5t = 4t = 3t = 2t = 1t = 0

Figure 3.40 Decoding Sequency with Error Introduced



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In the above decoding process, we used the Hamming Distance toestablish the weight of each path within the trellis. This is only possiblefor hard decision decoding. (Hard decision where a 1 is a 1, and a 0 is a0 with no ambiguity.) For all decoders used in IDR services, soft decisiondecoding (various levels of 1 and 0) is used.

Due to the presence of white noise at the demodulator input, the outputbits will not appear as clearly defined 1s or 0s, but will be at somearbitrary level in between. It is normally assumed that should the outputsignal be above a preset level, it is treated as a 1, and below that level asa 0. Thus, the signal has been quantized using two-level quantization,which is known as the hard decision case.

To improve the efficiency of the Viterbi decoder in the presence of whitenoise, the output of the demodulator is quantized using eight levels, givinga three-bit code for each bit of information. Thus, the information bit pairsused for calculating the weighting for the paths within the trellis are nowrepresented by a six-bit codeword. The decision as to whether a receivedbit is a 1 or a 0 is thus made apparent only by the surviving path throughthe trellis. This is known as Soft Decision Decoding. Soft DecisionDecoding gives an improvement in the coding gain of the system ofapproximately 2.5 dB over the Hard Decision method.

Digital Satellite Communications Technology Handbook Chapter 4 – Applications


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Any modern office uses some type of digital equipment. As the officeexpands, the requirements increase, and sooner or later the office willneed to communicate with another office. We can provide a digitalnetwork among offices using either existing line plant or installing new lineplant. A direct point to point connection between two users is relativelyeasy to organize. Interfacing the user to the network requires signalingand timing compatibility, which is typically achieved by G.703 interfacingat 64 Kb/s.

When more than two users wish to communicate to each other, there isan added problem: does the line go from A to B, then on to C, or is theresomething better? Network architecture is a term used to describe theways to arrange the interconnection of more than two users. It can beapplied to a relatively modest connection, perhaps within one officecomplex or to connections outside.

When network users are fairly close together, typically up to 5 km, thenetwork is called a Local Area Network (LAN). A wider network is calledWide Area Network (WAN). A third term is sometimes used to refer tocitywide systems: Metropolitan Area Network (MAN). There aredifferences among these three. For example, LANs are usually privatelyowned by a single organization. In some circumstances, a LAN in onearea might need to communicate with a LAN in another area; hence,WANs and MANs have developed.

Satellite Earth stations are often involved as part of a WAN because theycarry traffic among distant locations. Often, small Earth stations areinstalled at user locations in the IBS applications.

Network topology refers to a physical connection among the users, and islike a network map. There are a number of basic layouts, each having itsown merits. We shall discuss five of them.



Star Network:Figure 4.1 illustrates a Star network topology. Each user, or node, isconnected to a central point, and inter-user communication has to transitthrough the central point. As each user operates independent of others, afailure at one user would not cause a major network problem. The centralpoint is a critical area, and hence, it is normally provided with redundancy.A star may be expanded either directly from the center, or in ahierarchical manner from one or more nodes. The node selected wouldthen become the center point of another star.

Figure 4.1 Star Network



Figure 4.2 Ring Network

Figure 4.3 Bus Network



Figure 4.4 Tree Network

Figure 4.5 Trellis Network

Ring Network:Figure 4.2 illustrates a Ring network, and is characterized by user-to-user(node-to-node) connections forming a complete circle. Each user isconnected to two others. If one user fails, the whole ring may go out ofservice, and a second ring may be needed to restore service. Despite thisdisadvantage, ring topologies are popular in LANs, particularly for high-speed networks.



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Bus Network:Figure 4.3 illustrates a Bus network. It is made up of a common medium,to which each user is individually connected. One user temporarilycontrols the bus and hence the control is often distributed. An alternativemethod of control is to poll each user, who has a unique address, from acentral device. Advantages include the ease of adding new users andminimal cable runs. This type of network is in wide use for LANs, and iscommonly used to control test equipment. Hewlett Packard Interface BusHPIB, GPIB, and IEEE 488 are some examples.

Tree Network:Figure 4.4 illustrates a Tree network that is used on long distancenetworks, such as WANs or MANs. It operates in a hierarchical manner,and awards various users different levels of responsibility. Lower levelusers are connected to higher level users who combine traffic fromseveral sources. Typical applications include a public telephone network,or a synchronization hierarchy for PCM systems.

Trellis or Mesh Network:Figure 4.5 illustrates a Trellis network, and is important in high capacitysystems because it offers complete connectivity with built-in redundancy.It is an expensive network; consequently, it is mostly used in highcapacity switched networks, where network reliability is important.

Satellite communication systems use many of these network topologies.For example, the Engineering Service Circuit (ESC) system used byINTELSAT is a variation of the Bus network, where the satellite is themedium and each corresponding station has its own address. A satelliteTV system may be considered a version of a star network, where thesatellite is the center of the star, with one station transmitting to it andmany receiving from it. The INTELSAT FDMA communications systemsuse a Trellis or Mesh type of network.

To provide data communication among users, the terminal equipment atthe two ends has to be compatible to operate. This is relatively easy toorganize if the same supplier provides both the terminals, but it is notpractical always.

Consider, for example, the problem of connecting data equipment at anAustralian gold mine with data equipment operated by an internationalbank in Switzerland. Almost certainly, the equipment at either end wouldhave been manufactured by two different companies, the data protocolsand the codes used may be different. In order to operate successfully, allthese difficulties have to be overcome.



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Commercial considerations have slowed progress towards designing andadopting a truly international standard, yet the ITU-T and the InternationalOrganization for Standardization (ISO) have produced plans, which aregradually being adopted.

The ISO Open Systems Interconnection (OSI) is a plan designed to dealwith the problems related to interconnecting. The plan is largely a matterof common sense, but is defined in rather formal terms. Each interfacingproblem is dealt with separately in what is known as network layers.Seven discrete layers have been identified. Figure 4.6 illustrates thisconcept.

Physical layer provides electrical, mechanical, and functional connectionsbetween two local networks. It is concerned with the passing of raw databetween the terminal and the network.

Data link layer provides the synchronization and error control for theinformation that is transmitted over the physical link. The data link layer’stask is to take a raw transmission facility and transform it into a line thatappears free of transmission errors to the network layer. It accomplishesthis task by organizing the input data into data frames, transmitting theframes sequentially, and processing the acknowledgement frames thatthe receiver returns.

Network layer provides means to establish, maintain and terminate theswitched connections between end-systems. Included are addressingand routing functions. The network layer, sometimes called thecommunication subnet layer, controls the operation of the communicationnetwork.



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LAYERS

7. APPLICATION

6. PRESENTATION

5. SESSION

4. TRANSPORT

3. NETWORK

2. DATA LINK

1. PHYSICAL

7. APPLICATION

6. PRESENTATION

5. SESSION

4. TRANSPORT

3. NETWORK

2. DATA LINK

1. PHYSICAL

7. Provides user interface to lower levels

6. Provides data formatting and code conversion

5. Handles coordination between processes

4. Provides control of quality of service

3. Sets up and maintains connections

1. Passes bit stream to and from network

2. Provides reliable data transfer between terminal and network

LAYER FUNCTIONS LAYERS

PHYSICAL MEDIUM

Figure 4.6 ISO Open Systems Interconnection (OSI) Model

Transport layer provides end-to-end control and information interchangewith the level of reliability that is needed for the application. The servicesprovided to the upper layers are independent of underlying networkimplementation. The transport layer controls the quality of service. Thebasic function of the transport layer, also known as the host-host layer, isto accept data from the session layer, split it up into smaller units, if needbe, pass them to the network layer, and ensure that all the piecescorrectly arrive at the other end. All this must be done in the mostefficient way, and in a manner that isolates the session layer from the anychanges in the hardware technology.

Session layer is the point at which each separate call is set up, andterminated.

Presentation layer is the stage where data are put into a usable form.Code conversion, encryption, and text compression are examples of theprocess that could occur here.



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Application layer is where the end user interfaces directly with thenetwork.

Each layer in one organization works directly with the same layer in anyother organization, and provides whatever interfacing is required toconnect between the higher layers and the network.

INTELSAT provides a physical connection among the Earth stations, andas such provides the level 1 layer of the OSI model. This is true for IDRsand IBSs applications. In IBS applications, INTELSAT leaves it to users toarrange higher levels themselves, whereas in IDR services, INTELSATbecomes involved with number of layers. For example, layer 2, the datalink layer, may be a G.703 interface. Layer 3, the network layer, may be adigital switch, setting up the paths as required. Layer 4, the transportlayer, would involve error checking, and layer 5 will actually start andfinish a call. INTELSAT supports the OSI model, and encourages users toapply existing standards and protocols whenever possible.

Telecommunication services have been moving from analog towards todigital systems. INTELSAT has introduced several digital services, andone of the widely used ones is IDR.

IDR has the capability to handle both voice and non-voice information.The data rates used are termed intermediate, and range between 64 Kb/sand 44.736 Mb/s. INTELSAT has approved IDR operation with StandardA, B, C, E3, E2, F3 and F2 Earth stations in C-band as well as standardsE1 and F1 in Ku-band.

Use of Digital Circuit Multiplication Equipment (DCME) will increase thenumber of channels that can be carried within an allotted bandwidth. Thiswill be discussed in some detail in Section 4.5.

Operating IDR services has many advantages; some are specific to IDRwhile others result from the fact that IDR is directly compatible with mostdigital multiplex equipment. Some of the advantages are:

a. Improved equipment reliability and flexibility, and reducedequipment cost in terms of both purchase and maintenance.

b. Enhanced system flexibility - in addition to voice circuits, IDRcan support a range of data services.



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c. Transparency - The satellite link must not impede or alter theinformation transmitted across it. Transparency must be maintained fromISC-to-ISC . This will result in significant reduction in Earth stationmultiplex equipment, because IDR provides direct access to the first,second and third order digital hierarchies. The IDR system is compatiblewith both the European CEPT and non-CEPT hierarchies.

d. The potential capacity of the carriers can be increased by afactor of five or more by using of DCME.

Figure 4.7 shows a block diagram of an IDR link that includes an IDRmodem. As mentioned earlier, IDR data rates range from 64 Kb/s to44.736 Mb/s. This is the information rate and is the bit rate entering thechannel unit. Engineering Service Circuit/Channel (ESC) information isthen added to the carrier prior to applying FEC. It should be noted,however, that the ESC is not mandatory on carriers smaller than 1.5Mb/s. On carriers between 1.5 and 44.736 Mb/s, an overhead (OH) of 96Kb/s for the ESC is mandatory.

As FEC - a method to correct errors by adding bits - requires introductionof additional bits, the transmission rate of the data, before modulation, willbe greater than the information rate+ESC overhead. The data istransmitted to the satellite using QPSK modulation. Each carrier has anoccupied satellite bandwidth of approximately 0.6 times the transmissionrate. The relationship between different data rates and bandwidths isshown in Table 4.1.

INTELSAT V, VA, VA (IBS) and VI, IDR carriers employ FEC Rate 3/4convolutional encoding with Viterbi decoding. For INTELSAT VII, VIIA,VIII, 1X and K satellite series, it is mandatory for all Earth station modemsto be equipped to work with either Rate 1/2 or Rate 3/4. It should bepossible to independently select either the same or different FEC coderates for the IDR modulator and demodulator. INTELSAT determines theFEC code rate to be used for the purpose of maximizing transpondercapacity.



BASEBAND CHANNEL UNIT RF/IF

TERRESTRIALINTERFACE

MULTIPLEX

TERRESTRIALCLOCK

BUFFER DEMUX

- BER- AVAILABILITY

CHANNEL UNITDEMODULATORDECODERDESCRAMBLEROVERHEADREMOVAL

- G/T- DOWN LINK MARGIN

- CHANNELCAPACITY

- PROPAGATIONSTATISTICS

IF/RF SYSTEMLNA, DOWNCONVERTER

- BO 0

IF/RF SYSTEMUPCONVERTER,HPA

- E.I.R.P.- UP LINK MARGIN

- PROPAGATIONSTATISTICS

- BO 1

SATELLITE TRANSPONDERG/T, SATURATION FLUXDENSITY, E.I.R.P.

CHANNEL UNITOVERHEAD ADDITIONSCRAMBLER, FECCODER, MODULATOR

- MODULATION- OUTPUT SPECTRUM

(FILTERING)- FEC CODING- BER VS. Eb / No- SCRAMBLING- ORDERWIRES- ALARMS

- MUX FRAMINGSTRUCTURE

- MULTI-DESTINATIONALCAPABILITY

- BUFFER CAPACITY- SLIP RATE- CLOCK ACCURACY

Figure 4.7 An IDR Link

Table 4.1 Transmission Parameters for INTELSAT Recommended IDRCarriers with 3/4 Rate FEC

InformationRate(IR)

(Bit/s)

OverheadRate(OH)

(Kb/s)

Data RateBit/s

(IR + OH)

TransmissionRate(TR) (Bit/s)

OccupiedBandwidth

(Hz)

AllocatedBandwidth

(Hz)

64 k192 k384 k512 k

1.024 M1.544 M2.048 M6.312 M8.448 M32.064 M34.368 M44.736 M

000

34.168.396969696969696

64 k192 k384 k

546.1 k1.092 M1.640 M2.144 M6.408 M8.544 M32.160 M34.464 M44.832 M

85.3 k256.00 k512.00 k728.18 k1.456 M2.187 M2.859 M8.544 M

11.392 M42.880 M45.952 M59.776 M

51.2 k153.6 k307.2 k436.9 k873.8 k1.31 M1.72 M5.13 M6.84 M

25.73 M27.57 M35.87 M

67.5 k202.5 k382.5 k517.5 k

1057.5 k1552.5 k2002.5 k6007.5 k7987.5 k

30125.0 k32250.0 k41875.0 k

Notes:

1. The above table illustrates parameters for recommended carriersizes. However, any other information rate between 64 Kb/s and44.736 Mb/s may also be used.

2. For information rates of 10 Mb/s and below, carrier frequencyspacing will be odd integer multiples of 22.5 kHz. For higher rates,they will be any integer multiple of 125 kHz.



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FEC is a method to correct errors by adding extra bits in a special code. Itis required to achieve optimum use of satellite power and bandwidth togive the required Bit Error Rate (BER). FEC is discussed in Section 3.8.

Phase Shift has been chosen for IDR because of the necessity tomaintain a constant envelope on the transponder. Biphase, Two-Phase,shift-keying modulation (BPSK) is the simplest form of PSK where thephase shift changes with each new data bit. In this case, a binary sourcecode is mapped one bit at a time into a pair of phase states with 180degrees phase difference.

Quadrature Phase Shift Keying (QPSK) encodes each pair of bits intoone of four phases. One of the principal advantages of QPSK over BPSKis that QPSK achieves the same power efficiency as BPSK with only halfthe bandwidth. QPSK is of particular importance for satellite datatransmission and therefore for IBS and IDR. The name “four phase” or“quadriphase” refers to the fact that one carrier is modulated along a 0-degree, 180-degree phase vector (the in-phase or cosine channel),sometimes called the P channel or A channel. The other carrier ismodulated along a 90-degree, 270-degree phase vector (the quadratureor sine channel), sometimes called the Q channel or B channel.

A typical QPSK modulator is shown in Figure 4.8. The input data stream(1) is converted into two analog multilevel signals, (2) by alternatelyselecting each bit out of the D/A converter that also performs signalprocessing. These two signals are mapped and correctly shaped at (3) tomodulate carriers, which are arranged to have a quadrature phaserelationship. These two-biphase shift-keyed modulated carriers (4) aresummed to get a four-phase shift key modulated carrier (5). This processconverts the baseband digital input signal into a modulated IF outputsignal.



PHASE SHIFTER(RETARDS BY 90 )o

CARRIEROSCILLATOR

DATA A1001

CONVERTERAND SIGNALPROCESSOR

10010011

DATA B1010

LOW-PASSFILTER

LOW-PASSFILTER

MOD1

MOD2

’A’ PHASES

’B’ PHASES

1 0 1 0

0,0

1,0

1,1

0,1

1,1 0,1

1,00,0

1 0 0 1

π2

2 3 4

5

(e)

(a)(b)(c)(d)

OUTPUT

1

Figure 4.8 Quadrature Phase Shift Keying (QPSK) Modulator

The actual QPSK process is described below:

1. Input data 11001001 goes into the converter and signal processor.

2. Data are split into two streams of A data and B data, filtered at (3) andapplied to the A and B BPSK modulators. The output consists of twophases of either 1 or 0.

3. Modulator 1 is phase shifted by 90 degrees with respect toModulator 2.

4. The first pair of bits is “1” on the A data stream, and “0” on the B datasteam, giving two vectors at point (a), which combine by vectoral additionto give a 1,0.

5. The next pair is 0,1 at point (b).

6. The next pair is 00 at point (c).

7. The next pair is 11 at point (d). These four vectors are combined asshown at point (e), which is the vector diagram for the four-phase state.



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Figure 4.9 shows a digital demodulator for the receive carrier. Thereceived signal (1) is band-limited at band pass filter (BPF) and dividedinto two signals (2). These signals are low-pass filtered (3) and detectedby the local carrier recovery circuit, which provides two signals in aquadrature relationship (4). The signals detected after low-pass filteringare the demodulated signals, each having an amplitude corresponding tothe input signal vector position. The analog-to-digital converter changesthese signals back into the original data signals (5). Operation of thedemodulator requires the provision of a carrier recovery circuit to givereference timing as well as a symbol timing recovery circuit.

The data blocks are configured in the satellite transponder in a FrequencyDivision Multiple Access (FDMA) mode. Multiple operators radiatingcarriers at the same time, each carrier being separated in frequency,make multiple access possible. The system is thus the same type ofaccess method as the current analog multiple access systems with whichyou should be familiar.

1 2 3 4

5

DATAA

DATAB

A/D ANDSIGNAL

PROCESSINGSYMBOL TIMING

& RECOVERYCARRIER

RECOVERYPHASE

SPLITTERBAND-PASS

FILTER

LOW-PASSFILTER

LOW-PASSFILTER

90 o

0 o

Figure 4.9 Block Diagram of a QPSK Demodulator

The conversion of an existing Earth station from analog operation to IDRmust be carefully planned. An important consideration is the stringentfrequency stability requirement for digital carriers.

One problem is that the phase demodulator can detect other phasesignals as data, thus introducing errors in the receive data. A majorcause of this is due to the use of Analog-Up/Down Converters for IDR,that have poor phase noise performance.



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Phase noise can be divided into two categories.

• Discrete Signals, which are caused by vibration or power fluctuations,i.e., distinct components.

• Random Signals, which are caused by a modulating signal consistingof random frequencies shown as a continuous spectrum over a widerange of frequencies, i.e., oscillator drift.

Figure 4.10 shows an RF signal consisting of a carrier frequency and sidephase noise spectrum with discrete noise spikes displayed at evenlyspaced frequencies.

AMPLITUDE

CARRIER

PHASE NOISEDISCRETE

SIGNAL NOISE

FREQUENCY

Figure 4.10 RF and Phase Noise Side-band Spectrum

Although there are a number of methods, it is difficult to measure phasenoise in a working Earth station. However, with a high quality spectrumanalyzer capable of a resolution bandwidth of 10 Hz or less, and a videobandwidth of 1 Hz, a measurement can be made, provided a stablereference source is available.

Figure 4.11 shows a typical "in station" phase noise test setup. The setupincludes the transmit side as well as the receive side.

The up-converters/down-converters, HPAs and LNAs are similar for bothanalog and IDR working, except for the tighter specification for frequencystability on digital carriers.



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SYNTHESISEDSIGNAL

GENERATORUP-CONVERTER

PATH UNDER TEST

SPECTRUMANALYSER

HPA

25 dBW

RF. MON 0dBm

DOWNCONVERTER

-55 dBm -31.6 dBm

SPLITTER LNA

ATTN. SETTO 6.6dB

-61.6 dBm

30 dBFROM

RxFEEDPORT

-40 dBm

SIGNAL

ANALYSER

HPA

25 dBW

RF. MON 0dBm

-55 dBm -31.6 dBmTO 6.6dB

-61.6 dBm

FROMRx

FEEDPORT

40dB

TESTTRANSLATOR

Figure 4.11 Phase Noise Test Setup

Scrambling (energy dispersal) is a mandatory requirement to reduce themaximum power flux density in accordance with ITU-R Recommendation358-3, and to meet the off-axis e.i.r.p. density criteria in accordance withITU-R Recommendation 524-3. To accomplish this, a data scrambler isemployed at the transmit Earth Station. This scrambler is self-synchronizing and a single error in the received data stream can produce3 errors over an interval of 20 bits (error extension). For this reason, theFEC encoder must follow the scrambler at the transmit Earth Station. Atthe receive Earth Station, the descrambler must follow the decoder.Figure 4.12 shows a typical scrambler. The actual scrambler as used onIDR is shown in Figure 15 of IESS-308.

The action of the transmit scrambler illustrated in Figure 4.12 can bedescribed as follows, assuming a stream of 1’s at the input to gate 2:

1. As can be seen from the Logic Table, the initializationsequence shown on the figure - having a 1 and a 0 at its"Exclusive-Or" gate number 1 input -will give a 1 on the outputgoing to gate 2.

2. Gate 2, with a 1 at the input and a 1 as the enable signal atthe second input, will produce a 0 at its output.



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3. The shift register will step in and register 14/15 will become 00to gate number 1. This gives a 0 output to gate number 2 that,with a 1 in for input data, produces a 1 out.

4. The shift register clocks on, and the input to gate number 1 isnow 1,0, which will give 1 to the input of gate 2. If another 1 ison gate 2, the output will be a 0.

5. Gate number 1 with 0,1 at its input will give 1 to gate number2, and if the second input of gate 2 is a 1, then the output ofgate number 2 will be 0, and the action continues, dependenton the incoming data.

The same circuit is used for the descrambling sequence.

SYMBOL

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SHIFT REGISTER CLOCK

INITIALIZATIONSEQUENCE

0 0 1 0 0 1 0 0 1 0 0 1 0 0 1

0 0 1 0 0 1 0 0 1 0 0 1 0 0 1

SCRAMBLEDDATA OUT

INPUTDATA B A

A

B

C

C2

1

INITIALIZATIONSEQUENCE

SHIFT REGISTER CLOCK

SCRAMBLEDDATA IN

BA

C

2

B

A

C

1

A

BC

FUNCTION

EXCLUSIVE OR

LOGIC TABLE

A B C

0 0 00 1 11 0 11 1 0

OUTPUTDATA

Figure 4.12 Typical Scrambler/Descrambler

IDR carriers have been designed to provide a service in accordance withITU-R Recommendation 522-2, Recommendation 614, andRecommendation 579-1. INTELSAT will provide sufficient power from thesatellite to ensure certain minimum BER performance. Refer to Tables4.2, 4.3, and 4.4.



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Table 4.2 IDR Performance(G-821 Quality INTELSAT V, VA,VA (IBS) AND VI)

Weather condition Minimum BER Performance(% of year)

Clear sky a 10-7 for 95.9%Degraded a 10-6 for 99.36%Degraded a 10-3 for 99.96%

Table 4.3 IDR Performance(G-826 Quality INTELSAT VII, VIIA, VIII and K)


Clear sky a 2 x 10-8 for 95.9%Degraded a 2 x 10-7 for 99.36%Degraded a 7 x 10-5 for 99.96%

Table 4.4 IDR Performance (optional)(G-826 Plus Quality INTELSAT VII, VIIA, VIII and K)


Clear sky a 10-9 for 95.9%Degraded a 10-8 for 99.36%Degraded a 10-6 for 99.96%

Under clear sky conditions and light winds, the e.i.r.p. will be maintainedto within ± 0.5 dB for Standard A, B, C, and F3 stations, and ± 1.5 dB forStandard E2, E3, and F2 stations of the nominal value assigned byINTELSAT. The tolerance includes all factors causing variation, such asHPA output power instability, antenna transmitting gain instability,antenna beam pointing error, and tracking error.

In the event of severely adverse local weather conditions, the 6 GHzpower flux density at the satellite may be permitted to drop 2 dB below thenominal setting, recognizing, however, that this will result in a degradedchannel performance at receiving Earth stations.

For 14 GHz, the drop in power flux density at the satellite may bebetween 5 dB and 7 dB of the nominal setting between 0.01 and 0.04percent of the year, depending on the satellite and the beam being used.



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Should power control devices be used, it is recommended that when theup-path excess attenuation is greater than 1 dB, control of transmitterpower should be applied to maintain the power flux density at the satelliteto within ± 1 dB of nominal, to the extent that it is possible with the totalpower control range available.

The RF tolerance (maximum uncertainty of initial frequency adjustmentplus long term drift) on all Earth station transmitted carriers shall be ±0.025R Hz up to a maximum of ± 3.5 kHz, where R is the transmissionrate in bits per second. Long term is assumed to be at least 1 month.

The Earth station receive chain frequency stability should be consistentwith the frequency acquisition and tracking range of the demodulator, butas a minimum, it is recommended that it be no greater than ± 3.5kHz.

Any out-of-band emissions must be at least 26 dB below the carrier,measured in a 4 kHz band as shown in Figure 4.13.

1 MHz 500 kHz 0 +500 kHz 1 MHz

-5

-10

-15

-20

-25

-30

26 dB

Figure 4.13 2 Mb/s IDR Carrier Spectrum

The primary order 1.544 or 2.048 Mb/s digital signals in both directions oftransmission shall be derived in one of three ways:

a. From a clock with an accuracy of 1 part in 1011: This means thatthe clock may be derived from a national cesium beam reference or awidely available reference (such as Loran-C) which has the requiredaccuracy.



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b. From an incoming clock received from a remote Earth Stationby satellite: In this case, the remote Earth Station must derive timing bymethod (a) above.

c. In cases where there is no synchronous digital network at eitherend, but the channels are converted to analog voice circuits, the internalclock of the PCM multiplex equipment is of sufficient accuracy (about 5parts in 106).

As an emergency backup, a local clock with a long-term stability of atleast 1 part in 105 per month for cases (a) and (b) shall be available tokeep the circuit operating in case the primary clock source fails. Theemergency clock shall be tied to the primary clock unless there is a failureof the primary clock.

Buffers are required to perform two functions: Doppler shift andplesiochronous buffering. The location and size of the buffers depend onthe system configuration and the satellite used, and should be selectedon a case-by-case basis. (Buffering is discussed in Section 3.5). A blockdiagram of a plesiochronous and Doppler buffer is shown in Figure 4.14.

In most cases, receive side buffering will be performed at the primaryorder bit rate. This means that for higher order IDR carriers, buffering willbe performed after the demultiplex equipment. The reason for this is torely solely on reference clocks at the primary order data rate, becausehigher order clocks with 1 part in 1011 accuracy are not readily availablewith existing national digital networks. Although this approach isrecommended, it can be agreed bilaterally to also transmit higher orderstreams with a clock accuracy of 1 part in 1011 to allow buffering to beperformed at either the higher order data rate or the primary order rate.

Buffers should be reset whenever the channel suffers loss of service, andwhen they reach saturation or become empty. For primary order datastreams which form part of an international plesiochronous digitalnetwork, slips should consist of integer multiples of one completemultiframe, to avoid loss of synchronization of the multiplex equipment.



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DATA BUFFER DATA

WRITECOUNTER

READCOUNTER

CLOCKSYNCHRONOUS TO

SATELLITE NETWORK

CLOCKSYNCHRONOUS TO

TERRESTRIALNETWORK

Figure 4.14 Block Diagram of the Plesiochronous Doppler

In recent years, many IDR carriers have been implemented in theINTELSAT system. Users generally find that the IDR carriers are nomore complex to introduce than additional FDM/FM carriers. Wheredigital backhaul systems are available, or planned, the use of IDR carriersis now simpler than the introduction of transmultiplexers that are neededto connect such backhaul systems to analog carriers.

In most cases, it is possible to use existing up-converter and down-converter equipment used for FDM/FM carriers, provided they satisfy theIDR frequency stability and phase noise requirements. Some users havefound it possible to transmit several IDR carriers through a single Earthstation uplink, and maintain the necessary intermodulation performanceof the HPA. In cases where it is necessary to assign multiple carriers forone link between two Earth stations, INTELSAT tries to assign thesecarriers as close to each other as practicable.

The G.700 series of ITU-T Recommendations describes the multiplexingand framing structure of the digital information streams to be used on therecommended IDR carrier sizes of 1.544 Mb/s and above. For other IDRcarrier sizes, in the range of 1128 Kb/s to 2.048 Mb/s, the multiplexingand framing structures which have been defined for the IBS OpenNetwork (IESS-309), or other mutually agreeable structures could beused.

The advent of IDR carriers and other digital transmission systems for useon international routes has raised the issue of interworking betweencountries whose national networks are based on different digitalhierarchies and speech encoding laws.



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Recognizing this, the ITU-T initiated an accelerated procedure to approveRecommendations for interworking. The main factors to be considered ininterworking are the basic multiplex rate (2.048 Mb/s or 1.544 Mb/s), thespeech encoding characteristics (A-law or 1-law), and the selection of asuitable multiplexing hierarchy, which will be compatible with the networksinvolved. The ITU-T has revised the text of Recommendation 702 thataddresses these factors, and the principal points are summarized below.

a. For operation between networks using different primary levels(2.048 Mb/s and 1.544 Mb/s), the interworking hierarchy should be 2.048- 6.312 - 44.736 - 139.264 Mb/s. To accommodate this, the ITU-Tapproved a new Recommendation, G.747, which defines second-orderdigital multiplex equipment operating at 6312 Mb/s that multiplexes threetributaries of 2.048 Mb/s.

b. For PCM operation between networks using different speechencoding laws (A-law and µ-law), the international link will use A-lawencoding, and the µ-law conversion will be performed in the countryoperating the µ-law network.

c. For operation between networks using different primary levels(2.048 Mb/s and 1.544 Mb/s), the 1.5/2 Mb/s Multiplex SystemConversion function shall be implemented in the country operating the1.544 Mb/s network. The Multiplex System Conversion functionembodies the following properties.

• Termination of a digital link operating at a digital hierarchical level of1.544 Mb/s.

• Termination of a digital link operating at a digital hierarchical level of2.048 Mb/s.

• Rearrangement of 64 Kb/s channels between 1.544 Mb/s and 2.048Mb/s digital terminations.

The selection of the RF and IF characteristics for IDR is guided by theprinciple that the parameters and equipment would be similar to that usedin the SCPC and FDM/FM systems. This means that e.i.r.p. requirements,rain margins, and HPA size should be equivalent to or less stringent thanthe SCPC or FDM/FM requirements, wherever possible. One item, whichrequires particular attention, is the phase noise characteristic of the Earthstation up and down chains.

Replacing an FDM/FM link with an IDR Link

Figure 4.15 shows a block diagram of the new arrangement wherein theFDM/FM Channel unit is replaced by an IDR Channel unit.



Expansion of an IDR System:

Figure 4.16 shows a block diagram of an existing IDR system and theQPSK modem needed to expand the system.

Single Destination IDR Implementation

Figure 4.17 shows a block diagram of single destination IDRimplementation with primary level terrestrial interface. The new IDRequipment is situated between the national digital network and the Earthstation IF and RF equipment.

Single Destination Transmit, Multidestination Receive

Figure 4.18 shows a block diagram of equipment needed to implementsingle destination transmit, and multidestination receive carrier systems atan Earth station.

Multidestination 2.048 Mb/s IDR Carrier - 64 Kb/s

Figures 4.19, 4.20, and 4.21 show multidestination IDR 2.048 Mb/s carrierapplications with 64 Kb/s channels.

Multidestination IDR Higher Order Carriers

Figures 4.22, 4.23, and 4.24 show multidestination IDR higher ordercarriers.



HPA

UpConverter

FM/FDMChannel Unit

LNA

DownConverter

Diplexer

IDRChannel Unit

ESC

DEMUX

MUX

Clock

From RadioRelay Link

To RadioRelay Link

Figure 4.15 Replacement of FDM/FM Link with an IDR Link



Diplexer

ExpansionQPSKModem

LNA

DownConverter

IF Splitting Network

QPSKDemodulator

QPSKDemodulator

IF Combining Network

QPSKModulator

QPSKModulator

HPA

UpConverter

From MUX Equipment To MUX Equipment

Figure 4.16 Expansion of an IDR System



QPSKModulator

FEC Decoder,Descrambler

FEC Coder,Scrambler

OverheadAddition

OverheadRemoval

QPSKDemodulatorIDR

Channel Unit

2.048 Mbit/s

TerrestrialInterface

ESC

Buffer

MUX orCross-Connect

DEMUX orCross-Connect

10 -11 Clock

To/From National Digital Network

IF/RF Chains

Figure 4.17 Single Destination IDR Implementationwith Primary Level Terrestrial Interface



QPSKModulator

FEC Coder,Scrambler

OverheadAddition

PrimaryLevel Carrier(2.048 Mbit/s)

2.048 Mbit/s

Clock*Extractor

10 -11 Clock


IF/RF Chains

8.448 Mbit/s

BackwardAlarm

8.448 Mbit/s

FEC Decoder,Descrambler

OverheadRemoval

QPSKDemodulator

DEMUX

Buffer

2.048 Mbit/s

Satellite GroupDelay Equalizer

Figure 4.18 Single Destination Transmit, Multidestination Receive Carrier



G.732MUX

QPSK MOD

G.732DEMUX Buffer

QPSKDEMOD

15 Channels to "B"

15 Channels to "C"

Earth Station "A" (West)

2.048Mbit/s

10 -11

Clock

10 -11

Clock

2.048Mbit/s

NotUsed

NotUsed

15ChannelsFrom "C"

15ChannelsFrom "B"

10 -11

Clock

2.048Mbit/s

2.048Mbit/s

2.048Mbit/s

From"B"

2.048Mbit/s

From"C"

3064 kbit/sChannels

3064 kbit/sChannels

Backwardalarms

To"B" and "C"

QPSKDEMOD

BufferG.732DEMUX

Figure 4.19 Multidestination 2.048 Mb/s IDR Application:2048 Mb/s Carrier with 64 Kb/s Channels



Primary Level


Primary LevelFrom E/S B

Primary LevelFrom E/S C

QPSKModulator

QPSKDemodulator

QPSKDemodulator

Primary LevelTo B and C

OverheadAddition

OverheadRemoval

BackwardAlarms

DigitalCross-Connect

Buffer

Terrestrial Interface

ESCESC

10 -11 Clock

IF/RF Chains

Buffer

OverheadRemoval

DigitalCross-Connect

Figure 4.20 Multidestination 2.048 Mb/s IDR Carrier Implementationwith Individual 64 Kb/s Channels (Station A)



Earth Station "B" (West)

BufferG.732

DEMUX

2.048Mbit/sQPSK

DEMOD

BackwardAlarm

From "A"From

"A"(15-64 kbit/s Channels)

Not Used (To "C")

10 -11

Clock

2.048 Mbit/sQPSKMOD

To "A"To


Not Used(Or to Other E/S)10 -11

Clock

Earth Station "C" (East)

Buffer G.732DEMUX

2.048Mbit/sQPSK

DEMOD

BackwardAlarm

From "A"From"A"

(15-64 kbit/s Channels)

10 -11

ClockBackward

Alarm

G.732MUX

2.048 Mbit/sQPSKMOD To "A"

To


Not Used(Or to Other E/S)

10 -11

Clock

G.732

MUX

BackwardAlarm

Not Used (To "B")

Figure 4.21 Multidestination 2.048 Mb/sIDR Application with 64 Kb/s Channels




Higher Order CarrierFrom B

2.048 Mbit/s CarrierFrom C

Higher Order CarrierTo B and C


QPSKModulator

OverheadAddition

High Order MUX(e.g., G.742)

DEMUX orCross-Connect

MUX orCross-Connect

Higher Order MUX(e.g., G.742)

OverheadRemoval

QPSKDemodulator


QPSKDemodulator

OverheadRemoval

Buffer

IndependentBuffers FromE/S B

1 PrimaryLevel StreamFrom E/S B

Terrestrial Interface

ToE/S C

ToE/S B

10 -11

Clock

ESC ESC

IF/RF Chains

Figure 4.22 Multidestination IDR Implementation - Higher Order Carriers



BufferQPSK

DEMOD

G.732MUX

QPSKMOD

G.742DEMUX

QPSKDEMOD

To "B"

Earth Station "A" (West)

8.448Mbit/s

10 -11

Clock

8.448Mbit/s

Not Used

10 -11

Clock

2.048Mbit/s

8.448Mbit/s

8.448Mbit/s

From"B"

2.048Mbit/s

From"C"

4 - 2048 kbit/sStreams

4 - 2048 kbit/sStreams

To "B"To "B"To "C"

From "B"

ThreeIndep.

Buffers

BackwardAlarm

From "C"

BackwardAlarm

From "B"

From "B"

To"B" and "C"

Figure 4.23 Multidestination IDR Application - Higher Order Carriers



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Earth Station "B" (East)

G.742DEMUX

8.448Mbit/sQPSK

DEMOD

BackwardAlarm

8.448Mbit/s 3-2048 kbit/s

Streams

BackwardAlarm

G.742MUX

QPSKMODTo "A"

10 -11

Clock

Not Used(To "C")

From "A"

From "A"

From "A"

Three

Indep.

Buffers

8.448Mbit/s

8.448Mbit/s

To "A"To "A"To "A"

3-2048 kbit/sStreams

Earth Station "C" (East)

G.742DEMUX

8.448Mbit/sQPSK

DEMOD

BackwardAlarm

8.448Mbit/s Not used

(To "B")

To "A"

10 -11

Clock

1-2048 kbit/sStream

2.048Mbit/s

To "A"

From "A"

From"A"

Buffers

QPSKMOD

1-2048 kbit/sStream

Not Used

Figure 4.24 Multidestination IDR Application - Higher Order Carriers

To accommodate stations with operational IDR carriers, and those withadvanced plans for operating such carriers, two sets of specificationswere formulated. The first set deals with carriers that were authorizedprior to June 1988, which are defined as previous equipment. The seconddeals with all carriers/equipment authorized after June 1988, defined asnew equipment.

For all data rates, previous equipment may continue to be used in the IDRsystem without modification under the conditions listed below. If it doesnot meet these conditions, the equipment would need modification tomeet the requirements defined for new equipment.



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• Use of the equipment is restricted to single destination carriers.• There is a bilateral agreement on the use of the equipment.• The provision of ESCs by a method defined in the following

paragraphs continues to be available.

An Earth station operating IDR carriers in addition to other INTELSATservices such as TDMA, DAMA, FDM/FM, or SCPC, will have access tothe ESC network via the other carriers. This ESC access will be used forcommunication between the INTELSAT Operation Center (IOC) and theEarth station. Figure 4.25 shows a typical ESC system managementconfiguration.

Where an Earth station operates only IDR carriers, but one of thecorrespondents’ IDR Earth stations has access to the TDMA, DAMA,FDM/FM or SCPC ESC network, communication between IOC and theEarth station not having such access will be achieved via the Earth stationhaving such access. In the instances where none of the correspondingEarth stations have access to the TDMA, DAMA, FDM/FM, or SCPC ESCnetwork, and no alternatives are available, communication will beachieved via the public switched network.

TRAFFICE/S

SATELLITE

AOR

AOR

AOR

POR

IOR

NOTE: THIS SYSTEMCONFIGURATION ISSUBJECT TO FUTURECHANGE

ETAM

ROARING CREEK

ETAM

BREWSTERJAMESBURG

MADLEY

SYSTEMMANAGEMENT

NETWORKGATEWAY E/S

IOC

IOC DEDICATED4-W LINKS

= EARTH STATION

= SATELLITE

= SWITCHED ESC CONNECTION(SYSTEM MANAGEMENTNETWORK GATEWAY E/S)

Figure 4.25 INTELSAT System ManagementESC Networks for IDR Carriers



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When corresponding Earth stations have access to the TDMA, DAMA,FDM/FM, or SCPC ESC network, such facilities shall be used. At Earthstations equipped only for IDR carriers, it is necessary to provide twovoice channel units for engineering service circuits. These circuits mustbe available at the Earth station or at a designated control point capableof communicating with the Earth station on a 24-hour basis. The twovoice circuits may either be provided as 64Kb /s or 32 Kb/s channels.

ESC facilities are not considered necessary on carriers with data rates ofless than 1.544 Mb/s, because of their relatively small size. However, it isstill mandatory that communication links between INTELSAT and thecorresponding Earth station be established in accordance with thespecifications for Earth stations with previous equipment.

For data rates of 1.544 Mb/s and above, a 96 Kb/s, overhead-framingstructure has been formulated. The overhead structure has the capacityto carry two 32 Kb/s channels for digitized voice or voiceband data, one 8Kb/s data channel, and four separate alarms. Each of these two voicechannels carries the combined speech plus five telegraph (S + 5Dx)channels from the ESC equipment. The signaling conventions for thevoice and telegraph circuits are those used for current FDM/FM ESCsystems. The overhead unit on the transmit side takes the incoming dataand adds the overhead bits. No knowledge of the structure of theincoming data is required for this process. On the receive side, thereverse process occurs. The unit also detects faults within the systemand generates necessary alarm conditions.

Figure 4.26 shows a typical IDR ESC unit. The ESC unit accepts twoanalog voice channels from the ESC console, digitizes the outgoingsignal at 32 Kb/s using ITU-T Recommendation G.721 ADPCM. It framesthe digital voice circuits, 8 Kb/s of data, backward alarms, and traffic datainto a single bit stream at a rate of 96 Kb/s over the traffic data rate. Onthe receive side, the ESC unit deframes and separates these signals, anddelivers analog ESC voice to the ESC console. In addition, the receivepath includes an adjustable length buffer to accommodate plesiochronousand Doppler clock shifts.



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The frame structure is derived by adding 12 bits every 125 microsecondsresulting in a 96-Kb/s overhead rate. The allocation of bits within theoverhead is as follows.

- 4 bits per frame giving a total of 32 Kb/s, with 20 Kb/s forframe and multiframe alignment, 4 Kb/s for backward alarmsto up to four destinations, and 8 Kb/s for digital ESC data

- 4 bits each per frame for the two ESC voice channels for atotal of 64 Kb/s

An 8-frame multiframe is defined to increase the uniqueness of thealignment signal. Details of the overhead structure are shown in Figures4.27, 4.28, and 4.29.

Timing on the transmit side for the composite stream, information plusoverhead, is derived from the incoming data. To protect the ESC circuitsagainst failure of the incoming data, a backup clock with a long-termstability of 1 part in 105 must be available within the overhead unit. On thereceive side, the overhead unit derives its timing from a clock recoveredfrom the received data. Separate transmit and receive clocks at 32, 8,and 1 kHz are generated by the unit for use by the ESC equipment.

TRAFFIC +OVERHEAD

DEMODINTERFACE

RS-422

TRAFFIC

MODINTERFACE

RS-422

TRAFFIC

TRAFFIC +OVERHEAD

96 kbit/soverhead

96 kbit/soverhead

DATA

CLOCKTx ESC DATA

INTERFACE

ESCTRANSMIT

MUX

ESCBUFFERMEMORY

ESCRECEIVE

MUX

ESC DATAINTERFACE

DATA

CLOCKRx

READOUT CLOCK

ANALOGUEVOICE INPUTS

8 kbit/sBACKWARD

ALARMS

ESCVOICEINTER-FACE

ESC ADPCMPROCESSOR

FRAMING/DEFRAMINGAND ALARM

UNIT

Figure 4.26 ESC Block Diagram



FIRST BITTRANSMITTED

12 bitsOH

193 bits(1544 kbit/s)

or 256 bits(2048 kbit/s)

DATA

FRAME PERIOD125 Ts

BIT

1 2 3 4 5* 6 7 8 9* 10 11 12

V 2V 2V 2V 2V 2V 2V 2V 2

V 1V 1V 1V 1V 1V 1V 1V 1

FRAME AND MULTIFRAME ALIGNMENT,BACKWARD ALARM,ESC DATA (FA, A, d)

ESC VOICE CHANNELS

0

1

0

0

0

1

1

1

1

A 11

A 21

A 31

A 4

0

d 10

d 30

d 50

d 7

0

d 20

d 40

d 60

d 8

FRAME NO.

2

3

4

5

6

7

8

1

Vi = ESC VOICE CHANNEL i BITS (i = 1,2); (Set to 1 if not used)

Ai = BACKWARD ALARM TO DESTINATION i (i = 1,2,3,4); no alarm = 0; Alarm = 1

di = ESC DIGITAL DATA (i = 1 to 8); (Set to 1 if not used)

8 FRAMES = 1 MULTI-FRAME (PERIOD = 1 ms)

OVERHEAD (OH) RATE = 12 BITS/125 s = 96 kbit/s

** d1 corresponds to the first bit transmitted in the ESC data channel.

* Bits 5 and 9 in the Overhead Frame correspond to the first bits transmitted in

the ESC voice channels.

Figure 4.27 Overhead Structure for 1.544 and 2.48 Mb/s IDR Carriers



263 BITS DATA4 BITS OH(FA.A.d)

SUB-FRAME PERIOD125/3 = 41 2/3 s)

263 BITS DATA4 BITS OHV 1

263 BITS DATA4 BITS OHV 2

SUB-FRAME 1

SUB-FRAME 2

SUB-FRAME 3

- 3 SUB-FRAMES = 1 FRAME (PERIOD = 125 s)- ALLOCATION OF OH BITS IS SAME AS 1544 AND 2048 kbit/s CASE- 8 FRAMES = 1 MULTI-FRAME (PERIOD = 1 ms)- OH RATE = 12 BITS/125 s = 96 kbit/s

Figure 4.28 Overhead Structure for 6312 Kb/s IDR Carriers

352 BITS DATA4 BITS OH

(FA.A.d)

SUB-FRAME PERIOD125/3 = 41 2/3 s)


V 1


V 2

SUB-FRAME 1

SUB-FRAME 2

SUB-FRAME 3

- OH RATE = 12 BITS/125 s = 96 kbit/s

- 8 FRAMES = 1 MULTI-FRAME (PERIOD = 1 ms)

- ALLOCATION OF OH BITS IS SAME AS 1544 AND 2048 kbit/s

- 3 SUB-FRAMES = 1 FRAME (PERIOD = 125 s)

Figure 4.29 Overhead Structure for 8448 Kb/s IDR Carriers



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Frame and multiframe alignment should be carried out using thealignment signal that comprises of the 8-bit code inserted in the first bit ofevery frame, and the 3-bit code inserted in the second, third, and fourthbits of every other frame. Frame and multiframe alignments are assumedto have been lost when four consecutive alignment signals are receivedwith one or more errors. In this case, an appropriate alarm will begenerated, and a continuous alignment search will be initiated. Frameand multiframe alignments are assumed to have been recovered whenthe presence of a correct alignment signal is detected for the first time.

IDR alarm concepts follow the alarm protocols formulated for digitalmultiplex equipment (ITU-T Recommendation G.732/G.733). Figure 4.30shows the actions taken after detection of each specified fault condition.The detection of faults and generation of alarms are handled by theoverhead unit.

FAULT (F) DETECTED ACTION (A) TO BE TAKEN

LOCATION

IN STATION (S)

FROMTERRESTRIAL

LINK

FROMSATELLITE

FE1FE2FE3FE4

AS1AS1AS1AS2

AH1AH1

--

AD2AD2AD2

-

FA1 AS1 - AD1

FS1 *FS2 *

AS1AS1

-AH1

AD1AD2

CONDITIONIN

STATION

TOTERRESTRIAL

LINK **TO SATELLITE

* This function is to be performed only if practicable.

** Actions to be taken to the terrestrial link (i.e., AH1) are not mandatory.

Figure 4.30 Fault Conditions and Consequent Actions

Following is a description of the faults and alarms shown in the tableabove.



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Faults in the Earth StationFS1 Failure of the uplink equipment.FS2 Failure of the downlink equipment.

From the Terrestrial LinkFA1 Loss of incoming signal (data or clock).

From SatelliteFE1 Loss of incoming signal.FE2 Loss of overhead frame and multiframe alignment.FE3 BER of 1 in 103 exceeded (measured on the overhead alignmentsignal).FE4 Alarm indication received from the distant Earth station (in bit 2 ofeven frames in the overhead structure).

Alarms In the Earth StationAS1 Prompt maintenance alarm generated - Urgent attention requiredAS2 Deferred maintenance alarm generated - Nonurgent attention

To the Terrestrial LinkAH1 AIS applied to the outgoing information stream to indicate that afault has been detected, and to be used as a service alarm by theterrestrial link.

To the SatelliteAD1 AIS applied to the outgoing information bit stream to indicate thata fault has been detected, and to be used as a service alarm at thedistant end.

AD2 Alarm indication to the remote Earth station (i.e., backward alarm).It is transmitted as rate "1" in bit 2 of even frames. In the case ofmultidestinational carriers, it is transmitted only in the frames of themultiframe that has been assigned to that particular carrier.

Action When a fault alarm is detected, ensure that traffic is not lost bytaking the appropriate action to switch in standby equipment and isolatethe faulty equipment that needs to be repaired.

Most of the analog ESC equipment is over 10 years old and is no longersupported by the original equipment manufacturers. Accordingly,INTELSAT has developed a digital ESC network to replace the aginganalog EDSC equipment.

INTELSAT’s digital ESC network provides a gateway to a variety of onlineoperational and technical services. The digital ESC creates an Extranet,which is an extension of INTELSAT Intranet to customers via WAN.



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Customers can search and view a variety of INTELSAT documents anddatabases using a standard World Wide Web (WWW) browser on aworkstation PC.

In addition to the Extranet applications, customers can simultaneouslyoperate voice over the 64 Kb/s ESC channel. Many features, such asstation-to-station direct dialing to all Ocean Regions and direct dial toINTELSAT internal extensions are available. The addition of FrameRelay Access Device (FRAD) at the ESC Gateways has made facsimileover ESC possible to stations with FRADs that support the facsimilefeature.

A separate handbook on Digital ESC has been prepared by INTELSATand readers can refer to this document for details on implementation andother information.

Detailed information of TDMA and Space Switched (SS-TDMA) theory isavailable in the INTELSAT training publication entitled Time DivisionMultiple Access: INTELSAT’s Cost Efficient Community Service- TDMA.

The IBS, first introduced in 1983, provides a full range of international anddomestic digital private network business communications. It can beused by a variety of large and small Earth stations using teleports, orcustomer premise Earth stations. Services can be simplex or duplex, andinclude single channel or multiplexed data, voice, and digital videoapplications. IBS may NOT be interconnected with the Public SwitchedTelephone Network (PSTN).

The applications of IBS are many, varied, and continuously expanding.They include:

Data Communications Applications:

Dedicated private line networksINTERNETInterconnecting computersInterconnecting local, wide, and metropolitan area networksElectronic Data Interchange (EDI)Electronic Mail (email)



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Public switched data applications (56 and 64 Kb/s)ISDN applicationsDocument, news, and financial data distributionDatabase updatingFacsimile

Voice Communications Applications:

Digital voiceInterconnecting corporate PABX’s and private networksDedicated private line networksHigh quality audio or radio program distribution

Video Communications Applications:

VideoconferencingDigital TV

Service Summary

- Provides digital services for businesses- Carriers are sized by information data rate, overhead, and FEC rates.- Individual carriers or full and fractional transponder leases may be used.- Leased on an individual, unidirectional basis- Normally provided in either carrier or transponder pairs for full duplexservice.

Modulation

QPSK/FDMA, TDM/QPSK/FDMA, or QPSK/TDMA/FDMA

Different sized carriers are defined for tariff and allocation purposes,desired grade of service, and for the Earth station size. Carrier sizes aredefined in increments of 64 Kb/s. An allowance is made of 10 percent foroverhead, and either FEC Rate 1/2 or 3/4 may be specified. "OpenNetwork" operation is defined in IESS-309. "Closed Network" allowsusers greater freedom than open network options for choosingmodem/framing unit equipment, and to design links with different gradesof service or data rates. Any Circuit Multiplication Equipment (CME) maybe used.

"Basic IBS" for C-band uplinks meets the error performance objectives ofITU-R Recommendation 614 for ISDN connections. For Ku-band uplinks,this meets an availability objective of 99 percent.



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"Super IBS" is an alternative which provides availability at Ku-bandequivalent to that at C-band by also meeting the ITU-R Recommendation614 for ISDN connections.

Service quality within leases is determined by the transmission plan.

Basic C-to-C, Ku-to-KuEnhanced C-to-Ku, Ku-to-C

A wide variety of Earth stations is possible, and the small Standards E1and F1 can be type-accepted. IBS Earth station characteristics aresummarized below.

Frequency E/S G/T Antenna DiameterBand Standard (dB/°k) (Meters)________________________________________________________

C A 35.0 15.0 - 17.0B 31.7 11.0 - 13.0F3 29.0 9.0 - 10.0F2 27.0 7.5 - 8.0F1 22.7 4.5 - 5.5

Ku C 37.0 11.0 - 13.0E3 34.0 8.0 - 10.0E2 29.0 5.5 - 6.5E1 25.0 3.5 - 4.5

Note: All Earth station standard performance characteristics are providedin the INTELSAT Earth Station Standards (IESS).

INTELNET was first introduced in 1984 to provide business datanetworks, and is now the most flexible of INTELSAT’s business services.Each customer can define their network characteristics and implementthem within capacity allotments for 100 kHz to 72 MHz in 100 kHzincrements. The customer can choose between ground and spacesegment costs trade-offs for either international or domestic voice anddata networks. There are no restrictions on antenna size which makesthe service ideal for VSAT and customer premise applications.



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Data Communications Applications:

• News distribution and wire services• INTERNET• Photo and Image transmission• Point of sale transactions, inventory control• Credit/Debit card transactions• Reservation systems for airlines, hotels and car rental• Corporate data networks• Financial data networks, automated tellers, stock markets• Electronic trading networks• Oil industry networks• Weather and environmental service networks

Voice Communications Applications:

• Voice/audio networks• Audio and radio program channels

Video Communications:

Videoconferencing

Modulation

Any modulation technique and satellite access may be used.

Customers, who can design their own transmission plans, decide these.INTELSAT assesses the plan to ensure that other customers are notadversely affected. Parameters must meet those defined in IESS-410(INTELSAT Leased Transponder Definitions and Associated OperatingConditions.) CME may be used. The user determines service quality.Any available satellite beam can provide coverage. Service can beprovided in the cross-strapped mode if the capacity has already beenconfigured for cross-strap operation.

Earth stations must comply with the Standard G specifications forinternational applications and Standard Z specifications for domesticapplications, or they must be approved by INTELSAT as nonstandardEarth stations.

Standard G IESS-601Standard Z IESS-602Leases IESS-410

Type acceptance for INTELNET terminals is possible, as described inSSOG-200.



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The first milestone in speech processing was achieved in the late 60’sthrough ITU-T Recommendation G.711 for PCM coding of telephonesignals. PCM of 64 Kb/s has a high degree of robustness to transmissionerrors and offers adequate performance to speech and voice band data.

In the early 80’s, developments in digital signal processing techniquesactivated discussions on new speech processing techniques to improvethe transmission system’s efficiency and reduce the circuit transmissioncosts. As a result, the circuit multiplication idea was fashioned.

Circuit multiplication can be performed using one of the following twoapproaches:

a) Digital Circuit Multiplication Equipment (ITU-T Recommendation G.763modified and ITU-T Recommendation G.766), when equipped with the

facsimile demodulation/remodulation option.

b) Packet Circuit Multiplication Equipment, which uses the packet switchphilosophy (ITU-T Recommendations G.764 and G.765).

Users can take advantage of circuit multiplication because the savings inrecurring transmission media costs offset the investment in circuitmultiplication equipment. However, the choice of circuit multiplicationapproach that suits a specific user (DCME or PCME) depends not only onthe technology, but also on the applications the user offers its customers,the network configuration, and the long-term network planning. As a wayto encourage DCME use, INTELSAT offers the DCME Link Dimensioning(DLD) program on request.

Both circuit multiplication approaches use DSI and ADPCM. (ADPCMhas been discussed in Section 2.3.) A brief explanation of DSI follows.

Digital Speech Interpolation is used to concentrate a number of channels(trunks) onto a smaller number of output channels (bearers). The originalnumber of trunk channels is then recovered at the distant end, using thereverse process.

DSI operates on the basis that connection of a trunk channel to a bearerchannel is assigned only when the speech is active. Idle time is inherentto the human conversational behavior. Because one direction oftransmission is active only for 30 - 40 percent of the time in averageconversations, 60 to 70 percent of the transmission time is wasted whenno DSI is used.



During a normal telephone conversation the two partners will not talk atthe same time--one talks and the other listens. Moreover, the onespeaking will not only produce words and silence between words, he willtake time breathing or thinking after an inquiry while the other party simplylistens. DSI takes advantages of this phenomenon by disconnecting thecircuit during the silence periods and assigning the bearer channel toanother trunk with an active speech burst. (See Figure 4.31.) As a result,DSI combines speech bursts from several trunk channels into a lowernumber of bearer channels. If the number of trunks is large, the statisticsof the speech and silence distributions will permit a significantly smallernumber of bearer channels to be used.

D

S

I

D

S

I

TRANSMIT SIDE

RECEIVE SIDE

BEARER SIDE

1

2

3

TRUNK INPUT

Speech bursts

1

2

3

TRUNK OUTPUTBEARER SIDE

2.2

1.1

2.1

3.1

1.2

3.23.3

2.2

1.1

2.1

3.1

1.2

3.23.3

2.2 1.12.13.11.2 3.23.3

2.2 1.12.13.11.2 3.23.3

Assignment and control information

Front clippingdue to freezeout

Assignment and control information

Figure 4.31 Digital Speech Interpolation

Figure 4.31 shows three trunk channels, each with a voice activity factorof 33 percent. These three channels can, in theory, be accommodatedinto one bearer. For the system to work, an additional channel containingthe assignment and control information must be created to inform thereceiver what circuit the speech burst belongs to. The assignment andcontrol information is actually transmitted in a separate bearer channelnot shown here. DSI, however, has one disadvantage that affects systemperformance: that is ’freezeout’.



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What will happen if a trunk channel becomes active and there is nobearer capacity? In Figure 4.31, the first speech burst in trunk 3appeared when trunk 2 was using the bearer. This condition will producea clipping in the front of the first speech burst of trunk 3. In the worstcase, if more speech bursts are generated and no more bearer capacityis available, the entire speech burst will be dropped.

Freezeout is expressed as ’Freezeout Fraction’, i.e., as a ratio of the totaltime that the individual channel experiences the freezeout condition, tothe total time of the active interval. The ITU-T recommends that thefreezeout fraction must not exceed 2 percent.

Figure 4.32 shows that the DSI function is based on a speech leveldetection. Once the threshold is reached, a bearer assignment process isinitiated. A hangover time is provided at the end of every speech burst tokeep the detector ’ON’ after speech energy has ceased to improve thefreezeout fraction.

POWER

HI !! IS MARIO HOME ?

TIME

NOISE THRESHOLD

START OFSPEECH BURST

END OFSPEECHBURST

HANGOVER TIME

TURN ON DELAY FOR BEARER ASSIGNMENT

END OFSPEECHBURST

HANGOVER TIME

Figure 4.32 Speech Burst Level Detection

DCME is defined in the ITU-T Recommendation G.763 to provide circuitmultiplication by means of DSI and ADPCM (G.726). It operates eitherover an E1 or a T1 frame structure. The DCME frame structure describedin this module is based on an E1 frame structure (CEPT 2.048 Mb/s) andis as follows.



Bearer Frame

The DCME bearer frame output maintains the CEPT frame duration(125µs) and the Frame Alignment Word structure (known as TS0) asshown in Figure 4.33a. The following 31 (8 bits) time intervals are dividedinto 4-bit nibble units to be used as Bearer Channels.

A bearer frame is composed of:

* One Frame Alignment Word (8 bits)* One Control Channel (4 bits)* 61 Nibbles to carry the bearer channels (4 bits each)

DCME Frame

A DCME frame is composed of 16 bearer frames (16 * 125 µs = 2 ms) asdepicted in Figure 4.33b. This frame is required to deliver one controlchannel message.

DCME Multiframe

A multiframe DCME structure is composed of 64 DCME frames (128 ms)and conveys additional DCME-to-DCME information. (See Figure 4.33c.)



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CEPT FRAME or BEARER FRAME = 125 µ Sec

TS 08 Bits

CCBC#1

BC#6

BC#5

BC#4

BC#3

BC#2

BC#61

BC#60

BC#59

BC#58

.. .... .... .. .... .... .. .... ....

CEPTFAW

DCME control channel

TRAFFIC

DCME FRAME = 2 m Sec

BEARERFRAME #15

BEARERFRAME #1

BEARERFRAME #0

TS 0

CC

TS 0

CC

TS 0

CC

TS 0

CCTRAFFIC TRAFFIC TRAFFIC TRAFFIC.. .... .. .... ....

DCMEFRAME #0

DCMEFRAME #1

DCMEFRAME #2

DCMEFRAME #63

.. .... .. .... ....

DCME MULTIFRAME = 128 m Sec

a)

b)

c)

Figure 4.33 DCME Frame and Multiframe Structures

CC conveys the following information. (See Figure 4.34.)

* Trunk to bearer assignment* Channel idle noise level* Dynamic load control information* Self diagnostic information* Signal classification

A full CC message is transmitted in one DCME frame (every 2 ms) and isformed of 64 bits. Each bearer frame transmits part of a CC in the firstnibble of the bearer frame. The first bit of the nibble is reserved to transmitthe multiframe synchronization unique word.

The remaining 48 bits contain an encoded CC message and aretransmitted at a rate of 3 bits in each 125µs bearer frame. A completeCC message is received in 2 ms.



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DCME FRAME = 2 m Sec(One control channel message delivered)

BEARER FRAME #0

TS 0 TRAFFIC .. .... .. ..

1stnibbleof CC

TS 0 TRAFFIC

2ndnibbleof CC

BEARER FRAME #1 BEARER FRAME #15

TS 0 TRAFFIC

16thnibbleof CC

Sync bit

3 bits ofencoded CC

1110101100100001 Unique word pattern DCME frame 1 to 63

0001010011011110 Unique word pattern DCME frame 0

48 CC bitsdelivered

Figure 4.34 DCME Frame Structure

As the CC information is critical for the DCME, the CC is protected usinga 1/2 Golay code with a transmission scheme as shown in Figure 4.35.The actual CC information (without FEC) is 24 bits.

A bearer channel (BC) word is used to identify a new BC assignment(Figure 4.35). The most significant bit is used to indicate the BC type. Fordata, it will be 1. For all the other types (bit bank, fax bank, transparent,voice), the most significant bit will be 0. The seven LSB in binary codewill identify the BC, 1 to 61 for normal traffic, and 64 to 124 for overloadchannels.

The intermediate trunk (IT) word is used to identify the input ITinterconnected to the BC and related information, for example:

Binary code Use

1 to 216 Identification of input IT available for traffic232 to 235 DCME-to-DCME order wires (up to four

correspondents)250 If the associated BC is used as bit bank. 251 If the associated BC is used as fax bank.

The data word is divided into synchronous data word and asynchronousdata word. Refer to Figure 4.35.



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The synchronous data word conveys information relative to the BCassignment and IT identification synchronously. It has the informationrelative to:

• Background noise level information in the local IT to be transmitted tothe distant DCME

• Whether the BC is the first 4-bit nibble of a 64 Kb/s clear channel

• Channel checks

1 2 3 11 12 1314 22 23 24 1 2 3 11 12 13 14 22 23 24

Data wordSync AsyncIT wordBC word

MSB LSBBits Bits

1 4MSB LSB 1 4

Info bits Info bits Check bitsCheck bits

48 bits

Normal assigment message

Dummy bitDummy bit

Figure 4.35 CC Message Structure

The four Least Significant Bits (LSBs) of the data word will convey thefollowing types of DCME-to-DCME information not related to the BC andIT assignments:

* Circuit supervision and alarm indication

* Bearer related backward alarm indication to the remote DCME

* Dynamic Load Control (DLC) messages

An asynchronous data word multiframe is formed when 64 DCME frames(128 ms) are transmitted. A control channel message example is shownin Figure 4.36. The CC, once decoded, could have the followinginformation.



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BC word:First bit 0 The channel is carrying voice.Other bits 0011010 IT assigned to BC # 26.

IT word 01010110 The traffic comes from IT # 86.Sync data word 0100 Background noise -55 dBmOp.Async data word 0111 Async data word information

Data wordSync Async

IT wordBC word

MSB LSBBits Bits

1 4MSB LSB 1 4

00011010 01010110 0100 0111

Figure 4.36 CC Message Example

Before an IT channel is connected to a BC, it is first classified accordingto the activity and type characteristics. The classification task isperformed in the activity detector and data/speech discrimination module,and follows a three-level tree as shown in Figure 4.37. If the channel ispreassigned, the classification tree is skipped.

LEVEL 1: Intermediate Trunk active or inactiveLEVEL 2: Intermediate Trunk carries voice or non-voice signals.LEVEL 3: Transmission speed classification



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IT

SIGNAL NO SIGNAL

VOICENON-VOICE

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LEVEL 1:

LEVEL 2:

LEVEL 3:

2, 3, 4 bitsADPCM

VOICEBANDDATA

5 bitsADPCM

5 bitsADPCM

FAXDEMOD

Figure 4.37 Signal Classification Tree

Once the signal is classified, the IT-ADPCM encoder-BC connection isimplemented at the beginning of the DCME frame that occurs threeframes after the start of the DCME frame containing the related ControlChannel message (Figure 4.38).

Frame n Frame n + 1 Frame n + 2 Frame

Assignment messageImplementation

Figure 4.38 Implementation Delay

The speech burst from the active IT goes through the DSI process and onto the ADPCM encoder. The actual IT–to-BC connection is establishedaccording to the Control Channel information. If the IT becomes idle, theBC channel will be disconnected.

Every new speech burst will be assigned to a different BC. If BCchannels are available, the ADPCM encoder will code the voice signalwith 4 bits ADPCM. A list of the available BCs (from 1 to 61) containingvoice will be created and updated in the transmit and receive side everytime a new BC is assigned.



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If there are no available BC channels, and a new IT becomes active, anoverload channel will be required. The overload channel numbering inthe BC word ranges from 64 to 84 for 4/3 bit coding and from 64 to 124for 3/2 bit coding. The overload channels are created by ’robbing’ theLSB from the active voice channels (from 1 to 61), by using 3- or 2-bitADPCM encoding, and assigning the ’robbed’ bits to the overloadchannels. This is a pseudo-random process to evenly distribute the 3- or2-bit encoding in the total voice channels. Figure 4.39 shows how twooverload channels are created by ‘robbing’ bits from normal BCs. Therequired 4 bits for BC 64 are taken from BCs 4, 5, 9, and 10. The 3 bitsfor BC 65 are robbed from BCs 11, 12, and 13. In the following 2 ms, thebit robbing pattern will be different. Note that the overload channels canbe created containing 4, 3, or 2 bits depending on the loading condition.

When an IT channel burst is declared as data, it will require 5-bit ADPCMencoding independent of the data speed. The channel itself will bedeclared as a data channel and will not be subject to bit robbing.

Whenever a 40 Kb/s voice band data channel is required, a Bit Banknibble will be created. In Figure 4.39, a preassigned 40 Kb/s datachannel is transmitted. The four MSBs are transmitted in BC # 2, and thefifth bit (the LSB) in bit 1 of the Bit Bank (in BC # 1). If an extra 40 Kb/sare required, the LSB will also be taken from bit 2 of the Bit Bank. Theprocess is repeated and extra Bit Banks are created until all the 40 Kb/schannels have been handled. This process is the same as that used forfax calls when no Fax Demodulation/Remodulation is used. The impacton the DCME gain is evident.

Timeslot 0 CC

......... ...2 4 5 8 9 10 11 12 13 38 39 40 41 616042

BC numbering scheme

......... ...1 4 5 8 9 10 11 12 13 38 39 40 41 616042 6564 124...Normal BC range

Overload BC range

1

2

40 kbit/spre-assigned

40 kbit/s 64 kbit/spre-assigned

B D V TDV V V V V V V V V V V

B = Bit bank

D = Data

V = Voice

T = Transparent

Figure 4.39 Bearer Format



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The basic function of the facsimile module is to identify Group III fax calls,demodulate the fax signal, and transmit the demodulated information tothe remote facsimile module via the DCME where the voice band signal isreconstructed to its original format. If a call can not be demodulated, it isrouted through a 40 Kb/s ADPCM channel.

The fax module demodulates the image data of each fax call andaccumulates the information for 2 ms before transmission. Depending onthe fax data rate, the number of bits in 2 ms may be a non-integernumber. To compensate for this, and also to cope with timing differencesbetween the fax machine and the DCME fax frame clock, one stuffing bitand a control bit are used. The resulting bit structures of the faxdemodulation and storage of 2 ms are referred to as Fax Data Channel(FDC).

For example, in Figure 4.40, a fax call with a 9.6 Kb/s data rate istransmitted. The number of bits accumulated in a 2 ms interval is slightlyin excess of 19 (19.2 to be exact), so that sometimes 19 and sometimes20 data bits will be transmitted. The 20th bit of the FDC will, therefore, beeither a dummy bit or a data bit. The 21st bit of the FDC will indicatewhich of the two cases applies.

2019181...

Data bits 21

Control bit

Dummy bitor data bit

Information demodulated in 2 ms.

Figure 4.40 Fax Data Channel (FDC) Formed from a 9.6 Kb/s Fax Call

The number of bits in the FDC depends on the transmission rate of thefax signal and is calculated as follows:



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FDC length = I (R*2) + 2

where:R Fax rate in Kb/s (2.4, 4.8, 7.2, 9.6, 12, and 14.4 Kb/s)I( ) Integer part of the number

If the number of information bits accumulated in 2 ms is an integer, forexample as in 12 Kb/s fax data rates, the number of bits accumulatedwould be 24. In practice, will be 23 sometimes, and 25 at other times.Therefore, the 24th and 25th bits of the FDC will be dummy bits or databits, as indicated by the control bit (the 26th bit of the FDC).

The FCC, as shown in Figure 4.41, is provided for the transmission ofinformation related to frame description messages, fax call control codes,and auxiliary information. The FCC structure consists of a 9-bit IT fieldand a 12-bit message field. This 21-bit FCC is transmitted once perDCME frame (2 ms).

The IT field value identifies the IT from which the fax call wasdemodulated. The IT numbering ranges from 1 to 511. The numberingranges from 1 to 216 is the normal range used to designate the IT traffictrunks. The special range from 500 to 511, is reserved for functionswithin modules (0 and 217 to 499 are not used). The message field isused to convey information, such as whether FEC coding is applied to thedemodulated information, demodulated fax rate, input level, etc., toproperly demodulate the signal at the receive side.

IT field(9 bits)

Message field(12 bits)

Figure 4.41 Fax Control Channel Structure

The FDCs of various trunks are arranged in a continuous sequence nomatter what the FDC length is. This sequence, preceded by the FCC,constitutes an FMF. The length of the FMF should be such that the FCCplus the FDCs is an even number m of 32-bit blocks. This requirement isachieved by attaching a certain number of dummy bits to the FMF (calledframe filling in Figure 4.42).



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Figure 4.42 depicts an FMF. The FDCs are arranged in ascending ITnumber (1 to 216).

Once the FMF is formed, the bits are grouped in contiguous 32-bit blocks.The 21 bits of the FCC are entirely contained in block 1 because FEC(BCH coding) is always applied to the FCC. This action adds 10additional FEC check bits plus a dummy bit to the FCC, resulting in a 32-bit structure to conform block 1 (Figure 4.43).

FaxControlChannel

ITh ITi ITj ITk ITq. . . .

21 bits Frame filling

Fax Data Channels

Fax Module Frame length

AscendingIT no.

Figure 4.42 Fax Module Frame Structure

ITh ITi ITj ITk ITq. . . .

Block 1 Block 2 Block 3 Block m

Frame filling

. . . . . . . .

Dummy bit

FCC

Infobits

Check Bits

10Bits

21Bits

Demodulated data from different ITs

Figure 4.43 Creation of Fax Blocks

In every DCME frame, the facsimile data interface delivers m fax blocks tothe DCME. Special 32 Kb/s BC channels called FTC or Fax Bankstransport the fax blocks. The fax block bits are inserted at a rate of 2 bitsper PCM frame so that all the bits of a block are transmitted in 16 PCMframes (2 ms). Every FTC (or fax bank) conveys 2 fax blocks. Thus, thenumber of FTCs required to transmit the m fax blocks is m/2. The FTCnumber 1 is mapped in the bearer frame as the first nibble following thecontrol channel Figure 4.44).



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PCM FRAME or BEARER FRAME = 125 µ Sec

TS 08 Bits

CCBC#1

BC#6

BC#5

BC#4

BC#3

BC#2

BC#61

BC#60

BC#59

BC#58

.. .... .... .. .... .... .. .... ....

DCME control channel

TRAFFICFTC #1*

* FTC #1 = FCC + Fax block 2

Figure 4.44 FCC and FDC Over a Bearer Frame

The simplest way to use a DCME is in single destination or point-to-pointmode. This mode of operation, although preferable for its simplicity, maynot be practicable for all users. Two other options are available, namelyMulticlique and Multidestination.

The question of when to operate in multiclique mode, and when tooperate in multidestination mode depends on a number of factors,notably:

*the number of destinations and the traffic requirement on each route, and*the capacity of the backhaul system.

In general, the DCME should be located at the ISC. DCME can belocated at the Earth station only if the backhaul is analog.

As a general guide, multidestination mode is economical for a largenumber of small capacity routes via satellite. Single destination mode ismore suited to single, large, and medium capacity routes. Multicliquemode lies somewhere in between.

This is the simplest concept of DCME applied to large and medium trafficroutes between two destinations over satellite bearers. Typical trafficvalues of between 60 and 150 trunk channels (2 to 5 PCM frames) perDCME would be normal. An example of system configuration is shown inFigure 4.45A.



Trunk side Bearer side

1

23

4

1

23

4

Trunk side

1

23

4

DACC

1

2

34

1

2

3

4

BA

C

AB

12

3

4

A

12

3

4

12

3

4

C

B

12

3

4

12

3

4

D

C

C: MULTIDESTINATION & MIXED MODE

B: MULTICLIQUE

A: POINT-TO-POINT

Figure 4.45 DCME Operating Modes



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In multiclique mode, the DCME output is split into two traffic streams withthe DCME generating a "Control Channel" for each stream or "Pool".These two pools do not have to be the same size. Each interpolationpool will contain all channels for a particular destination. Thus, there is amaximum of two pools in any bearer frame. Each interpolation pool withinthe bearer frame structure will carry the assignment information in acontrol channel associated with the pool. The boundaries between thepools are variable and operator controlled. Each pool can beincremented in 8-bit bearer time slots.

An example system configuration of multiclique DCME with IDR carriersis shown in Figure 4.45B. It should be noted that the cross-connectequipment or time slot interchange equipment required to route the trafficis not part of the DCME. In this mode of operation, typical traffic values ofbetween 60 and 150 trunk channels per DCME shared between twodestinations are anticipated.

In multidestination mode, the DCME output can be "mapped" for up tofour destinations. One Control Channel controls the whole pool. Withmultidestination, the receive DCME will accept one Bearer Frame streamfrom each destination. In the multidestination mode of operation, typicaltraffic values of some 60 to 150 trunk channels per DCME will be sharedby up to four destinations. (See Figure 4.45C.)

It must be noted that Mixed Mode operation, i.e., Multidestination togetherwith Multiclique, is also possible. In this mode, the DCME will correspondwith up to four destinations by means of a maximum of two interpolationpools within the bearer frame. One of the interpolation pools may serveup to three destinations and the other will serve one destination. As in thecase of multiclique, the boundaries between the pools will be variable,under operator control, and in increments of 8-bit bearer time slots.

The DCME gain is defined as the input trunk channel to output bearerchannel. Theoretically, this gain is calculated as 2.5 for the DSI and 2 forADPCM (5 for the DCME).



However, as the system is influenced by the amount of Voice Band Datacalls, fax calls, clear channels, etc., the maximum available gain willdepend on the following factors:

a. Number of trunk channelsb. Number of bearer channelsc. Trunk channel occupancyd. Speech activitye. Voice-band data trafficf. Ratio of half to full duplex voice-band datag. Type of signalingh. 64 Kb/s clear channel data traffici. Minimum acceptable speech qualityj. Dynamic load control threshold

The factor that has the greatest significance in the DCME gain is thenumber of 64 Kb/s data channels required because each such channelabsorbs 2 x 32 Kb/s bearer channels. Figure 4.46 shows the DCMEtraffic handling capability. A lesser, but still significant factor is thepercentage of voice-band data that varies according to the route and timeof day. This can be checked using a Digital Channel OccupancyAnalyzer (DCOA) which often shows data variations with peaks that mayor may not always coincide with speech.

Another significant factor is the type of signaling employed on the route inquestion. Compelled signaling systems hold channels active forsignificant periods, hence not allowing any interpolation during thesignaling period. The speech activity depends on the characteristic of thelanguage. It is usual to assume a 35 to 40 percent speech activity.

Speech quality is determined by the encoding rate of the ADPCM process(average bit per sample), and the amount of speech lost while a newlyactive trunk channel is being connected to a bearer channel (freezeout).If a large number of channels are in competition, the beginning of aspeech burst is more likely to be clipped or frozen out. The usual criteriafor acceptable speech performance are an average encoding rate of 3.7bits per sample, and less than 2 percent probability of clipping exceeding50 ms (freeze-out fraction) or, alternatively, less than 0.5 percent ofspeech should be lost due to clipping. Approximations have been derivedwhich relate the number of trunk lines to the achievable DCME gain foruse in initial system dimensioning. These are shown in Figure 4.46.



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6.0

5.0

4.0

3.0

2.0

DC

ME

GA

IN

100 20 30 40 50 60 70 80 90 100

TRUNK LINES

110 120 10 130 140 150 160 170 180

40% Data

30% Data

20% Data

10% Data

0% Data

Figure 4.46 DCME Trunk Capacity versus Gain

The dynamic variation in the number of bearer channels available for theinterpolation process due to voice-band data and 64 kb/s data activityrequires action to be taken to safeguard speech quality. The followingsolutions are feasible.

a. The system can be dimensioned so that the maximumanticipated trunk activities fall well within the quality criteria (3.7 bits persample). In this situation, the DCME is used less efficiently, particularlyoutside the busy hour. However, efficiency can be improved if the systemis deployed in a multiclique or multidestination mode where routes carriedcan have widely differing busy hours. Thus, although trunk channels mayhave relatively low busy hour occupancy, the bearer channels wouldalways be well loaded.

b. The DCME can be programmed to correspond with itsassociated ISC and have the exchange assign a busy status to thechannel when the quality criteria are violated. This is more commonlyknown as DLC.

c. The signal-to-quantization performance can be offset againstreductions of quality by using variable rate ADPCM algorithms. It ispossible to quantize speech samples to 3 or 2 bits rather than 4 onindividual speech channels, either for the whole speech burst or on acyclic basis for a given number of samples.



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Due to better efficiency, “b” and “c” are the widely recommendedsolutions.

Before any DCME operating mode is established, the users must agreeon how the system will be mapped. Taking Figure 4.47 as a reference, aDCME map consists of the information given to the DCME to break downthe input trunk channels (TCs) into 64 Kb/s intermediate trunks (ITs).These will then be processed by the DSI and ADPCM, and transported asbearer channels (BCs).

Remember, the TCs are connected to the DCME from the ISC in PCMframes (each with 30 or 24 channels), and the DCME handles not TCsbut ITs. The mapping reduces the CC size and allows the flexibilityrequired for multiclique and multidestination operation. The map is astatic arrangement that has to be agreed to between the users, and it canbe different for the transmit and receive sides.

I

S

C M A P P I N G

TRUNK CHANNELS ( TC )In groups of 24 or 30 channels

BEARER CHANNELS (BC = 1 to 61 for normaland 64 to 124 for overload)

INTERMEDIATE TRUNK ( I T = 1 to 216)

D S I&

ADPCMPROCESSING

* Possible only if the ISC-to-DCME connection is over 1.544 Mbit/s links.

1

2

3

4

5

6

7

8

9*

10* DCME

TX

RX 1

RX 2**

RX 3**

RX 4**

** Used in Multidestination and Mixed modes

12...3031..6061......216

Figure 4.47 DCME TCs to IT Mapping

Therefore, mapping is a designation that relates each trunk channel to aninternal numbering designation (IT) within the DCME to convey the trunkchannel to bearer channel connectivity via the control channel. The ITnumbering goes from 1 to 216 and defines the maximum number of trunkchannels in the DCME trunk side. This connectivity is achieved only if theDLC is connected to the ISC.



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We can anticipate expanded use of new speech processing techniquessuch as LD-CELP, in which the voice is coded in 16 Kb/s withoutsacrificing voice quality. LD-CELP is an attractive alternative to furtherincrease the DCME gain from the actual 5 to 1, to 10 to 1. Thisalternative will be available with the advent of VLSI chips capable ofhandling several voice channels.

Another feature that could be included in future DCMEs, is thedemodulation/remodulation of FAX data in the range of 14.4 to 28.8 Kb/s(ITU Recommendation V.34).

Packet switching has been thought of as a data communicationtechnique. However, it was initially devised as a technique to avoid voicecommunication circuit wiretapping by breaking a voice conversation into’packets’ as depicted in Figure 4.48. A further enhancement of thetechnique was its capability to mix pieces of a call with pieces of othercalls at each switch.

It was only at the destination that all the pieces could be collected andreassembled in the original order so that the voice became intelligible.Obviously, every ’packet’ needs a certain type of addressing information(called header and trailer) such as destination, time stamp, and relatedinformation to reconstruct the original message.

Packet switching evolved rapidly in data communications because datauses digital information, which is relatively simple to break down into smallpackets. Moreover, the bursty nature of data information does not requirea permanent connection between the transmitter and receiver to deliverthe information. To discipline the data transmission in a network, a full setof protocols was developed. These are:

* User-to-user protocols* User-to-packet switch protocols* Packet switch-to-packet switch protocols.

These protocols apply to all data communications, to route the signal andto assemble the information at the destination.

Packet switching operates like the mail. The letter (i.e., information) isplaced in an envelope (user-to-user protocol), the envelope is stampedand addressed (user-to-packet switch protocol).



Once it is deposited in the mailbox, the post office routes the letteraccording to the address, and delivers it to a partner post office (packetswitch-to-packet switch protocol). En route to its destination, theenvelope could be handled by intermediate post offices (intermediatepacket switches). Here the addresses of all the arriving envelopes will bechecked, local letters retained, and in-transit letters forwarded to the nextpost office until they reach their destination, where the packet will bedelivered to the user.

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Figure 4.48 Historical Origin of Packet Switching

Let us take an example. In Figure 4.49, user A addresses information touser C. It transmits the data at a given rate to the switch X1 where thepackets are formed, stored, and forwarded in a noncontiguous form(datagrams) at a higher rate. The routing will depend on the networkstatus. Whenever a packet is delivered to the next node (either X2 or X3),an acknowledgement message will be sent back to the sender (X1),where the stored messages will be discarded.

In case of link degradation between X1 and X2, the acknowledgementinformation will require a retransmission of packet 1 from X1. At thereceiver (X4), the original information is assembled and delivered to userC. The following are important packet switching features.

• The network can become self-healing (Automatic routing ornetworking).

• If one packet is delivered with an error, or not delivered at all, aretransmission is demanded.

• If congestion arises, a packet is routed via alternate paths. If thecongestion is severe, an entire packet can be dropped andtransmitted later.



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If an interactive connection is established between two users, transmitand receive packets will not follow the same routing and will be treated asindependent entities. However, neither user will notice it.

1

3

X1

X3

X2

X4

X5

X6

A C

123

2

2

3

1

1Message

Acknowledgements

Error

Retransmission

Reassembly

123

Figure 4.49 Basic Operation of a Packet-Switched Network

In the mid-1980s, there was renewed interest in packetized voice. Thegoal was to integrate voice, voice band data, digital data, high-speeddata, video, signaling, and network control into packets of commonformat. The result was ITU-T Recommendation G.764 for ’packetizedvoice protocols’. With this approach, voice and data can be integratedthanks to the networking advantage derived from packet-switchednetworks.

In principle, this integration should lead to a more efficient use of theavailable transmission resources. Voice and data, however, are impacteddifferently by delay and errors. Voice, for example, requires low anduniform delay and is not expected to be retransmitted, whereas datatraffic is more sensitive to bit errors and can be retransmitted. A packet-switched network introduces fixed delay (signal processing), variabledelay (depending on the routing of the packet), and packet dropping toalleviate congestion. These effects are destructive on voice conversation.



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Therefore, the voice traffic packetization protocol specifies that:

• Time stamp information must be added in the network nodes forspeech reconstruction at the receiving end for packets arriving atirregular intervals (or, in some structures, out of order).

• The block dropping method must be used for congestion control inany point of the network, instead of packet dropping.

Collecting 128 speech samples over a 16 ms interval of an incoming fullrate channel forms a voice packet. The signal is then coded in G.727ADPCM and arranged as shown in Figure 4.50.

• The address octets are used to identify the data origin anddestination.

• An UIH control field is used when a management entity requestsunacknowledged information transfer. The two least significant bitsLSBs are reserved to perform cyclic redundancy checks over theaddress octets.

• Protocol discrimination has a fixed value. It identifies the packet as avoice packet.

• Block dropping indicators track the status of block dropping within thepackets.

• The time stamp is a record of the cumulative variable delaysexperienced by a packet in a network with a 1 ms resolution.

• Coding type indicates the method used to code the speech samplesat the originating point before packetization.

• * A sequence number is used by the end point in the build-outprocess to determine the first packet of a burst and whether apacket has been lost. The sequence number and time stamp allowfor the removal of variability in the network delay.

• Noise level indicates the background noise level at the transmit side.The receiving end uses the noise level information to determine thenoise level that may be played in the absence of voicepackets.

• Each information block has 16 octets.• The check sequence is an algorithm to check the integrity of the

transmitted information.



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Octet 1Octet 2

Octet 3Octet 4

Octet 5Octet 6Octet 7

Octet 8

16Octets

16Octets

16Octets

16Octets

Address (upper subfield)Address (lower subfield)

UIH control fieldProtocol discriminator

Block dropping indicator

Time stampCoding type

Optionally droppable block

Check sequence

Optionally droppable block

Check sequence

12345678

Sequence number Noise level

Non-droppable block

Non-droppable block

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AD

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INF

OR

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Figure 4.50 Packetized Voice Frame Format

Remember that G.727 ADPCM arranges the output information into corebits and enhancement bits. Now, as the packetized voice protocolcollects 128 ADPCM samples, the packet information is ordered in such away that all the first 128 core bits of the 128 ADPCM samples aregrouped together to compose the first nondroppable block. (See Figure4.51.) The second 128 core bits of the 128 ADPCM samples are alsogrouped (composing the second nondroppable block). The sameprocedure is performed on the third, fourth, and fifth 128 enhancementbits of the 128 ADPCM samples to build the first, second, and thirddroppable blocks. Figure 4.51 shows the bit blocks arrangement.



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Sample 1

Sample 2

Sample 3

Sample 127

Sample 128

Sample 126

16 msec

Core bits Enhancement

bits . . . . . . . . . . . . . .

. . . . . . . . . . . . . .

Pre-packetized bit format(ADPCM output)

Frameheader Trailer

1st most significant non-droppable bits

2nd most significant non-droppable bits

Second 128droppable bits

First 128droppable bits

Last 128droppable bits

5*

5*

5*

5*

Bit # 1 of the128 samples




Bit # 5 of the128 samples*

(* if required)

Packetized bit format

. . . . . . .. . . . . . .

1 128 1281 1 128 1281 1281 . . . . . . .. . . . . . .. . . . . . .. . . . . . .. . . . . . .

Figure 4.51 Voice Packet Bit Ordering

PCME uses the packetized voice protocol and ADPCM G.727 for voiceband handling. Before any processing, the signal is classified in threelevels as shown in Figure 4.52. If the signal is classified as voice, it ispacketized according to the voice protocol already described. Note thatdifferent ADPCM rates can be used for voice as a way to controlcongestion.

If a sudden congestion begins, it is relieved by the instantaneousbuffering required to form the packet (16 ms) and by dropping one or twoof the droppable blocks that contain the enhancement bits. Thisprocedure shortens the voice packet allowing more packets in the output.The header informs the receiver of the contents and length of a packet.The block dropping can be performed by any PCME in a network. Thebuffering and the block dropping feature eliminate the freeze-out.

An optional fax demodulation capability can be used to route incoming faxcalls. In that case, calls will be routed to a fax demodulation module.Every fax page will constitute a packet. The operation is as follows.



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The transmitting PCME determines whether it can demodulate the faxsignal. If it can, then it informs the receive end in a special packet tonegotiate the allocation of hardware resources. Once the resources havebeen allocated, the demodulated information of each fax page becomesan information packet. This characteristic allows the destinationremodulator to resynchronize with the demodulator on a packet-by-packetbasis, which permits an indefinite page length to be transmitted.

VOICECHANNEL

SIGNAL NO SIGNAL

VOICENON-VOICE

LEVEL 1:

LEVEL 2:

LEVEL 3:

2, 3, 4 bitsADPCM

5 bitsADPCM

3 bitsADPCM

LOW SPEED< 1.2 kbit/s

MEDIUM SPEED1.2 to 4.8kbit/s

HIGHSPEED7.2 to 9.6kbit/s

OTHER> 9.6 kbit/s

4 bitsADPCM

8 bits PCM or5 bits ADPCM

G-3 FAX

5 bitsADPCM

FAXDEMOD

Figure 4.52 PCME Signal Classification

The signal classification is performed in such way that the appropriateADPCM algorithm is selected to process the VBD with either 3, 4, 5, or 8bits, as dictated by the modem speed. Because low-speed modems areautomatically handled at lower bit rates, no bandwidth is wasted.

The PCME can interface digital data channels by using a Virtual Data LinkCapability (VDLC).

• A special Digital Circuit Emulation (DICE) protocol is used to transportspecial circuits in a bit transparent manner. The information is brokeninto packets and transported.

• If the signal is based on the X.25 protocol or any other link accessprotocol (already packetized from a packet switch network), theframes will be relayed to the output without modification.



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• The idle codes and flags will be removed from signals containing theHigh-Level Data Link Control (HDLC) procedure. This approach, plusthe burst nature of the signal, can give data compression ratios of40:1 in interactive data applications.

• The Virtual Data Link Capability (VDLC) allows the PCME to transportany digital data rate.

The PCME supports single destination and multidestination operations.The single destination operation is functionally equivalent to a singledestination DCME link.

A multidestination configuration is particularly easy for packet systemsbecause the address information is contained in each packet header.Because individual control channels are not needed for each destination,there is no limit to the number of destinations in a PCME. Furthermore, ifthe signal goes through tandem PCMEs, the packet itself is not decodedbut routed to the final destination. This feature enhances the speechquality because the ADPCM-PCM-ADPCM conversion is not performed.

INTELSAT introduced Demand Assigned Multiple Access (DAMA)service in 1996 in Atlantic Ocean Region first, and extended it to all thethree ocean regions in 1997. The INTELSAT DAMA service for 16 Kb/stelephony has been designated as “Thin Route-on-Demand” service.This section discusses the service features briefly. The reader can referto the INTELSAT handbook DAMA: Your Global Thin Route on DemandConnection for a detailed discussion on the subject.

Thin Route-on-Demand provides on-demand mesh connectivity betweenmultiple Earth stations, and is therefore a flexible and cost-effectivemultiple-access technology. Thin Route-on-Demand is beneficial for thin-route operators looking to replace analog FDM/FM and SCPC circuits.Because Thin Route-on-Demand can provide direct connectivity amonglarge communities of users, transit charges can be reduced oreliminated. Thin Route-on-Demand provides new users the opportunityof getting globally connected through the use of smaller Earth stations.INTELSAT maintains a record for every call made, and bills customersfor the answered call duration.



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The DAMA Network platform is a flexible concept that can offer a widevariety of services, such as:

• Thin Route-on-Demand telephony service among gateway Earthstations

• Thin Route-on-Demand telephony service to remote areas via VerySmall Aperture Terminal (VSAT) Earth stations

• On-demand 64 Kb/s or higher connections for data applications.

Thin Route-on-Demand can operate with a wide range of Earth stationsizes, with the transmission automatically optimized on a call-by-callbasis, and also supports many different telephony interfaces, andsignaling protocols. This powerful combination of transmission andswitching flexibility permits direct connections between switches, PBXs,or handsets, not permissible in a hierarchical telephone network.Customers can use the Earth station facilities to provide international aswell as domestic telecommunications services on a single networkplatform.

Service Location

The service is offered in all three-ocean regions at the main connectivityorbital locations - 335.5 degrees E, 60 degrees E, and 174 degrees E inGlobal Transponder 36, as shown in Figures 4.53 through 4.55. Thethree outer concentric rings in these figures indicate the 10-degree,5-degree, and 0-degree elevation angle locations for the global beam.



Figure 4.53 INTELSAT 605 at 335.5oE



Figure 4.54 INTELSAT 604 at 60oE



Figure 4.55 INTELSAT VIII at 174oE



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Standard Service: Telephony

DAMA service supports 16 Kb/s Single Channel Per Carrier (SCPC)providing:• 16 Kb/s telephony, using ITU-T G.728 LD-CELP speech coding• 14.4 Kb/s fax and voice-band data Enhanced Service: Data Dial up 64 Kb/s or 2 x 64 Kb/s service can be provided via a standard N-ISDN interface. This option requires the use of a special ISDN interfacecard, and uses a subset of ISDN D-channel signaling. Baseline Application - International PSTN The baseline application is international PSTN service between gatewayEarth stations connected to ISCs, using the ITU-T Signaling System No.5 telephony protocol, as shown in Figure 4.56.

DAMATerminal INTER-

NATIONAL SWITCH

PSN

DAMATerminal INTER-

NATIONAL SWITCH

PSN

DAMATerminal INTER-

NATIONAL SWITCH

PSN

DAMATerminal INTER-

NATIONAL SWITCH

PSN

Figure 4.56 Baseline Application - International PSTN

A wide range of Earth station sizes can carry the service. Although theservice provides direct “mesh” connections, certain Earth station–to-Earth station connections may not be allowed because of off-axisemission constraints. To help users plan their Earth station facilities anddesired correspondents, matrices that identify the allowableconnectivities are available in IESS-311 (INTELSAT DAMA CarrierPerformance Characteristics) for different satellite and coveragecharacteristics. Tables 4.5, 4.6 and 4.7 summarize typical Earth stationconnectivity matrices for INTELSAT VI through INTELSAT VIII globalbeam operation.



Table 4.5 Earth Station Connectivity Matrix for INTELSAT-VI Global Beam, Rate ¾

Allowed between And

Std-A Std-A,B,F3,F2,F1,H4

Std-B Std-A,B,F3,F2,F1

Std-F3 Std-A,B,F3,F2



Std- H4(3.7m) Std-A,B,F3

Std-H3(2.4m) Std-A,B

Table 4.6 Earth Station Connectivity Matrix for INTELSAT-VII Global Beam, Rate ¾

Allowed between And

Std-A Std-A,B,F3,F2,F1,H4, H3

Std-B Std-A,B,F3,F2,F1,H4

Std-F3 Std-A,B,F3,F2,F1


Std-F1 Std-A,B,F3


Std-H3(2.4m) Std-A

Table 4.7 Earth Station Connectivity Matrix

for INTELSAT-VIII Global Beam, Rate ¾

Allowed between And

Std-A Any e/s

Std-B Std-A,B,F3,F2,F1,H4,H3

Std-F3 Std-A,B,F3,F2,F1,H4

Std-F2 Std-A,B,F3,F2,F1


Std-H4(3.7m) Std-A,B,F3


Std-H2(1.8m) Std-A



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The H series correspond to smaller aperture C-band Earth stations withantennas that have nominal diameters between 1.8m and 3.7m. Thesehave been incorporated into the current INTELSAT Earth StationStandards (IESS-207). At the present time, due to operationalconstraints, INTELSAT disallows Standard H2 (1.8m) stations to operateon the global beam. Exceptions are permitted for cases with sufficient uplink patternadvantage and/or improved sidelobe performance. IESS-311(Rev.A)provides tables showing the required margins to be made up. It hasbeen determined in many cases that mesh operation is permissiblebetween Standard F1 Earth stations. For domestic/regional applications, users may designate their largeEarth stations to function as: a) star-nodes for small e/s to small e/s (double hop)

connectivities, and/or b) traffic gateways to access their national PSTN at any

switching hierarchical level of their choice. The networks operate on Transponder 36 (GA/GA) in the three OceanRegions with high gain settings to minimize the uplink powerrequirements from small Earth stations. The Network is managed by a Network Management Control Center(NMCC). The NMCC is located at a “Host Station”. Routine operationof the system will be conducted from the Headquarters ManagementFacility (HQMF) at the INTELSAT Operations Center (IOC). Two“partner” Host stations are being deployed for each Network in oppositeHemi beams for maximum expansion potential and for geographicredundancy of the global transponder service. Host station locationsare listed below:

AOR: Bercennay (France) and Clarksburg (USA) IOR: Aflenz (Austria) and Vikram (India) POR: Beijing (China) and California (USA)



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The system has the capability to provide call-by-call mesh connectionsbetween Earth stations equipped with Traffic Terminals. On-demandconnections are under the control of a centralized NMCC, installed at a"host" station, and under the supervision of the IOC. Twogeographically redundant NMCCs will ensure a high level of Networkavailability. Figure 4.57 shows the concept.

On-DemandNetwork

Redundant NetworkManagement and Control

Centers(INTELSAT Managed)

INTELSAT OperationsCenter, Washington DC

Figure 4.57 Network Concept

The NMCC performs two key functions. •Routing of each call to its intended destination.•Allocation of a satellite circuit from the available pool for the duration ofthe call. The whole process is rapid and automatic, facilitated by "control"channels over which call requests, call assignments, monitor, and controlinformation are exchanged between the NMCC and Traffic Terminals. Upon receipt of ITU-T Signaling System # 5 "seize" signal, a trafficchannel unit emulates a called exchange response of "proceed to send",and collects the register signaling address information. After validation,the channel unit forwards a satellite connection request and addressinformation to the central DAMA processor at the NMCC over theInbound Control Channel, using the Aloha protocol. When there is a freechannel unit at the called terminal, the NMCC assigns a pair of SCPCcarriers to be used by the calling and called terminals, specifying theirfrequency and power level. The latter is determined based on the TrafficTerminal Radio Frequency characteristics stored in the NMCC terminaldatabase. The assignment message to the called terminal also carries



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the call address information. The called terminal emulates a callingexchange, forwards a "seize" signal to the called exchange, and uponreceipt of "proceed to send", then sends the register signalinginformation to complete the connection. The call release procedure issimple. There is no fixed association between satellite channels andEarth station channels. INTELSAT retrieves call records from the NMCC,and the space segment usage charges are based on the answered callduration. Thin Route-on-Demand is like a transit switch. It allows connection ofdifferent types of telephone equipment and communicates directly with alarge number of users. Trunks need not be preassigned/prerouted fordifferent destinations; rather, the Network routes calls dynamically tointended destinations. Therefore, the trunk circuits connected to TrafficTerminals can be shared across a number of destination trunks. Use ofThin Route-on-Demand eliminates transit charges by establishing directlinks with correspondents. The terminal equipment is modular, and can support as few as onechannel, and as many as hundreds of channels. The terminal equipmentwhich needs to be procured by the user, is manufactured by HughesNetwork Systems (HNS), USA. INTELSAT makes it simple forcustomers to procure terminal equipment at predetermined prices,through an ”Ordering Agreement” negotiated by INTELSAT with HNS.For conversion of analog or SCPC traffic to Thin Route-on-Demandtraffic, Signatories may qualify for short-term financing for the purchaseand installation of Traffic Terminals and associated Earth stationequipment. Although the service has been initially conceived for international PSTNapplications, the attractive tariffs for small stations are expected tostimulate the demand for other applications. Customers will be able torapidly expand services with low-cost Earth stations that are easy toinstall, maintain, and redeploy. A number of domestic, regional, andinternational applications can be supported with the flexibility that theDAMA platform can offer. Signatories and users will immediately be ableto offer these service applications both domestically and internationally ina closed user group arrangement, without the expense of implementingtheir own network management facilities. The use of smaller Earth stations will permit rapid extension of PSTNservice to remote and less developed areas in a "star" topology, usingexisting gateway Earth stations as star nodes as well as entry points(hubs) into the PSTN. This scenario is particularly suited for ruraltelephony applications.



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There are almost 300 Standard A and B Earth stations operating on thesatellites at 335.5 degrees E, 60 degrees E, and 174 degrees E, whichcould be used as the gateways. Star topology for traffic is necessitatedby the global beam operation. However, future deployment of networkswith higher power and higher gain transponders would facilitate "mesh"operation between small Earth stations. In addition to thin route telephony, the DAMA platform is also capable ofproviding data communications, including the provisioning of a dial-up 64Kb/s clear channel service that uses a subset of ISDN signaling. Thisservice is capable of facilitating narrowband multimedia applications (atuser data rates of up to 128 Kb/s using two 64 Kb/s channels) via VSATterminals at hard-to-reach customer locations, and terminating the linkinto the terrestrial infrastructure via large gateway Earth stations. A number of Signatories have expressed interest in targeting the marketfor business/specialized networks using this capability. Readers may also consult the following documents: IESS-311 Performance Characteristics for Demand Assigned

Multiple Access (DAMA) Digital Carriers SSOG-311 INTELSAT DAMA Satellite System Operations Guide

(Parts 1 and 2) IESS-207 Standards A, B, D, F, and H: Antenna and Wideband RF

Performance Characteristics of C-Band Earth StationsAccessing the INTELSAT Space Segment

VSATs are a class of Earth stations suitable for use on customerpremises, usually operating in conjunction with a large-size hub Earthstation, and capable of supporting a wide range of two-way services.VSATs have evolved rapidly as a result of technical advances inmany areas including: packet transmission and switching, efficientmultiple-access protocols, powerful microprocessors, RF technology,antenna miniaturization, protocol standardization and implementation ofFEC codecs and modems, and higher power satellites. INTELSAThas published the INTELSAT VSAT Handbook, which is available toSignatories and customers upon request. INTELSAT has recently extended IBS to VSAT terminals, and this serviceis called VSAT IBS. VSAT IBS provides a preengineered solution toenable business communications services using small Earth stationantennas.



The high quality of VSAT IBS allows applications, such as: • Digital video-conference• Real-time banking transactions• Data and voice communications• Internet Service Providers (ISPs) to Internet backbone connectivity VSAT IBS extends IBS to VSAT terminals with small antennas, as smallas 1.8m in C- band, and 1.2m in Ku-band. Earlier, the smallest antennathat IBS could use was 4.5m in C-band, and 3.7m in Ku-band. Details ofVSAT IBS are available in the following documents: • Extension of INTELSAT Business Services to VSATs - Application

Note• INTELSAT Business Services (IBS) - IESS 309 (Rev. 6) Tables 4.8 and 4.9 summarize the VSAT antenna characteristics.

Table 4.8 VSAT Antenna Characteristics in C-band

Antenna Standard F1 H4 H3 H2Typical AntennaDiameter (m)

3.5-5.0 3.5-3.8 2.4 1.8

Typical G/T dB/K 22.7 22.1 18.3 15.1

Table 4.9 VSAT Antenna Characteristics in Ku-band

Antenna Standard E1 K3 K2 Typical AntennaDiameter (m)

2.4-3.5 1.8 1.2

Typical G/T dB/K 25 23.3 19.8

VSAT IBS allows communications between a gateway station and aVSAT. A gateway is an Earth station with an antenna size larger than F2in C-band and E2 for Ku-band. Gateways are typically the central site ofa STAR network. VSAT IBS networks operate in STAR topology tominimize the rated power and cost of the VSAT SSPA, and the satelliteresources. VSAT IBS is available in C- and Ku- bands on any INTELSATsatellites. Table 4.10 summarizes technical characteristics of VSAT IBS.



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Table 4.10 Technical Characteristics of VSAT IBS

Parameters VSAT IBSSatellites VI, VII, VIIA, VIIIBeams All beamsVSAT Earth stationstandards

E1, F1, H AND K (Larger gateway may be required at the

other end of the link.)Information rate 64 Kb/s to 8448 Kb/sForward Error Correction Rate 1/2 convolutional encoding/Viterbi decoding with Reed-

Solomon (219,201) outer codingModulation QPSK or BPSKQuality Threshold BER a 10-10 for more than 99.6% of the year

Clear sky BER ?10-10

TCM IDR is INTELSAT’s newest, high-quality digital carrier service. Thisis an improvement over the existing QPSK IDR service. INTELSAT offersTCM IDR carriers in C- and Ku- bands through INTELSAT satellites VII,VIIA, VIII, and IX satellites for operation with Standard A, B, C, E, and FEarth stations. TCM technique is more bandwidth efficient than QPSKIDR, and will support a greater number of channels in a given bandwidth.Hence, TDM IDR will promote more efficient usage of the orbitalspectrum. Current technology also allows TCM IDR channel unit designsto incorporate an option for switching between the TCM IDR and QPSKIDR modes of operation. This will provide backward compatibility withexisting QPSK IDR channel units for information rates less than 10 Mb/s. TCM IDR digital carriers in the INTELSAT system use coherent 8 PSKmodulation operating at information rates ranging from 64 Kb/s to 44.736Mb/s. The information rate is defined as the bit rate entering the channelunit, prior to the application of any overhead or FEC. For TCM IDR, theFEC comprises an inner rate 2/3 Pragmatic TCM encoder/TCM decoder,concatenated with a mandatory Reed-Solomon (219,201) outer code.Pragmatic TCM encoding is a patented technique that uses the standardk=7 convolutional code of rate 1/2 in conjunction with supplementarycircuitry to generate TCM encoded information. The TCM IDR service platform supports all voice and data applications,but is particularly well suited to applications that require low BER/highavailability performance, such as: • Internet backbone access• Internet Network Access Point (NAP)-to-NAP()• Multicasting• Multimedia• International Public Switched Network• High data rate trunking




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Though any information rate from 64 Kb/s to 44.736 Mb/s can be used,INTELSAT has defined a set of recommended information rates. Table4.11 shows INTELSAT-recommended TCM IDR information rates andassociated overheads for Rate 2/3 TCM 8 PSK with mandatory Reed-Solomon coding (219, 201) outer coding.

Table 4.11 INTELSAT-Recommended TCM IDRInformation Rates and Overheads

Num ber of 64 Kb/sbearer channels

Inform ation rate(n x 64 Kb/s)

T ype o f Overhead

Nooverhead

with 96 Kb/s IDRoverhead

with 6.7% IBSoverhead

8 512 x x16 1024 x x24 1544 x30 2048 x90 6312 x

120 8448 x480 32064 x480 34368 x630 44736 x

Note: “x” indicates the recommended rate corresponding to the type ofoverhead. Performance of TCM IDR carriers will meet the requirements of Note 2 ofRecommendation 3 of ITU R S.1062. Table 4.12 shows TCM IDRperformance figures.

Table 4.12 TCM IDR Performance

Weather Condition Minimum BER Performance (% of year)

Typical BERPerformance % of year

Clear Sky a10-9 for c 95.9% a10-10 for c 95.9% Degraded a10-8 for c 99.36% a10-10 for c 99.36% Degraded a10-6 for c 99.96% a10-10 for c 99.36% Degraded Not Specified in ITU a10-5 for c 99.98%

The channel unit consists of the following: • Modulator/Demodulator (modem)• Pragmatic TCM encoder/TCM decoder• Scrambler/descrambelr• Overhead framing unit• Reed-Solomon encoder/decoder• Interleaver/deinterleaver• Switchability to QPSK/IDR mode of operation (optional)



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Fig 4.58 illustrates TCM IDR channel unit.

The channel unit uses coherent 8 PSK modulation together with rate 2/3pragmatic TCM encoding/decoding and Reed-Solomon (219,201) outercoding. For TCM IDR carriers that have information rates less than 1.544Mb/s, either no overhead framing or IBS overhead framing can be used.For information rates equal to or greater than 1.544 Mb/s, an overheadframing structure has been defined to facilitate the provision of ESCs andmaintenance alarms.

Switchability between the TCM IDR and QPSK IDR mode of operation isan optional requirement that allows users to maintain backwardcompatibility with existing QPSK IDR channel unit designs. Refer toIESS 310 for detailed performance characteristics for TCM IDRcarriers.

Compared to QPSK IDR, TCM IDR service typically uses about 20percent less bandwidth per carrier, and almost the same satellite powerwhen used with Standard A antennas. Table 4.13 shows a typicalcomparison between the two services.

Synchronous Scrambler 8 PSK ModulatorTCM Encoder

(Rate 2/3)

Reed-Solomon(219,201)

Encoder/Interleaver

Synchronous Descrambler 8 PSK DemodulatorTCM Decoder

(Rate 2/3)

Reed-Solomon(219,201)

Decoder/Deinterleaver

To Upconverter

From Downconverter

InformationRate

InformationRate

RS Encoder

RS Decoder

TransmitChannel Unit

ReceiveChannel Unit

Fig 4.58 Illustration of TCM IDR Channel Unit



Table 4.13 Typical Comparison between QPSK IDR and TCM IDR

QPSK IDR TCM IDRInformation rate 2 .048 Mb/s 2 .048 Mb/sNumber of 64 Kb/s channels 30 30Overhead 96 Kb/s 96 Kb/sAllocated Bandwidth 2002.5 kHz 1597.5 kHzNumber of 2 Mb/s carriers in 72 MHztransponder (typical)

36 45

Number of 64 Kb/s channels in 72 MHztransponder

1080 (36 x 30) 1350 (45 x 30)

Digital Satellite Communications Technology Handbook Appendix A - Echo Control


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This appendix provides information on:

• echo problems in satellite communications• differences between echo suppressors and echo cancellers• survey results that present the trend toward digitization and the use of

echo cancellers in the INTELSAT network• problems that might arise in circuits using echo control, causes, and

solutions for those problems• technical tradeoffs and costs for different cancellers• capital investment considerations when deciding to procure and install

echo cancellers.

Telephones are 2-wire devices and are connected by a hybrid to a 4-wireconnection that transmits and receives the signal along the rest of thecircuit path. Because of impedance mismatch at the hybrid, some of thesignal is reflected back towards the speaker, causing echo.

Echo is an inevitable component of sound transmission. However, in aterrestrial communication, the time difference between the time that wespeak and the time that we hear is usually so small that we do not noticethe echo. However, the talker may hear the signal that is reflected after adelay of 30 milliseconds (ms) as a "hollow" or "tinny" sound. If the signalis delayed by more than 30 ms, the talker will hear a delayed anddistorted version of his own speech, making conversation very difficult. Ifthe delay is 500 ms, a full word may be heard in the form of an echo.

A relatively large transmission time is a contributing factor to echobecoming audible that causes degradation. As distances between talkersincrease, the signal requires more time to travel the network’s entire path.

Note: This Appendix is based on INTELSAT’s Technical Manual on EchoControl that discusses the results performed for INTELSAT on EchoControl.



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Because the satellites are in the geostationary orbit, approximately23,800 miles from the Earth above the equator, transmission of anelectromagnetic signal from the ground to a satellite (uplink) and to thedistant receiver (downlink) will take approximately one-quarter of asecond (250 ms). This is termed a single hop. A double hop is atransmission that involves two satellites and will take half a second. Bycontrast, signals transmitted entirely over terrestrial lines have a muchshorter distance to travel and, therefore, echo plays a less important rolein terrestrial lines. However, a significant level of echo can occur interrestrial lines when delay is increased by complex digital signalprocessing equipment as well as multiple network switches, channelbanks, multiplexers, and repeaters.

If echo in a telephone network is not controlled effectively, it interfereswith the desired signal and degrades the network’s transmission quality.A strong echo may cause severe destabilization of a link making itoscillate resulting in degradation of the signal due to multiple reflections.Two types of echo control equipment are available:

• echo suppressor• echo canceller

Echo suppressor is one of the early devices developed to control theecho in satellite circuits. An echo suppressor is a voice-activated switchthat is set either to an “on” or an “off” position. The echo suppressor isconnected to the 4-wire side of a circuit. The suppressor terminates allsound when it is in the “on” position, temporarily blocking thecommunication link in one direction. When all communication issuppressed in one direction, no echo, or new speech from the other end,is transmitted.

During periods of double-talk, when both parties in a telephoneconversation speak simultaneously, suppressors may treat the new voiceas an echo and reduce its volume or partially block its transmission. Withsuppressors, information losses occur not only in verbal conversation butin the transmission of data via facsimile or modem as well. Because thesuppressor blocks the communication link, it can cause initial parts ofspeech to be lost in transmission. This speech-clipping phenomenonrepresents a severe shortcoming of the echo suppressor.

There is only one relevant ITU-T recommendation that applies to echosuppressors. ITU-T Recommendation G.164 pertains to both analog anddigital echo suppressors.



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Analog suppressors conforming to Recommendation G.161 areconsidered obsolete by the ITU Telecommunication StandardizationSector. INTELSAT recommended discontinuation of their use by June1992.

The function of an echo suppressor is to suppress echo by blocking thesignal in the reverse path. A voice-activated switch that is connected tothe 4-wire side of a circuit enables suppressors. Because they are voice-activated, or level sensitive, correct suppressor operation depends on theaccurate level detection of the signals presented on each input port.While in the single-talk mode (when only one person is speaking), thesuppressor uses a complex level detection logic to compare the signals inboth directions of transmission to determine which talker (Talker 1-thenear-end talker or Talker 2-the far-end talker) is active at any given time,and suppresses the transmission in the reverse path. Figure A-1presents the block diagram of an echo suppressor.

6 dB

Level andComparison

LogicHybrid

Far End/Talker 2

ReceivedSpeech

Send-out

Rec-in

Send-in

Rec-out

Near End/Talker 1

Suppression Switch

Figure A.1 Echo Suppressor Block Diagram



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ITU-T Recommendation G.164 classifies analog and digital echosuppressors based on the transmission path characteristics and the typeof logic used for level detection and level comparison.

• Type A: Interfaces with analog signals, and uses analog circuit logicand analog suppression

• Type B: Interfaces with analog signals, and uses digital circuit logicand analog suppression

• Type C: Interfaces with digital signals, and uses digital circuit logicand digital suppression

• Type D: Interfaces with analog signals, but uses digital circuit logicand digital suppression

Type A generally uses nonadaptive logic for echo suppression. Types B,C, and D may employ either adaptive or nonadaptive logic that is adjustedaccording to the attenuation of the echo path. Adaptive echo suppressorsperform significantly better than nonadaptive ones by dynamicallyadjusting the echo suppressor control to match the circuit conditions overa wide input signal range.

Suppressors have two problems: speech-clipping and double-talk.

In Figure A-1, when only the far-end talker (Talker 2) is active, a switch isopened on the send side that suppresses the echo returning to the far-end talker. That is, it permits the signal of the instantaneous talker to betransmitted to the near-end, but blocks the echo traveling the return path.

When Talker 1 initiates speech, the situation is reversed. However,during this transition, the first few syllables of Talker 1 may remainblocked due to its finite circuit reaction time. The suppressor at the farend cannot quickly differentiate between echo and new speech from thenear-end. Disabling, or turning off the suppressor requires finite time forcompletion. Thus, the far end listener cannot hear all that is spoken tohim because part of the voice signal is lost each time the suppressor isdisabled. This loss of the first syllable, or more, of a voice signal is calledspeech clipping or chopping.

If both the near-end and far-end talkers speak simultaneously (double-talk), an enabled suppressor allows only one of the two talkers to beheard. Because the suppressor cannot treat speech separately fromecho, echo spurts may be heard during double-talk because near-endtalker speech and far-end talker echo are simultaneously present in thesignal.



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To reduce the problem of echo spurts, the echo suppressor isprogrammed to stop echo suppression and start volume attenuation tocompensate for double-talk. To attenuate the signal, loss is injected inthe receive path, thereby reducing the volume of both the echo and newvoice signals.

Though digitally implemented echo suppressors perform better thananalog ones, all echo suppressors exhibit the inherent deficiencies.When echo suppressors are implemented digitally, they provide improvedoperation during double-talk. Their operation is critically dependent onsignal levels, as well as signal level differences, including thresholds usedfor determining and identifying single- and double-talk conditions. Whenthe signals fall within the normal operating ranges and the Echo ReturnLoss (ERL), or loss in signal level, is greater than 15 dB, the echosuppressor performs well; otherwise, its performance rapidly degrades.

Demand for high quality long-distance telephone service and advances insignal processing technology prompted researchers to develop a newdevice that would improve the echo suppressor performance. The endproduct was the echo canceller.

The echo canceller removes echo from a telecommunication circuitwithout blocking the communication link. This is accomplished bysampling the far-end talker signal and internally generating a dynamicmodel or replica of the incoming voice signal through an algorithm. Thisreplica is subtracted from the reflected signal as it passes through theecho canceller on the return path, thereby canceling the echo component.

When echo cancellers were first introduced, their large size and highcosts discouraged widespread installation. However, digital signalprocessing and improved manufacturing techniques have made echocancellers more attractive. Today, their many special advantagesincluding better performance, low-cost (especially in multichannel units),self-testing ability, and adaptability to react to different circumstances inthe circuit have made echo cancellers the leading method of echo controlwithin the INTELSAT system.

Compared to the performance of echo suppressors, echo cancellersimprove the quality of voice service in telecommunication networks.Cancellers adapt more easily to different communication environmentsand circuit conditions. They allow simultaneous two-way conversation(including double-talk) without loss of speech or syllables or volumereduction, thereby offering overall high quality voice and data services.



Echo cancellers are voice-activated devices, which remove echo from thecircuit without attenuating or suppressing the voice signal. Likesuppressors, cancellers are positioned in the 4-wire side of the network.However, instead of blocking a voice signal to remove the echo andeverything else as well, the echo canceller subtracts an estimate of theecho from the returning signal. Figure A.2 shows a typical echo cancellerblock diagram and Figure A.3 shows a typical transmission path.

There are different types of cancellers, and the design may be basedupon a single channel or multichannel operation. ITU-TRecommendation G.165 addresses both analog and digital echocancellers and provides for three different types of such devices.

1. Type A: Interfaces with analog signals and uses an analogsubtracter.

2. Type C: Interfaces with digital signals and uses a digital subtracter.3. Type D: Interfaces with analog signals and uses a digital

subtracter.

There are very few Type A cancellers. Type D cancellers are usuallyfound in applications where fewer circuits are involved. The majority ofcancellers sold today are Type C. They are available for multichanneloperation in increments of 24 or 30 channels, corresponding to theprimary digital hierarchy, T-1 or E1. The following discussion applies toall types of echo cancellers unless a reference is made to a specific type.

Double TalkDetector

Hybrid

Far End/Talker 2

ReceivedSpeech

Send-out

Rec-in

Send-in

Rec-out

Near End/Talker 1

Echo Canceller

-

EchoEstimate

CorrectionControl

Non-LinearProcessor

NetworkSide

Customerside

Figure A.2 Block Diagram of Echo Canceller



HybridHybrid

Inte

rface

Inte

rface

Talker1’s

EchoCanceller

Talker2’s

EchoCanceller

Long-DelayTerrestrial

or SatelliteDigital Network

A/D A/D

/2 /4/4 /2

Talker 1 Talker 2

FarTalker

NearTalker

x

xEcho Return Path

Talker 2 Normal Speech Path

Echo Return Path

Talker 1 Normal Speech Path

ERL3 or 6 dB

ERL3 or 6 dB

Note: An echo canceller al Talker 2’s end cancels echo only for Talker 1’s speech, and only Talker 1 can hear thedifference that Talker 2’s echo canceller makes in the quality of the connection

Figure A.3 Typical Transmission Path

Refer to Figure A.3. In the transmission path when Talker 1 (the near-endtalker) speaks, the voice signal is transmitted through a hybrid, the pointwhere a 2-wire circuit becomes a 4-wire circuit, at the near-end. It istransmitted through a channel bank or multiplexer. Talker 1’s speechsignal passes transparently through Talker 1’s echo canceller, the near-end canceller, before being placed onto a long-distance terrestrial orsatellite network. After its journey through the network, Talker 1’s signalpasses through Talker 2’s echo canceller, into the channel bankequipment that converts the signal from digital to analog so that it can beheard. The analog signal is finally passed through a second hybrid toTalker 2’s telephone.

When the voice signal reaches the end of the satellite or terrestrialnetwork, it passes through the echo canceller on its way to the intendedreceiver (Talker 2’s telephone) before it is converted from a 4-wire to a 2-wire. The far-end echo canceller performs a large number of samplingsand complex calculations within a short time, referred to as convergencetime. This parameter is a measure of the efficiency of the echo cancelleroperation. The echo canceller estimates the voice signal pattern andmakes a model of that pattern. This process, called convergence, is theprocess of dynamically developing a mathematical model of the voicesignal.



When the reflected echo passes through the echo canceller on the echoreturn path, the echo canceller subtracts the estimated echo from theactual echo based on the convergence model. Any residual error signalis used to improve the model for the next estimate. The digital echocanceller employs digital signal processing to dynamically update themodel of the echo with variations in the incoming signal and networkresponse, allowing the model to adapt continuously to changing speechpattern and circuit conditions.

Convergence time measures the speed of the echo canceller inconstructing the mathematical model. The smaller the convergence time,measured in milliseconds, the more efficient the echo canceller, and themore precise is the cancellation so that voices are crisp from the verybeginning of speech.

After convergence, most of the echo is cancelled without affecting anynew speech in the send path. However, the echo canceller may not beperfect in cancelling the echo due to errors in the model and limitations inconvergence and quantization noise. For the single-talk condition, anonlinear processor (NLP) attenuates the residual echo. The NLP, alsocalled the center clipper, attenuates, or fine tunes, the volume of theremaining echo to an inaudible level. In the event of double-talk, adetector recognizes the double-talk condition, removes the nonlinearprocessor, and disables the adaptive loop to prevent the near-end talker’sspeech from causing improper corrections to the impulse response of theecho canceller.

ERL is the loss in signal level that occurs while the signal travels throughthe network’s end-path. The end-path is the portion of the network fromthe echo canceller’s receive-out port to the send-in port. The mostsensitive echo cancellers have ERL near zero, meaning that the cancellercan perform when there is almost no measurable difference between thelevel of the original voice signal and that of the echo. A typical value ofERL is 6 dB. The value of ERL is an important factor in determining theoverall performance of the echo canceller.

Echo Return Loss Enhancement (ERLE) indicates the level of echo thespeaker will hear after the voice signal has been processed through thecanceller. ERLE is the sum of the network’s end path ERL, and theeffects of the canceller with and without the NLP. Like ERL, ERLE is alsomeasured in decibels. ERLE and convergence time are two basicmeasures of a canceller’s performance.



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The end-path, as stated earlier, is the portion of the network from thereceive-out port of the echo canceller to its send-in port. The echocanceller’s end-path delay corresponds to the maximum length of timethat a signal may take in travelling around the network’s end-path, and stillbe cancelled when it returns to the canceller through the send-in port.Current designs of echo cancellers can typically accommodate end-pathdelays ranging from 8 ms to 128 ms. For optimum performance, it isnecessary to have an echo canceller with an end-path delay capabilitythat is long enough to accommodate the longest end-path delay possiblein the network.

Data tone disablers temporarily disconnect digital echo cancellers duringhigh-speed (greater than 9600 baud) data transmissions by a facsimilemachine or modem. At lower speeds, the digital echo canceller canaccommodate digitally encoded data because it is designed to betransparent.

Signaling refers to the ways an echo canceller accommodates the varioussignaling formats that precede any transmission such as those whichinitiate a phone or fax transmission. Even though the echo canceller hasno active role in signaling, the canceller must be transparent to thesignaling format used.

If a digital carrier system is available, in either T-1 or E1 format, it will becost effective to use digital echo cancellers. Even in single channelapplications, some voice codecs may be purchased with an optionallyequipped echo canceller. Also, some PBXs are available with built-inecho cancellation.

Recent developments in the large-scale integration technology for digitalecho cancellers have further enhanced performance, while significantlyadding to the flexibility and efficiency. Improvements have included largertail-end delay values and multichannel systems. Discounts, particularlyfor volume purchases, are available from most manufacturers making theuse of digital echo cancellers even more attractive.

Cost savings can usually be realized through the use of multichannelcancellers. If a channel bank must be added for the multichannelcanceller, then the cost of the multichannel canceller will be somewhathigher. Typically, the cost of 18 single channel cancellers will be equal tothe cost of a T-1 channel bank and a T-1 echo canceller.



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Single channel cancellers are more expensive to install. The cost of amounting shelf, which can contain up to 12 cancellers, must be added tothe single channel cost. Single channel echo cancellers are also morecomplex to install. A multichannel echo canceller input consists of fourpairs of wires: Send-in, Send-out, Receive-in, and Receive out thatprovide input and output for 24 channels. By contrast, 96 pairs must beconnected for 24 single channel units.

The cost of a digital E1 EC-6000 echo canceller ranges from $150 to$215 per installed channel. This cost includes variations in the number ofchannels installed per shelf, tail circuit lengths (8 to 128 ms) and signalingoptions.

Multichannel digital cancellers generally come with some form ofdiagnostic and network control capability. Some units have an automaticself-test of idle channels with an error listing provided to either a controlterminal or a printer. One manufacturer provides two backup cancellersin the event of a failure in a particular channel. The manufacturers list amean time between failure (MTBF) greater than 20 years in theirspecifications for these cancellers.

Maintenance costs are lower for multichannel cancellers. Single channelunits must be individually tested. By contrast, multichannel cancellersprovide terminal and remote access by means of an RS-232 v.24 portwith built-in automatic self-test and error reporting functions.

Over the last 25 years, subjective tests have been conducted to comparethe quality of satellite links with that of the terrestrial links. Tests haveshown that a primary cause of quality degradation is echo. Pure delays,delays without any echo, up to a few hundred milliseconds do notsignificantly degrade the communications quality of a voice circuit.However, in some instances, a round-trip delay in excess of 30 ms maycause the echo to become objectionable, and the communications qualitydegraded unless these echoes are eliminated by suitable echo controldevices. Further, it is necessary that the circuits to which these devicesare connected be properly maintained for the echo control devices toperform adequately.

Field trials in the United States by the Bell system clearly demonstratedthat echo canceller-equipped satellite circuits operating in the U.S.domestic network performed as well as terrestrial circuits.



They also indicated that the echo suppressors, conforming with ITU-TRecommendation G.161 for long propagation delay circuits, impairspeech transmission, and result in chopping, echo spurts, and a generaldegradation of circuit performance. New ITU-T Recommendation G.164-type digital echo suppressors, which operate with shortened hangovertimes, improved logic for the control of echo suppression and break-in,also improve performance, but not to the same extent as the echocancellers.

Tests were also performed on composite circuits in which satellite linksare used in one direction, and terrestrial links in the other, reducing round-trip transmission delay. The results for the composite circuits were betterthan for the all-satellite circuit with the same echo suppressors. However,the results for the composite circuits with only suppressors were no betterthan the echo cancellers on the all-satellite circuit.

Results of many field trials have proven that even with the longpropagation delays of the satellite, echo cancellers can provide a circuitquality comparable to that of terrestrial circuits. Unlike circuits using echosuppression, echo cancellation makes it possible to permit full-duplexcommunication without interruption. Advances in circuit miniaturization,digital signal processing, and manufacturing techniques have made echocancellers cost effective. The cancellers’ self-testing capability andaudible performance characteristics make them superior to echosuppressors from both technological and practical viewpoints. INTELSATrecommends that echo cancellers conforming to or exceeding ITU-TRecommendation G.165 requirements be placed on all voice circuitstransported over the system.

Digital Satellite Communications Technology Handbook Glossary


Glossary

Acronyms and AbbreviationsAdaptive Differential Code-Excited Linear Prediction (ADCELP)Adaptive Differential Pulse Code Modulation (ADPCM)Adaptive PCM (APCM)Adaptive Predictive Coding (APC)Adaptive Transform Coding (ATC)Alarm Indication Signal (AIS)Alternate Mark Inversion (AMI)Amplitude Shift Keying (ASK)ARQ (Automatic Repeat reQuest)Band Pass Filter (BPF)Bearer Channel (BC)Binary Phase-Shift Keying (BPSK)Bit Error Rate (BER)Channel Associated Signaling (CAS)Channel Translating Equipment (CTECircuit Multiplication Equipment (CME)Coded Mark Inversion (CMI)Code-Excited Linear Prediction (CELP)Common Channel Signaling (CCS)Control Channel (CC)Cyclic Redundancy Checking (CRC)Data Circuit Terminating Equipment (DCE)Data Terminal Equipment (DTE)DCME Link Dimensioning (DLD)Degraded Minutes (DM)Demand Assigned Multiple Access (DAMA)Digital Channel Occupancy Analyzer (DCOA)Digital Circuit Emulation (DICE)Digital Circuit Multiplication Equipment (DCME)Digital Speech Interpolation (DSI)Dynamic Load Control (DLC)Echo Return Loss (ERL)Echo Return Loss Enhancement (ERLE)Electronic Data Interchange (EDI)Electronic Mail (email)Engineering Service Circuit (ESC)Fax Control Channel (FCC)Fax Data Channel (FDC)Fax Module Frame (FMF)Fax Transport Channels (FTC)



Forward Error Correction (FEC)Frame Alignment Word (FAW)Frame Data Word (FDW)Frame Relay Access Device (FRAD)Frequency Division Multiple Access (FDMA)Frequency Shift Keying (FSK)Headquarters Management Facility (HQMF)High Density Bipolar (HDB)High-Level Data Link Control (HDLC)Hughes Network Systems (HNS)Hypothetical Reference Connection (HRX)INTELSAT Business Services (IBS)INTELSAT Earth Station Standards (IESS)INTELSAT Operations Center (IOC)INTELSAT Signatory Training Program (ISTP)INTELSAT’s Assistance and Development Program (IADP)Intermediate Data Rate (IDR)Intermediate Frequency (IF)Intermediate Trunk (IT)International Organization for Standardization (ISO)International Telecommunication Union (ITU)International Transmission Maintenance Center (ITMC)Internet Service Providers (ISPs)International Switching Center (ISC)Justification Control Word (JCW)Least Significant Bits (LSBs)Linear Predictive Coding (LPC)Local Area Network (LAN)Low Delay-Code Excited Linear Prediction (LD-CELP)Low Rate Encoders (LREs)M-ary PSK (MPSK)Metropolitan Area Network (MAN)Multiframe Alignment Word (MFAW)Nearly Instantaneous Companding (NIC)Network Access Point (NAP)Network Management Control Center (NMCC)NonLinear Processor (NLP)North American Systems (NASs)Open Systems Interconnection (OSI)Packet Circuit Multiplication Equipment (PCME)Phase Noise (PN)Phase Shift Keying (PSK)Public Switched Telephone Network (PSTN)Pulse Amplitude Modulation (PAM)Pulse Code Modulation (PCM)



Quadrature Amplitude Modulation (QAM)Quadrature Phase Shift Keying (QPSK)radiofrequency (RF)Satellite Switched TDMA (SS-TDMA)Single Channel Per Carrier (SCPC)Single Frequency (SF)Time Division Multiple Access (TDMA)Time Division Multiplexing (TDM)Time Slot (TS)Trellis-Coded Modulation Intermediate Data Rate (TCM IDR)Trunk Channels (TCs)Voltage Controlled Oscillator (VCO)Very Small Aperture Terminal (VSAT)Virtual Data Link Capability (VDLC)Wide Area Network (WAN)World Wide Web (WWW)

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