institut für angewandte mikroelektronik und datentechnik course and contest results of phase...
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![Page 1: Institut für Angewandte Mikroelektronik und Datentechnik Course and contest Results of Phase Selected Topics in VLSI Design (Module 24513) 03.04.2015 ©](https://reader035.vdocuments.mx/reader035/viewer/2022062623/55204d8649795902118d9ca9/html5/thumbnails/1.jpg)
Institut fürAngewandte
Mikroelektronikund Datentechnik
Course and contest
Results of Phase <X>
<Your name>
Selected Topics in VLSI Design(Module 24513)
11.04.23 © 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik 1
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Institut fürAngewandte
Mikroelektronikund Datentechnik
Institut fürAngewandte
Mikroelektronikund Datentechnik
DO NOT-List
Motivation
• Why VLSI-project?• What is the aim? NOT important to other listeners as fundamental info on the project is
familiar to everyone and should not be repeated
• Tool issues, delays due to private appointments NOT important either
To make it clear: Such a slide is to be omitted11.04.23 2© 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik
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Institut fürAngewandte
Mikroelektronikund Datentechnik
Institut fürAngewandte
Mikroelektronikund Datentechnik
Facts to present
Design and architecture:
Figures to be given to describe your transformation design:• Chosen adders, multipliers• Algorithmic/architectual/component enhancements
• Optimizations (explain WHY they were chosen)
• What did you expect?• What does theory promise?
11.04.23 3© 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik
![Page 4: Institut für Angewandte Mikroelektronik und Datentechnik Course and contest Results of Phase Selected Topics in VLSI Design (Module 24513) 03.04.2015 ©](https://reader035.vdocuments.mx/reader035/viewer/2022062623/55204d8649795902118d9ca9/html5/thumbnails/4.jpg)
Institut fürAngewandte
Mikroelektronikund Datentechnik
Institut fürAngewandte
Mikroelektronikund Datentechnik
Facts to present
Figures to be given (with units):
• Frequency• Pipeline depth (number of register
stages -1)• Area• Power• All other important facts you
consider important (e.g. # of logic blocks, registers …)
11.04.23 4© 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik
![Page 5: Institut für Angewandte Mikroelektronik und Datentechnik Course and contest Results of Phase Selected Topics in VLSI Design (Module 24513) 03.04.2015 ©](https://reader035.vdocuments.mx/reader035/viewer/2022062623/55204d8649795902118d9ca9/html5/thumbnails/5.jpg)
Institut fürAngewandte
Mikroelektronikund Datentechnik
Institut fürAngewandte
Mikroelektronikund Datentechnik
Flow for the presentation
Recommended flow for reasoning:
1. Observations: What do/did you observe in your design?– Problems, drawbacks, potential enhancements …
2. Do your observations leave room for optimizations?– What do you expect to change?
– What does theory promise?
3. Present and discuss results of the implemented optimizations– Conclude based on your results (e.g. approach was reasonable,
unsuccessful)
4. Outlook on next steps/optimizations– Is there room for further optimization? Why? What do you plan to do?
11.04.23 5© 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik