importance of the lna friis formula importance of the lna friis formula digital electronics cmos lna...
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Importance of the LNA
Importance of the LNA
21
1 ( 1)
111 1 .....
1 .....m
totp p m
NFNFNF NF
Ap A A
Friis’ Formula
Importance of the LNA
21
1 ( 1)
111 1 .....
1 .....m
totp p m
NFNFNF NF
Ap A A
Friis’ Formula
Digital Electronics CMOS LNA
X
Low Cost
High Integration
Integration With Digital IC
Larger Parasitic Capisitance
Importance of the LNA
21
1 ( 1)
111 1 .....
1 .....m
totp p m
NFNFNF NF
Ap A A
Friis’ Formula
Digital Electronics CMOS LNA
X
Low Cost
High Integration
Integration With Digital IC
Larger Parasitic Capisitance
RF Hexagon
Why Inductive Degenerated LNA?
2-Port Noise Theory
22
2s n s n
s
i i Y eF
i
Why Inductive Degenerated LNA?
2-Port Noise Theory
22
2s n s n
s
i i Y eF
i
2
2
2
s u c s n
s
i i Y Y eF
i
Why Inductive Degenerated LNA?
2-Port Noise Theory
22
2s n s n
s
i i Y eF
i
2
2
2
s u c s n
s
i i Y Y eF
i
CMOS small signal equivalent
Why Inductive Degenerated LNA?
2-Port Noise Theory
22
2s n s n
s
i i Y eF
i
2
2
2
s u c s n
s
i i Y Y eF
i
CMOS small signal equivalent
Thermal Noise Contribution
Why Inductive Degenerated LNA?
2-Port Noise Theory
22
2s n s n
s
i i Y eF
i
2
2
2
s u c s n
s
i i Y Y eF
i
CMOS small signal equivalent
Thermal Noise Contribution
*
2 2
ng nd
ng nd
i ic
i i min 1 1
5c gsF Y j C a c
Why Inductive Degenerated LNA?
2-Port Noise Theory
22
2s n s n
s
i i Y eF
i
2
2
2
s u c s n
s
i i Y Y eF
i
CMOS small signal equivalent
Thermal Noise Contribution
*
2 2
ng nd
ng nd
i ic
i i min 1 1
5c gsF Y j C a c
X Power Matching
Inductive Degenerated LNA
Bond Wire Inductance
Inductive Source Degeneration
Input Power Matching
Inductive Degenerated LNA
Bond Wire Inductance
Inductive Source Degeneration Small Signal Equivalent
Input Power Matching
Inductive Degenerated LNA
Bond Wire Inductance
Inductive Source Degeneration Small Signal Equivalent
1( ) m s
in g sgs gs
g LZ j L j L
j C C
0Re( ( )) sZin R
0Im( ( )) 0Zin Power
Matching
Input Power Matching
Inductive Degenerated LNA
Bond Wire Inductance
Inductive Source Degeneration Small Signal Equivalent
1( ) m s
in g sgs gs
g LZ j L j L
j C C
0Re( ( )) sZin R
0Im( ( )) 0Zin Power
Matching
m gs s sg C R L
g s s sL Q R L
Input Power Matching
Inductive Degenerated LNA
Bond Wire Inductance
Inductive Source Degeneration Small Signal Equivalent
1( ) m s
in g sgs gs
g LZ j L j L
j C C
0Re( ( )) sZin R
0Im( ( )) 0Zin Power
Matching
m gs s sg C R L
g s s sL Q R L 1s o gs sQ C R
2 3gs oxC WLC
Input Power Matching
Definitions
Basic Equation of MOS Drain
||2
n oxD gs t gs t sat
C WI V V V V LE
L
Definitions
Basic Equation of MOS Drain
||2
n oxD gs t gs t sat
C WI V V V V LE
L
2n
sat satv E
od gs tV V V od
sat
V
LE
2
1D ox sat sat
pI WLC v E
p
Definitions
Basic Equation of MOS Drain
||2
n oxD gs t gs t sat
C WI V V V V LE
L
2n
sat satv E
od gs tV V V od
sat
V
LE
2
1D ox sat sat
pI WLC v E
p
21 / 2
1D
m ox n odgs
I Wg C V
V L
2
1D DD D DD ox sat sat
pP V I V WLC v E
p
Definitions
Basic Equation of MOS Drain
||2
n oxD gs t gs t sat
C WI V V V V LE
L
2n
sat satv E
od gs tV V V od
sat
V
LE
2
1D ox sat sat
pI WLC v E
p
21 / 2
1D
m ox n odgs
I Wg C V
V L
( ) 1 ( )s st
F Q Q
2 2 21
( ) (1 ) 25 5 5s s s
s
Q Q c QQ
2
1D DD D DD ox sat sat
pP V I V WLC v E
p
Definitions
Basic Equation of MOS Drain
||2
n oxD gs t gs t sat
C WI V V V V LE
L
2n
sat satv E
od gs tV V V od
sat
V
LE
2
1D ox sat sat
pI WLC v E
p
21 / 2
1D
m ox n odgs
I Wg C V
V L
( ) 1 ( )s st
F Q Q
2 2 21
( ) (1 ) 25 5 5s s s
s
Q Q c QQ
2
1D DD D DD ox sat sat
pP V I V WLC v E
p
0.395c j1a Long Channel
1a 2 Short Channel
2 / 3 4
4 / 3 150odV mV
Inductive Specified Technique
1st step: Setting the value of Ls
Inductive Specified Technique
1st step: Setting the value of Ls
2nd step: Finding the value of ωt.Ls
. /t Ls m gs s sg C R L From Impendance Matching:
Inductive Specified Technique
3rd step: Finding the optimum Qs
1st step: Setting the value of Ls
2nd step: Finding the value of ωt.Ls
. /t Ls m gs s sg C R L From Impendance Matching:
. .( ) 0
s s opt Lss s Q Q
Q Q
. . 2
51s opt LsQ
min, . .( ) 1 1.64Ls s opt Lst
F F Q
Inductive Specified Technique
3rd step: Finding the optimum Qs
1st step: Setting the value of Ls
2nd step: Finding the value of ωt.Ls
4th step: Finding the value of Lg
. /t Ls m gs s sg C R L From Impendance Matching:
. .( ) 0
s s opt Lss s Q Q
Q Q
. . 2
51s opt LsQ
min, . .( ) 1 1.64Ls s opt Lst
F F Q
. . .g Ls s opt Ls s sL Q R L From Impendance Matching:
Inductive Specified Technique
3rd step: Finding the optimum Qs
1st step: Setting the value of Ls
2nd step: Finding the value of ωt.Ls
4th step: Finding the value of Lg
5th step: Finding the optimum Cgs
. /t Ls m gs s sg C R L From Impendance Matching:
. .( ) 0
s s opt Lss s Q Q
Q Q
. . 2
51s opt LsQ
min, . .( ) 1 1.64Ls s opt Lst
F F Q
. . .g Ls s opt Ls s sL Q R L From Impendance Matching:
From Impendance Matching:
1s o gs sQ C R . . . ,1gs opt Ls o s opt Ls sC Q R
Inductive Specified Technique
6th step: Finding the optimum device’s width Wopt,Ls
2 3gs oxC WLC , . .3 / 2opt Ls o ox s s opt LsW LC R Q
Inductive Specified Technique
6th step: Finding the optimum device’s width Wopt,Ls
2 3gs oxC WLC , . .3 / 2opt Ls o ox s s opt LsW LC R Q
7th step: Finding the optimum device’s transconductance gm.opt.Ls
From Impendance Matching: . . . . /m opt Ls s gs opt Ls Sg R C L
Inductive Specified Technique
6th step: Finding the optimum device’s width Wopt,Ls
2 3gs oxC WLC , . .3 / 2opt Ls o ox s s opt LsW LC R Q
7th step: Finding the optimum device’s transconductance gm.opt.Ls
From Impendance Matching: . . . . /m opt Ls s gs opt Ls Sg R C L
8th step: Finding the optimum ρ and Vod
21 / 2
1m ox n od
Wg C V
L
.
11
1 2 / 3opt Lst satL v
. . . 150od opt Ls opt Ls satV LE mV !
Inductive Specified Technique
6th step: Finding the optimum device’s width Wopt,Ls
2 3gs oxC WLC , . .3 / 2opt Ls o ox s s opt LsW LC R Q
7th step: Finding the optimum device’s transconductance gm.opt.Ls
From Impendance Matching: . . . . /m opt Ls s gs opt Ls Sg R C L
8th step: Finding the optimum ρ and Vod
21 / 2
1m ox n od
Wg C V
L
.
11
1 2 / 3opt Lst satL v
. . . 150od opt Ls opt Ls satV LE mV !
9th step: Finding the current consumption ID.Ls
2. 1D Ls opt ox sat sat opt optI W LC v E
Current Specified Technique
1st step: Setting the current consumption ID
Current Specified Technique
1st step: Setting the current consumption ID
2nd step: Finding the optimum ρ and Vod
2
( )1
os
D
IQ
I
2
1 0.5( ) 3
(1 )sat
t
v
L
( )
( ) 1( )t
F
.
( ) ( ) 0opt I
t
. 2
5 31 1 1
5d
opt Io
Ic
I c
. . .od opt I opt I satV LE
Current Specified Technique
1st step: Setting the current consumption ID
2nd step: Finding the optimum ρ and Vod
2
( )1
os
D
IQ
I
2
1 0.5( ) 3
(1 )sat
t
v
L
( )
( ) 1( )t
F
.
( ) ( ) 0opt I
t
. 2
5 31 1 1
5d
opt Io
Ic
I c
. . .od opt I opt I satV LE
3nd step: Finding the optimum Qs
. . 2
5 31 1 1
5s opt IQ cc
From 2nd Step:
Current Specified Technique
1st step: Setting the current consumption ID
2nd step: Finding the optimum ρ and Vod
2
( )1
os
D
IQ
I
2
1 0.5( ) 3
(1 )sat
t
v
L
( )
( ) 1( )t
F
.
( ) ( ) 0opt I
t
. 2
5 31 1 1
5d
opt Io
Ic
I c
. . .od opt I opt I satV LE
3nd step: Finding the optimum Qs
4th step: Finding the optimum device width Wopt,I
. . 2
5 31 1 1
5s opt IQ cc
From 2nd Step:
From 3rd Step & Impendance Matching: .
. .
3 1
2opt Io ox s s opt I
WLC R Q
Current Specified Technique
1st step: Setting the current consumption ID
2nd step: Finding the optimum ρ and Vod
2
( )1
os
D
IQ
I
2
1 0.5( ) 3
(1 )sat
t
v
L
( )
( ) 1( )t
F
.
( ) ( ) 0opt I
t
. 2
5 31 1 1
5d
opt Io
Ic
I c
. . .od opt I opt I satV LE
3nd step: Finding the optimum Qs
4th step: Finding the optimum device width Wopt,I
5nd step: Finding the value of ωt.I
. . 2
5 31 1 1
5s opt IQ cc
From 2nd Step:
From 3rd Step & Impendance Matching: .
. .
3 1
2opt Io ox s s opt I
WLC R Q
From 2nd Step:
.. . 2
.
1 0.53
(1 )opt I sat
t I opt Iopt I
v
L
Current Specified Technique
6th step: Finding the optimum device transconductance gm.opt.I
From 2nd , 3rd Step & Impendance Matching:
2. . . . . .2 1 / 2 1m opt I opt I ox sat opt I opt I opt Ig W C v
min, ..
( ) 1 1.81I opt It I
F F
Current Specified Technique
6th step: Finding the optimum device transconductance gm.opt.I
From 2nd , 3rd Step & Impendance Matching:
2. . . . . .2 1 / 2 1m opt I opt I ox sat opt I opt I opt Ig W C v
min, ..
( ) 1 1.81I opt It I
F F
7th step: Finding the optimum Cgs
From 5th , 6th Step : , , , , , ,gs opt I m opt I t opt IC g
Current Specified Technique
6th step: Finding the optimum device transconductance gm.opt.I
From 2nd , 3rd Step & Impendance Matching:
2. . . . . .2 1 / 2 1m opt I opt I ox sat opt I opt I opt Ig W C v
min, ..
( ) 1 1.81I opt It I
F F
7th step: Finding the optimum Cgs
From 5th , 6th Step : , , , , , ,gs opt I m opt I t opt IC g
From 6th , 7th Step & Impendance Matching:
8th step: Finding the optimum Ls
. . . . . .s opt I s gs opt I m opt IL R C g
Current Specified Technique
6th step: Finding the optimum device transconductance gm.opt.I
From 2nd , 3rd Step & Impendance Matching:
2. . . . . .2 1 / 2 1m opt I opt I ox sat opt I opt I opt Ig W C v
min, ..
( ) 1 1.81I opt It I
F F
7th step: Finding the optimum Cgs
From 5th , 6th Step : , , , , , ,gs opt I m opt I t opt IC g
From 6th , 7th Step & Impendance Matching:
8th step: Finding the optimum Ls
. . . . . .s opt I s gs opt I m opt IL R C g
9th step: Finding the optimum Lg
From 6th , 7th Step & Impendance Matching:
, , , ,1g I gs opt I s IL C L
Comparison Results
• Inductive Specified Technique
min, 1 1.64Ls ss
F LR
Comparison Results
• Inductive Specified Technique
min, 1 1.64Ls ss
F LR
0.5 3sL nH
Comparison Results
• Inductive Specified Technique
min, 1 1.64Ls ss
F LR
0.5 3sL nH
Parameters:
50sR
0.18um process
29.8 /oxC mF m
1.2 / secnv m
55.510 /satE V m
0.5L um
Comparison Results
@ 1.6 GHz Vod=120mVID= 1.7mA
• Inductive Specified Technique
Comparison Results
• Inductive Specified Technique
@ 2.5 GHz Vod=120mVID= 1.1mA
Comparison Results
• Inductive Specified Technique
@ 5.5 GHz Vod=120mVID= 0.5mA
Comparison Results
• Inductive Specified Technique
Vod ≤ 150 mV
Comparison Results
• Inductive Specified Technique
@ 1.6 GHz Vod=138mVID= 2.4mA
Comparison Results
• Inductive Specified Technique
@ 2.5 GHz Vod=138mVID= 1.5mA
Comparison Results
• Inductive Specified Technique
@ 5.5 GHz Vod=138mVID= 0.7mA
Comparison Results
• Inductive Specified Technique
Vod ≤ 150 mV
Comparison Results
• Inductive Specified Technique
@ 1.6 GHz Vod=162mVID= 3.2mA
Comparison Results
• Inductive Specified Technique
@ 2.5 GHz Vod=162mVID= 2.1mA
Comparison Results
• Inductive Specified Technique
@ 5.5 GHz Vod=162mVID= 0.7mA
Comparison Results
• Inductive Specified Technique
Vod ≥ 150 mV
Comparison Results
• Inductive Specified Technique
Vod ≥ 150 mV
Comparison Results
• Inductive Specified Technique
Vod ≥ 150 mV
Comparison Results
• Inductive Specified Technique
Vod ≥ 150 mV
Comparison Results
• Inductive Specified Technique
Vod ≥ 150 mV
Comparison Results
• Inductive Specified Technique
Vod ≥ 150 mV
Comparison Results
• Inductive Specified Technique
Ls = 1.2nH NFmin= 6.1dBID= 0.9mA
Comparison Results
• Inductive Specified Technique
Ls = 1nH NFmin= 5.6dBID= 1.4mA
Comparison Results
• Inductive Specified Technique
Ls = 0.8nH NFmin= 5dBID= 2.2mA
Comparison Results
• Inductive Specified Technique
Ls = 0.6nH NFmin= 4dBID= 4mA
Comparison Results
• Inductive Specified Technique
NFminID
Comparison Results
• Inductive Specified Technique
NFminID
Comparison Results
• Inductive Specified Technique
NFminID
Comparison Results
• Inductive Specified Technique
NFminID IDL LS
Comparison Results
• Current Specified Technique
2.
min,. .
(1 )1 1.81
3 (1 0.5 )opt I
Iopt I opt I sat
F Lv
Comparison Results
• Current Specified Technique
0.25 16DI mA 2
.min,
. .
(1 )1 1.81
3 (1 0.5 )opt I
Iopt I opt I sat
F Lv
0.5 3sL nH
Comparison Results
• Current Specified Technique
0.25 16DI mA
Parameters:
50sR
0.18um process
29.8 /oxC mF m
1.2 / secnv m
55.510 /satE V m
0.5L um
2.
min,. .
(1 )1 1.81
3 (1 0.5 )opt I
Iopt I opt I sat
F Lv
0.5 3sL nH
Comparison Results
• Current Specified Technique
@ 1.6 GHz Vod=60mVLS=3.1nH
Comparison Results
• Current Specified Technique
@ 2.5 GHz Vod=76mVLS=2.5nH
Comparison Results
• Current Specified Technique
@ 5.5 GHz Vod=112mVLS=1.7nH
Comparison Results
• Current Specified Technique
@ 1.6 GHz Vod=85mVLS=2.2nH
Comparison Results
• Current Specified Technique
@ 2.5 GHz Vod=107mVLS=1.7nH
Comparison Results
• Current Specified Technique
@ 5.5 GHz Vod=158mVLS=1.2nH
Comparison Results
• Current Specified Technique
Comparison Results
• Current Specified Technique
Vod,opt ≥ 150mV 3nH ≥ LS ≥ 0.5nH
Comparison Results
• Current Specified Technique
NFminID
Comparison Results
• Current Specified Technique
NFminID
Comparison Results
• Current Specified Technique
NFminID IDL LS
Conclusion
• Inductive Specified Technique
Q
s
Ls
ω
t.Ls
Lg Cgs Wopt,Ls gm.opt.Ls ρ ID.Ls
Conclusion
• Inductive Specified Technique
• Current Specified Technique
Q
s
Ls
ω
t.Ls
Lg Cgs Wopt,Ls gm.opt.Ls ρ ID.Ls
Q
s
ID p Lg Cgs Wopt,I gm.opt.I LS,opt,I
ω
t.I
Conclusion
• Inductive Specified Technique
• Current Specified Technique
Q
s
Ls
ω
t.Ls
Lg Cgs Wopt,Ls gm.opt.Ls ρ ID.Ls
Q
s
ID p Lg Cgs Wopt,I gm.opt.I LS,opt,I
ω
t.I
Same Results for Same Numbers from the two techniques
Conclusion
• Inductive Specified Technique
• Current Specified Technique
Q
s
Ls
ω
t.Ls
Lg Cgs Wopt,Ls gm.opt.Ls ρ ID.Ls
Q
s
ID p Lg Cgs Wopt,I gm.opt.I LS,opt,I
ω
t.I
Same Results for Same Numbers from the two techniques
Noise minimization for different values than those for Power Matching X
Conclusion
• Inductive Specified Technique
• Current Specified Technique
Q
s
Ls
ω
t.Ls
Lg Cgs Wopt,Ls gm.opt.Ls ρ ID.Ls
Q
s
ID p Lg Cgs Wopt,I gm.opt.I LS,opt,I
ω
t.I
Same Results for Same Numbers from the two techniques
Future Work:
Work for Linearity Include all the theory in a toolkit for giving Guidelines
Noise minimization for different values than those for Power Matching X
References
[1] Hashemi, H. and Hajimiri A., “Concurrent multiband low-noise amplifiers-theory, design and applications,” IEEE Trans. Mircrowave theory and techniques,52(1), pp.288–301, 2002.[2] Lee, T.H. The design of CMOS Radio Frequency Integrated Circuits., Cambridge Univ. Press, Cambridge, 1998.[3] Voinigescu, S. P., Maliepaard, M.C., Showell, J.L., Babcock, G.E., Marchesan, D., Schroter, M., Schvan, P. and Harame, D.L. “A scalable high-frequency noise model for bipolar transistors with application optimal transistor sizing for low-noise amplifier design,” IEEE J. Solid-State Circuits,32(9), pp.1430–1439, 1997.[4] Shaeffer, D. K. and Lee, T.H., “A 1.5 V, 1.5 GHz CMOS low noise amplifier,” IEEE J. Solid-State Circuits,32(5),745–758,1997.[5] Andreani P. Sjöland H., “Noise optimization of an inductively degenerated CMOS low noise amplifier,” IEEE Trans. Circuits Syst., 48, pp.835–841, Sept. 2001.
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