Proceedings of the 1st IEEE InternationalConference on Nano/Micro Engineered and Molecular Systems

January 18 - 21, 2006, Zhuhai, China

A Flip-chip Assembled Microplatform for Hybrid MEMS

Mei Yang1'2, Jing Chent'2 *, Yilong Haot

'Institute ofMicroelectronics, Peking University, China

2State Key Laboratories of Transducer Technology, Chinese Academy ofSciences, China

Abstract-As MicroElectroMechanical Systems become morecomplicated, building them as integrated systems may not bepossible and exploring new microassembly technologies becomesnecessary. A novel flip-chip assembled microplatform combinedwith a microjig and alignment pairs is presented, both of whichare fabricated with room-temperature, non-aggressive processesthat can accommodate a board range of devices. With anoptimized assembly sequence, 3pm in plane position accuracy hasbeen achieved by flip-chip positioning, coarse alignment and finealignment enabled by various mechanisms. Moreover, thedistance in Z axis can also be pinpoined. Sufficient mechanicaland electrical connections have been formed at bonds. It can beapplied to various microcomponent and substrate materialcombinations, enabling hybrid MEMS efficiently andeconomically.

Keywords- Microassembly, microjig, electroplating, surfacetension, self-alignment, surface treatment, soldering

I. INTRODUCTION

Although MEMS technologies evolved from ICtechnologies, their materials, fabrication technologies,packaging and interconnection techniques differ greatly andsevere incompatibility imposes. As the trend for MEMS tobecome more functional and more complex continues, there isa need for assembling hybrid devices. The eventual success ofhybrid MEMS critically depends on the ability to economicallyhandling small parts, which are used in micromechanics,electronics, photonics, etc., to construct 3D microstructures ormicrosystem. With the scaling of the devices, the majorchallenge is the dominance of adhesion effects, which aredifficult to control. [1,2]

An example of wafer level assembly was reported in [3],which is a flip-chip transfer and assembly process followed byremoval of initial silicon substrates. But the post-assemblyrelease hassle and the mismatch of wafer size with differenttechnologies seriously restrict its applications.

Chip level assembly can be realized with a commercial flip-chip bonder used for chip orientation and alignment [4]. Chipsare picked and placed with a specially designed vacuum tool,which is doable for IC but not feasible with MEMS, becausethe change in pressure (to vacuum) is devastating to delicateMEMS microstructures, which are usually difficult to grasp.

Some research has been performed to integrate chips inliquid environment using self assembly technique. A selfassembly process of multiple batches of micro components

onto a single substrate was reported in [5]. The positioningaccuracy can be as high as 0.2pm, however, the poor alignmentdirectivity, vertical tilt and the relatively large binding sitessuggests it is not mature.

As an alternative, we have demonstrated a novel, simple,repeatable and economical post-process flip-chip assembledmicroplatform that was developed with existingmicrofabrication processes, which is highly modular and costefficient. A range of devices can be accommodated on themicroplatform and merged with the substrate with the same ordifferent technologies. High alignment accuracy in 3dimensions (XYZ) is achieved by multiple alignments stepswith different mechanism.

II. ASSEMBLY MECHANISMThe assembly mechanism is shown in Fig. 1. The design

strategy is to fabricate micro-devices on the microplatform,which are then flip-chip assembled to a substrate, makingelectrical and mechanical connections at certain bonds.Microjig and other auxiliary structures are designed toaccommodate the assembly. However, to better illustrate thetechnology, no real device is fabricated in this paper. Asillustrated in Fig. 1, the small chip (referred as "microplatform"hereafter) is flipped down and assembled to the other (referredas "substrate" hereafter). SU8 micro jigs and trenches forcoarse alignment are fabricated on the substrate as well as Snsolder bumps electroplated for mechanical and electricalinterconnection. The platform is equipped with correspondingaligned bars and solder bumps [Fig 1-(a)]. The assemblyconsists of 3 stages with different alignment mechanisms.

The first stage is flip-chip positioning. In this stage, DIwater is dropped into the micro jig as buffer layer, and then themicroplatform is flipped and positioned into the micro jig,facing the substrate [Fig 1-(a)].

The second stage is coarse alignment. In this stage, thecoarse alignment bars will be automatically aligned with thetrenches on the substrate with proper binding design thanks tothe surface tension of DI water, sometimes a probe station isused to remedy the misalignment. After that, water is aspiratedand the aligned bars fall into the trenches, the solder bumps onthe two opposite chips are contacted with each other. Coarsealignment pairs design is crucial to ease the operation andensure accuracy in X, Y and 0 direction. Fig. 2 illustrated twodifferent designs. 5pm alignment accuracy can be achievedafter this step [Fig 1-(b)].

This project wasfunded by State Key Laboratories ofTransducerTechnologyfunding ofChinese Academy ofSciences (Project code: sktO5O4).

*Contact author:Jchen@ime.pku.edu.cn.

1-4244-0140-2/06/$20.00 C)2006 IEEE 563

The third stage is solder reflowing and fine alignment. Inthis stage, the assembled substrate is moved to a hotplate forsolder reflowing, the surface tension restoring force will drivethe misaligned solder joint to become a well-aligned joint inorder to minimize the energy of the assembly, submicronalignment accuracy is expected after a good reflow[Fig 1-(c)].During the reflow, forces are also generated in the Z axis topull the microplatform down to the substrate, so that thealignment bars intimately contact the bottom of the trenches,thus define the height of the assembly, which is crucial in manyapplications.

A. Process Flows ofthe microplatform and the microjig onthe substrateThe fabrication flow of the microplatform is briefly

described in Fig. 3. Daisy chains are utilized to evaluate theelectrical resistance of interconnections. The fabrication startswith a 4' glass wafer. A composite layer of Ti-Au-Ti is firstsputtered on the substrate, and the top Ti layer is patterned todefine the interconnections [Fig. 3 (a)]. Then Sn solder iselectroplated, followed by Au aligned bars electroplating, asshown in Fig. 3(b)-(c). Finally, the seed layer is stripped andthe glass wafer is diced into 2x3 mm square chips for theassembly.

alignment bar

Microplatform /I

solder umps

Substrate X <

trenches SU8 micro jig

(a) Flip-chip positioning

E(b) Coarse Alignment

(c) Solder reflow and fine alignment

_. .A miciropatform A

sbstrate -

(d) Top view of the assembled devices

(a) Patterning of Top Ti Layer (b) Electroplating of Sn Solder

Figure 1. Schematics of the assembly mechanism. (a) Flip-chip positioning.(b) Coarse alignment. (c) Solder reflow and fine alignment. (d) top view of

the assembled devices.

(c) Electroplating of Au AlignmentBars (d) Stripping of Seed Layer

Glass Ti Au Sn SU-8

(a) (b)Figure 2. Coarse alignment pairs.

III. FABRICATION PROCESSThe microjig is fabricated on the silicon substrate, while the

microplatform is on the glass substrate, and a post process SU8surface modification is conducted to accommodate theassembly. A fundamental goal of this work has been to enabletransfer of devices to and from standard commercial processes.To this end, emphasis is placed on room-temperature, non-aggressive processes.

Figure 3. Fabrication flow of themicroplatform. (a) Patterning of Ti layer.(b) Electroplating of solder. (c) Electroplating ofAu alignment bars. (d)

Stripping of seed layer.

B. Process Flows ofthe microjig on the substrateThe fabrication flow of the microjig on the substrate is

briefly described in Fig. 4. The substrate chip is fabricated on asingle side polished 4' silicon wafer. A thermal oxidation layerof 3000A is deposited to form a hydrophilic surface on thesilicon wafer. Next, a Ti-Au-Cr composite layer is sputtered,followed by patterning of the top Cr layer to define theinterconnections, as shown in Fig. 4 (a). The Au layer is thenpatterned to define alignment trenches, and Sn solder iselectroplated on the substrate [Fig. 4 (b)-(c)]. After that theTi/SiO2 is removed by diluted HF, followed by patterning ofSU8 micro jig, as shown in Fig. 4(e). Finally, the trenches areetched with DRIE and the wafer is diced into 5x5 mm squarechips for the assembly. [Fig. 4 (f)].

564

(a) Patterning of Cr Layer (b) Patteriing of Au Layer

(c) Electroplating ot Sn Solder (d) R1emoval of Ti & SiO2

(e) Patterning of SU8 Micro Jig (f) DRIE Etch of Trenches

Si SiO2 Ti Au Cr AZ4620 Sn SU-8

Figure 4. Fabrication flow of the substrate (a)patterning of Cr layer. (b)Patterning ofAu layer. (c) Electroplating of Sn solder. (d) Removal of Ti &

SiO2. (d) Patterning of SU8 micro jig. (e) DRIE etch of trenches.

(a) (b)

The pictures in Fig. 5 illustrate the contact angle changesrelated to oxygen plasma-treated time. Fig. 5(a) shows surfaceafter Iminutes oxygen plasma treating, the contact angle issmaller. From Fig. 5(b), we can see this tendency more clearly.

One thing to mention is that SU8 films tend to absorb thewater in the air and this also greatly influences the contactangle of SU8. Comparing the samples with the same plasmatreatment, as revealed in Fig. 5(c) and Fig. 5(d), it is obviousthat after 24 hours, the contact angle becomes larger. But thecontact angle of the sample kept in a dry box remains the same.So, for the application of the microjig, the oxygen treatingprocess should be arranged right before flip-chip assembly orthe treated chips should be kept in a dry box.

(a) (b)

Figure 6. Substrate chip and microplatform chip. (a) substrate chip. (b)microplatform chip.

Figure 7. SEM ofMEMS chips with a close-up view of alignment trenches

(c) (d)Figure 5. Contact angles changed with the duration of oxygen plasma-treatment (a) contact angle after 1 minutes treating(right) compared with

normal contact angle, (b) contact angle after 1, 2, 3 minutes treating (from leftto right), (c) 3 minutes treated chip after 24 hours (d) 3 minutes treated chip

after 24 hours in dry box

C. SU8 Surface ModificationBefore assembly, the SU8 microjig is treated in oxygen

plasma, the surface changes from hydrophobic to hydrophilicto keep the DI water within the jig. [6, 7]

Figure 8. Probe station.

565

Figure 9. Assembled microplatform.

IV. EXPERIMENT RESULTS144 types of substrate samples and 312 types of

microplatform samples are fabricated for the assembly. Themicrojig on the substrate and the microplatform are shown inFig. 6. On the substrate, the microjig is composed of eightsquare SU8 pillars, with the height of 50tm. The triangles onthe substrate and microplatform are alignment bars andtrenches respectively, and solder bumps are in the center ofthese chips. Fig 7 shows the SEM of microjig with a close-upview of aligned trenches, and t he depth of the trench is 1Opm.

The alignment is done on a probe station as depicted in Fig.8, 5pim accuracy can be achieved in a repeatable way. Theassembled microplatform is shown in Fig. 9, as shown in thetop left corner, the alignment bars fall into the trenches, and theright picture depicts the well aligned solder bumps distinctly.According to the layout of design, the accuracy is better than3pim.

To evaluate the electrical resistance of this assembly, daisychains are fabricated on both substrate and microplatform chips.Once the chips assembled, all solder bumps are connected,creating a continuous resistance network. In this assembly, fourdifferent networks are designed to test the electrical resistance,as shown in Fig. 9. The resistance of each network is shown inTab. 1. And the average contact resistance of an individualsolder bump pair is 11.7 ohm, which can be reduced by bettercontrol of soldering.

TABLE I. CONTACT RESISTANCE OF EACH RSISTANCE NETWORK

Resistance NetworkNetwork I Network 2 Network 3 Network 4

V. CONCLUSIONWe have demonstrated a novel post-process flip-chip

assembled microplatform combined with a microjig andalignment pairs based on surface modulation for self-assembly.Presented are the assembly mechanism, pattern design,fabrication, and assembly of this technique. This technique ishighly modular and cost efficient, can be used for hybridMEMS. And the whole process is developed with existingmicrofabrication processes, which is room-temperature, non-aggressive. High alignment accuracy of better than 3pim isachieved by multiple alignments steps with differentmechanism, and the average contact resistance of an individualsolder bump pair is 11.7 ohm.

ACKNOWLEDGMENTThe authors are grateful to Ying Wang for fabrication

process, and Qingyu Sun and Yexian Wu for their help with theelectroplating and SU8 fabrication. They also thank themembers of the Institute of Microelectronics in PekingUniversity and the staff and users of National Key Laboratoryof Micro/Nano Fabrication Technology in Peking Universityfor their help and support.

REFERENCES[1] Hsu, T.-R., "Packaging design of microsystems and meso-scale

devices," IEEE Trans. Advanced Packaging 23(4) (2000), pp. 596-601.[2] Kovacs, G. T. A., "Micromachined Transducers Sourcebook," McGraw-

Hill, New York, 1998.[3] Bryzek J. , Flannery A., Skurnik D., "Integrating

microelectromechanical systems with integrated circuits,"Instrumentation & Measurement Magazine, IEEE, Vol 7. Issue 2, pp.51-59, June 2004.

[4] Qing Tan, Lee, Y.C.,"Soldering technology for optoelectronicpackaging", Electronic Components and Technology Conference, 1996.Proceedings., 46th., pp.26- 36, 28-31 May 1996.

[5] Uthara Srinivasan, Dorian Liepmann, "Microstructure to SubstrateSelf-Assembly Using Capillary Forces" , Journal ofMicroelectromechanical Systems, VOL 10, NO 1, March 2001,ppl7-23.

[6] Karl F Bohringer,"Surface modification and modulation inmicrostructures: controlling protein adsorption, monolayer desorptionand micro-self-assembly", J. Micromech. Microeng., 13 June 2003,13(2003)S1-SI

[7] Xuanke Chen , "Fabrication of Three-dimensional Devices withElectron Beam Lithography and Surface Treatment for Application",National Taiwan University, 2003, MS thesis, pp.73-75

Numbers of bump pairs

Contact resistance(e)Average resistance(e)

4 6

67.7 50.6 57.8 57.5

16.9 8.4 7.2 28.8

566