NIETJOURNALoFENGINEERING&TECHNOLOGY

Winter 2011

DESIGN OF PHASECOMPENSATION CIRCUITS FOR

MULTISTAGE OP-AMP

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Rishi Singh a/ S P Singh' Dr VKPande/

Abstract Introduction

The technique of compensation is used to providestability to rather unstable systems, which become sodue to obvious use of the closed loop feedback. Thecapacitor in feedback path that decreases the flow ofcurrent through main feed forward path at variousfrequencies, causes the path of low reactance infeedback loop. This effect introduces the phase errorwithin the circuit. In this paper compensation strategyhas been simulated to overcome this effect.Simulation result shows an improvement upto 35degrees.

'Department of Electronics & CommunicationEngineering Noida Institute ofEngineering & Technology, Gr. Noida

The general configuration that is used for theapplication of the op-amp is closed loop. It is touse the relatively high, inaccurate forward gainwith feedback for achieving a highly accuratetransfer function which is in turn the function offeedback elements only. The figure belowdepicts the negative feedback configuration.The amplifier gain is the open loop, differentialvoltage gain denoted by A(s). The transferfunction for the feedback is F(s). The systemloop gain is given byLoop Gain, L(s) = -A(s)F(s)The utmost requirement here is that the signalfed back to the input of the op-amp be of suchamplitude and phase that it does not keepregenerating itself around the loop. Theequation for this requirement is as below:-

'Department of Electronics & CommunicationEngineering Noida Institute ofEngineering & Technology, Gr. Noida

'Department of Electronics & CommunicationEngineering Noida Institute ofEngineering & Technology, Gr. Noida

IPA~(s;))~~=~Vo(S)Vin(s) ++

IA(jwo')F(jwo') I = IL(jwo') 1<1here co o' is defined as, Arg[-A(jo)o')F(jwoJ Arg L(j(uoJ = 0°

If the above condition is met, then the feedbacksystem is stable i.e. sustained oscillation cannotoccur. The requirement for stability is that theIAUw)FUw) Icurve crosses the 0 dB point beforethe Arg[-AUw)FUw)] reaches 0°. A measure ofstability is given by the value of the phase whenIAUw)FUw) I is unity, 0 dB. This measure is calledthe phase margin and is described by thefollowing relationship:

Phase Margin, <pM = Arg[-AUw_(O dB)) FUw_(OdB))] = Arg[LUw_(O dB))]

Compensation technique used

The compensation technique is employed in themultistage (two and three stage) op-amp here.Let gml , gmll and gmlll be the respectivetransconductances of two stage and three stageop-amps here. This technique is applied byconnecting a capacitor from the output to theinput ofthe second transconductance stage. Theresulting small signal model for the two stagecase is depicted in the figure below:-

Ce0-

+

Vout

Fig.2

Two results are evident from adding thecompensation capacitor CC. First, the effectivecapacitance shunting RI is increased by theadditive amount of approximately gmIIRIICC.This moves pole p1 closer to the origin ofcomplex frequency plane by a significantamount. Second, pole p2 is moved away fromthe origin of the complex frequency plane,resulting from the negative feedback reducingthe output resistance of the second stage. Thetwo compensated poles are given as below:-

(-1)p1 ~

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and

P2 ~ C1 CII+CI c.r c, CIIIn case, if CII is much greater than C1 and if Ce is

greater than C" then above equation becomesas below:-P ~ -gmll

2 CIIIt is to be noted here that a zero occurs on thepositive real axis of the complex frequency planeand is due to the feedforward path through Ce·

The right half plane zero is located at:

The figure below shows the two stage and threestage cmos op-amps with the compensation.The next section includes the simulations andthe results.

Simulation and Results

Fig.3 Two stage CMOS op-amp

Fig.4 Three stage CMOS op-amp

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Fig. 5 Simulation result for two stage op-amp

The fig.5 shows the simulation result for circuitshown in fig.3. The phase margin is 500

, whichis in the stability criteria.

Fig. 6 Simulation result for three stage op-amp

The fig.6 shows the simulation result for circuitshown in figA. The phase margin is 600

,

improved and within the stability criteria.

Conclusion

The simulation results above show that the

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phase error has been reduced upto therequired range. The phase margin is seen to bewithin the range of 45 0 - 600 which is the desiredcriteria for circuit stability. However, thereduction in phase margin causes decrease inthe bandwidth of the circuit. This could be thefuture improvement aspect of the paper.

DO

REFERENCES1 P.Allen and D. Holberg, CMOS Analog Circuit

Design, second edition, Oxford University Press.

2 D.K.Mishra & U.B.S.Chandrawat. "Fast settling

opamp with low power consumption".

Inter.J.Elect., Taylor & Francis.94.pp.683-698,

2007.

3 D.K.Mishra & U.B.S.Chandrawat. "Designprocedure for two stage CMOS opamp withoptimum balancing of speed power &noise" .lnter.J.Elect,Taylor&Francis. VoI.OO,No.Omonth 2009,1-15.

4 G. Palmisano and G. Palumbo, "An optimizedcompensation strategy for two stage CMOS OPAMPS," IEEE Trans. Circuits Syst. I, vol. 42,pp.178-182, Mar. 1995.

5 R. Eschauzier and J. Huijsing, FrequencyCompensation Techniques for

Low-Power Operational Amplifiers. Norwell, MA:Kluwer, 1995.

6 R. Eschauzier and J. Huijsing, "A 100-MHz 100-dB operational amplifierwith multi path nested miller compensation," IEEEJ. Solid-StateCircuits, vol. 27, pp. 1709-1716, Dec. 1992.

ODD

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