hybrid modulated reconfigurable bidirectional...
TRANSCRIPT
Hybrid Modulated Reconfigurable Bidirectional CLLC Converter for V2G Enabled PEV Charging
ApplicationsUmar Khalid, Dongdong Shu, and Haoyu Wang, Senior Member, IEEE
School of Information Science and Technology ShanghaiTech University, Shanghai, China
Abstract— In wide voltage range applications such as vehicle-to-grid enabled onboard charging, conventional frequency modulated bidirectional CLLC topology has its intrinsic limitations. Its frequency span is extremely wide and the soft switching feature might get lost. To cope with this issue, this paper proposes a novel reconfigurable bidirectional CLLC derived resonant topology. The reconfiguration of half-bridge and full-bridge is enabled on both the primary and secondary sides to extend its voltage gain range. Pulse width and frequency hybrid modulation is adopted to narrow down its switching frequency span. The operating principles, circuit modeling, and the design methodology are presented in detail. A simulation model of 1 kW rated converter is built to realize an efficient power conversion between 400 V dc bus and 100-440 Vdc battery pack. The simulation results validate the effectiveness of the proposed topology and modulation method.
Keywords—Bidirectional DC/DC converter; CLLC; plug-in electric vehicle (PEV), pulse frequency modulation (PFM); pulse width modulation (PWM);
I. INTRODUCTION
In vehicle-to-grid (V2G) enabled plug-in electric vehicles (PEVs), a bidirectional dc/dc converter is required to achieve the bidirectional power flow between the dc link and the high voltage battery pack (250V-420V) [1], [2]. CLLC resonant topology is the combination of dual-active-bridge (DAB) converter and LLC resonant converter and inherits the merits of both topologies. It is featured with soft-switching, high power density and controlled bidirectional energy flow [3], [4]. Therefore, it is considered an attractive candidate in V2G applications, and has attracted wide research attention in academia. However, for deeply depleted scenarios, the battery pack voltage might go down to 100V [5], [6]. This requires an ultra-wide voltage range of the CLLC converter (100V-420V). Hence, significant challenges are brought to the optimal design of the bidirectional CLLC converter.
Reference [2] proposes a design methodology for CLLC bidirectional converter. A 3.5 kW prototype is designed with 250V-450 V output range. In [4], a bidirectional CLLC converter with synchronous rectification is proposed for PEV charging applications. A 3.3 kW prototype is designed with 250-420 V output range. Reference [7] conducts a comprehensive analysis of the CLLC bidirectional converters. It proposes an optimal design for 1 kW prototype that meets the voltage range of 200V-420 V for charging mode, and input range of 350V-420 V in discharging mode. In [8], a three-port bidirectional CLLC
resonant converter for PEV hybrid energy management system is proposed. The target application is PEV battery charging with 250V-420V voltage range. In [9], a bidirectional on-board charger architecture is proposed, and a 6.6 kW prototype is constructed to meet the voltage range of 250V-450 V. A 5 kW bidirectional converter prototyped in [10] exhibits 97.1 % peak efficiency with limited voltage range.
Although research has been done on topologies, design methodologies, control strategies, most of the state-of-the-art are focusing on the charging/discharging of 200-420V onboard battery pack. In [11]–[14], the proposed LLC converters suffer from limited output voltage range. The techniques proposed in [6], [15], [16] demonstrate ultra wide voltage range, and are adaptive to depleted battery scenarios. However, they are unsuitable for bidirectional applications. Moreover, the addition of extra components increases the system size and hardware cost.
In this paper, a reconfigurable CLLC topology is proposed. PWM is introduced to the secondary side auxiliary MOSFET, which makes the voltage regulation weakly dependent on the load. The main CLLC topology is designed to work at its resonant frequency under most of the load conditions. The ZVS range is effectively extended. Furthermore, by making the auxiliary MOSFET constantly on/off, both the primary and secondary sides switch networks can reconfigure between half and full bridges structures. This helps to further extend the voltage gain range. Last but not least, in extreme voltage scenarios, PFM can be activated to further extend the voltage gain range. To summarize, the benefits of the proposed topology include 1) ultra-wide voltage gain range, 2) extended zero voltage switching range, 3) symmetric structure and power flow regulation, and 4) PWM weakly dependent on load.
II. TOPOLOGY DERIVATION AND OPERATION PRINCIPLES
The circuit configuration of the proposed dc/dc converter is shown in Fig. 1. The resonant tank achieves the desired soft switching feature of ZVS+ZCS. Both the power flow directions
VDC
R Vo
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1
vab
ip im
C1
C2
S5
S6
S7
S8
S9
S11
Ls
Cs
n:1
is vcd
ico
S10
S12vh1vh2
ih1
Fig. 1. Schematic of the proposed reconfigurable bidirectional PWM-CLLC topology.
978-1-5386-8330-9/19/$31.00 ©2019 IEEE 3332
are modulated under PFM and PWM. The extra wide voltage range applications is ensured with dc link constant voltage of 400V and 100V-440V at the output. The control strategies for the grid-to-vehicle (G2V) and V2G modes are demonstrated in Tables I and II respectively. In G2V mode, the output voltage range of 100V-440Vdc has been met with a constant input voltage of 400V with a 2:1 turns ratio transformer. The control characteristics described above has been further explained in Figs. 1 and 2.
The operational principle of the V2G mode is similar to G2V mode. Thus, only G2V mode is discussed in this paper. PWM modes can be further divided into PWM mode 1 and PWM mode 2 and their steady state waveforms are plotted in Figs. 4 and 5 respectively. The corresponding equivalent circuits are shown in Fig. 6 for PWM mode 2. The switching frequency of S11 is also equal to fr. On the secondary side, a minor phase shift
(tdelay) is introduced between the turning on of S11 and tdead, S12 is set to be in a normally open or normally closed state. This makes sure that the body diode of S11 conducts earlier in case of G2V mode than the turn-on of the S11. Generally, the duty cycle of vgs11 (D) should be controlled within the range of (0.5 , 1].
Detailed operational stages in PWM mode 2 has been briefed here. In Fig. 5 for PWM mode 2, S12 is set to be in a normally open state. Stage I starts at t0 when S1,4 are turned-off. Stage I is within the tdead of S1-4. The voltage vab decreases from VDC. ip charges the output capacitors (Coss) of S2,3 and discharges Coss of S1,4. Since Coss is comparatively smaller, ip can be realized as a constant, and vab decrease linearly as shown in Fig. 6. (a). In the stage II, S1,4 are turned on with ZVS, The secondary side will operate in half bridge. The voltage vab decreases to -VDC, and the voltage vcd decreases at the same time. The equivalent circuit is shown in Fig. 6. (b).
400V 200V
100V
400V
440V
DC Link Voltage Output Voltage CLLC Resonant Gain
1.1
1.0
1.0
1.0
PFM Mode
PWM Mode 2
PWM Mode 1
Fig.2. G2V mode control characteristics.
400V200V
100V
400V
440V
DC Link VoltageInput Voltage (Battery Voltage)
CLLC Resonant Gain
0.9
1.0
1.0
1.0
PFM Mode
PWM Mode 1
PWM Mode 2
Fig. 3. V2G mode control characteristics.
TABLE I G2V MODE CONTROL AND CONFIGURATION CHARACTERISTICS
Vo (V) Modulation
mode Inverter
configuration Rectifier
configuration Switching frequency
100-200
PWM mode 1
Half bridge PWM of S11 fr
200-400
PWM mode 2
Full bridge PWM of S11 fr
400-440
PFM Full bridge Voltage doubler
Below fr
TABLE II V2G MODE CONTROL AND CONFIGURATION CHARACTERISTICS
Vin (V) Modulation
mode Inverter
Configuration Rectifier
Configuration Switching frequency
100-200
PWM mode 2
Full bridge PWM of
S9 fr
200-400
PWM mode 2
Half bridge PWM of
S9 fr
400-440
PFM Half bridge Full bridge Above fr
vgs9 vgs10
vgs3vgs4
vgs11
dTs
vgs12
vgs
vgs
vgs
vgs
vgs1 vgs2 vgs
t1 t4 t5 t6 t7 t8t3t0 t2
tdelay
Fig.4. Gate drive patterns in PWM mode 1 of G2V mode.
t4 t5 t6 t7 t8t3t0 t1 t2
vgs
vgs
vab
vh1
is
ip
iD6
vcd
im
iD7
iD8
ih1
vgs2, vgs3
vgs11
dTs
vgsvgs9
vgs
vgs10
vgs1,vgs4
vgs12
tdelay
Fig.5. Operational principle in PWM mode 2 of G2V mode.
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In the stage III, S11 are turned off, the secondary side will operate in the full bridge mode. the voltage vcd decreases to -Vo as shown in Fig. 6.(c). The current of the secondary side is decrease. When the current is decrease to zero, the stage IV begins. In this stage, the current of the magnetic inductance im increase with the positive voltage. In the secondary side, the output capacitors (Coss) of S5,8 are charged, and Coss of S11 are discharged. Since S1,4 are still on, is remains zero. Therefore, the power devices on the secondary side are not ON. The leakage inductance Ls resonant with the output capacitors (Coss) of the switches as shown in Fig. 6 (d). Stage IV ends when S1,4 are turned off.
Since the positive current of the magnetic inductance can discharge the output capacitors of the S2,3 in stage V as shown in Fig. 6 (e). The current of the magnetic inductance Lm decrease because of the negative voltage. In the stage VI. D6 and S12 both conduct. The output capacitor of S11 is discharged. S2,3 are turned on with ZVS, the output capacitor of S11 is discharged with the negative current of the secondary side as shown in Fig. 6 (f). In stage VII, S11 is turned on. It is obvious that the conduction of S11’s body diode in the former stage forms the ZVS state for the turning-on of S11 as shown in Fig. 6 (g). In stage VIII, the current of the secondary side decrease to zero, the output capacitor of S6 is charged. Stage VIII ends when S2,3 are turned off as shown in Fig. 6 (h).
During PFM in G2V mode, the converter operates at a frequency lower than its designed resonant frequency (fr). For
the V2G mode, the converter operates under PFM mode for certain load conditions, where operating frequency is higher than the resonant frequency.
III. DESIGN CONSIDERATIONS
A. Gain Analysis
In PWM mode, the voltage at the output of the rectifying stage is a loose function of the load. Only stages II, III, VII are used to deliver the power. Fig. 7 shows the change in the output voltage in the G2V mode with respect to the duty cycle of Vgs11. It is worth mentioning that capacitor voltage (VC4) is not strongly dependent on the effective load resistance of the rectifier. Also, the duty cycle of the auxiliary switch at the secondary side has no effect on VC4.
To calculate the gain in PFM mode for G2V and V2G modes, equivalent circuits are shown in Fig. 8. Gain expressions expressed here are based on analysis done in [9].
In the PFM mode for G2V mode, primary side acts as a full bridge inverter while secondary side acts as a voltage doubler rectifier. G2V mode gain (GG2V) can be expressed as,
02 (FBVD) 2 2
2G V
DC
VG
V n a b= =
+ (1)
VDC
R Vo
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1C1
C2
S5
S6
S7
S8
Ls
Cs
n:1
VDC
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1C1 S5
S6
S7
S8
Ls
Cs
n:1
VDC
R Vo
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1C1
C2
S5
S6
S7
S8
Ls
Cs
n:1
VDC
R Vo
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1C1
C2
S5
S6
S7
S8
S9
S11
Ls
Cs
n:1
VDC
R Vo
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1C1
C2
S5
S6
S7
S8
Ls
Cs
n:1
VDC
R Vo
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1C1
C2
S5
S6
S7
S8
Ls
Cs
n:1
VDC
Lp
Cp
Lm
S4
S3
S2
S1C1
R Vo
C3
C4
S5
S6
S7
S8
Ls
Cs
n:1
(e) Stage V [t4, t5)
(f) Stage VI [t5, t6)
(g) Stage VII [t6, t7)
(h) Stage VIII [t7, t8)
(a) Stage I [t0, t1)
(b) Stage II [t1, t2)
(c) Stage III [t2, t3)
(d) Stage IV [t3, t4)
R Vo
S10
S9S10
S12
S11 S12
S9S10
S11 S12
S9S10
S11 S12
S9S10
S11 S12
S9S10C2
C2
S9S10
S11 S12
S11 S12
VDC
R Vo
C3
C4
Lp
Cp
Lm
S4
S3
S2
S1C1
C2
S5
S6
S7
S8
Ls
Cs
n:1
S9S10
S11 S12
Fig 6 Equivalent circuit in PWM mode 2 of G2V mode
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2
1 11a
h hω= + − (2)
3
1 11 1
k Q k Qb k Q
h gh g h ghω
ω ω= + + + − + + −
(3)
' ', , ,m s s s
p p p r
L L Ch k g
L L C
ωω
ω= = = = (4)
1(FBVD)
1,
/p p
r
acp p
L CQ
RL Cω = = (5)
22
1(FBVD) 2 2
4, ' , ' s
ac L s s s
CnR R L n L C
nπ= = = (6)
In PFM mode of V2G mode, the inverter acts as a half bridge while the rectifier acts as a full bridge. The gain of the converter in the V2G mode (GV2G) is expressed as,
2 (HBFB) 2 20 2
DCV G
V nG
V c d= =
+ (7)
2
1 11
' ' 'c
h h ω= + − (8)
3
' 1 1 ' ' 'd 1 1 ' ' '
' ' ' ' ' ' ' ' '
k Q k Qk Q
h g h g h g hω
ω ω= + + + − + + −
(9)
' ''' , ' , 'p pm
s s s
L CLh k g
L L C= = = (10)
1(HBFR)
1' , ' , '
'
/p psr
r acs s
L CQ
RL C
ωω ω
ω= = = (11)
1(FBVD) 2
22 2
8, ' , 'ac L p
pp pR R L C n
n
LC
nπ= = = (12)
B. Soft Switching Performance
To ensure the primary switches turn ON with ZVS, the magnetizing inductor current should be large enough to fully charge/discharge the output capacitors of the MOSFETs during the deadband. The maximum value of Lm as explained in [8], is given as,
16
deadm
oss
TtL
C≤ (13)
Smaller magnetizing inductance may ensure primary side MOSFET ZVS condition, but it may create a high magnetizing current that leads to an increased conduction loss, increased peak voltage requirement for the primary-side capacitor, and increased apparent power requirements for MOSFETs. If the magnetizing inductance is designed to be larger, it limits the value of the magnetizing current. However, it can also affect the voltage gain of the converter and put a constraint on it. Therefore, Lm should be designed with an appropriate range, as it cannot be designed to be too large to limit the voltage gain requirements of the converter.
C. Design Methodology
After defining tdead, and calculating Lm range, the next step is to design the resonant tank parameters. Typically, the efficiency of the bidirectional resonant converter is maximum at fr. Converter is designed to operate at fr under nominal working settings.
In PFM mode, the operational switching frequency range and the voltage gain requirements of the proposed converter is dependent on the inductance ratio h and h’ for G2V and V2G modes respectively given by (4) and (10). To narrow down the fs range of the proposed bidirectional converter, h needs to be minimized. Though, small h leads to large leakage inductance which might incur an increased magnetic components size.
Consider a design example that is used to construct the simulation model, a 1 kW simulation model is considered with an input voltage of 400Vdc and an output voltage of 100∼450Vdc for the battery. The nominal battery voltage is 400Vdc, while the resonant frequency is chosen to be 100 kHz.
Vo
[V]
0100
200300
4000.50.6
0.70.8
0.9
450
350
250
150
1
Fig.7. G2V mode voltage gain in PWM mode versus D.
± VDC
Lp
Cp
Lm
Ls’
Cs’
(a) G2V mode
Rac1
± Vbat
Lp’
Cp’Lm
Ls
Cs
Rac1'
(b) V2G mode
Fig. 8. Equivalent circuit with PFM.
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As the nominal battery voltage is 400 V, the transformer turns ratio is calculated to be 2 as the secondary side can act as the voltage doubler rectifier. For a resonant frequency of 100 kHz, a switch output capacitance of 250 pF, and a dead-time of 200ns, the converters’ magnetizing inductance is calculated as Lm ≤ = 500 µH from (13). This indicates that the magnetizing inductance of 500 µH or less ensures the ZVS on the primary-side MOSFETs. Based on Figs. 9-11, Lm is selected to be 200 µH, and h is designed to be 10 to meet the required PFM gain of
1.10 in the G2V mode. Thus, Lp is 20 µH. Cp can be calculated from the operating resonant frequency and the resonant inductance. Thus, CP ≈ 125 nF.
In order to make the gain curves monotonically decrease and also to fulfill the voltage gain requirements in both modes, g has been selected to be unity in (3). Therefore, C’s = Cp = 125nF and Cs= 500nF. Thus, Ls = 5 µH.
Hence, PFM gain curves for the proposed converter in G2V and V2G modes based on (1) and (7) respectively are shown in Figs. 12. and 13 with the circuit parameters calculated.
IV. RESULTS
To verify the concept, a 1 kW rated converter of is designed and simulated. The projected output voltage range is 100V-440V. The resonant frequency is designed to be 100 kHz. The converter has been designed for the constant input voltage of 400 V in G2V mode and constant output voltage of 400 V in V2G mode. Resistor load is used to emulate the electric profiles of the battery pack during charging and discharging.
Figs. 14–15 shows the simulation results in G2V mode PWM mode 1. Figs. 16–17 shows the simulation results in G2V mode PWM mode 2. Fig. 18 shows the simulation results in G2V mode PFM mode. The output voltage can be regulated from
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0Normalized switching frequency
0.2
0.4
0.6
0.8
1.0
1.2
1.4h=20h=10h=6h=4h=2
Gai
n(n
)
Fig.9. PFM gain in G2V mode with Lm=500 µH, RL=80 Ω.
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0Normalized switching frequency
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8h=20h=10h=6h=4h=2
Gai
n(n)
Fig.10. PFM gain in G2V mode with Lm=400 µH, RL=80 Ω.
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Normalized switching frequency
1
2
3
4
5
6h=20h=10h=6h=4h=2
Gai
n(n
)
Fig.11. PFM gain in G2V mode with Lm=100 µH, RL=80 Ω.
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.00
1
2
3
4
5
6
Normalized switching frequency
GG
2V F
BV
D
Region 3
Region 2
Region 1
Gain Range
RL=25 Ω RL=50 ΩRL=75 ΩRL=100 ΩRL=125 Ω
Fig.12. Gain curves under PFM in G2V mode.
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 20
0.5
1
1.5
2
2.5
3RL=25 Ω RL=50 ΩRL=75 ΩRL=100 ΩRL=125 Ω
Normalized Switching Frequency
GV
2GH
BF
R Region 3
Region 2
Region 1
Gain Range
Fig. 13. Gain curves under PFM in V2G mode.
TABLE III V2G MODE CONTROL AND CONFIGURATION CHARACTERISTICS
Parameters & Components Values Resonant frequency (fr) 100 kHz
Magnetizing inductance (Lm) 200 µH Resonant capacitance (Cp, Cs) 125 nF, 500nF
Resonant inductor (Lp, Ls) 20 µH, 5 µH Turns ratio (np:ns) 30:15
Switch output capacitances (S1-12) 250pF Filter capacitors (C3, C4) 120 nF
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100V to 440V smoothly. Fig. 19 shows the dynamic response when the load resistance step changes with Vo equals 300V. The load resistance step changes from 400Ω to 100Ω, and back to 400Ω. The measured dynamic voltage overshoot is 30V. The simulation results agree well with the theoretical predictions. Zero-voltage-switching is realized among all active MOSFETs in the inverter bridge in both V2G and G2V modes. It should be
-1.5
0
1
1.5
-0.8
0
0.8
-200
0
200
-100
0
100
0 2 4 6 8 10 12 14 16 18 20Time: µs
Vol
tage
:[V
]V
olta
ge:[
V]
Cu
rren
t:[A
]C
urr
ent:
[A]
ILm ILp
ILs
Vab
Vcd
Fig. 14. G2V mode PWM mode 1, DVgs9,10 = 1, DVgs11 = 0, RL= 400Ω, Vo=100V.
-1.5
0
1.5
-10
4
-200
0
200
-150
0
100
0 2 4 6 8 10 12 14 16 18 20
Time: µs
Vol
tage
:[V
]V
olta
ge:[
V]
Cur
ren
t:[A
]C
urre
nt:
[A]
ILm ILp
ILs
Vab
Vcd
Fig.15. G2V mode PWM mode1, DVgs9,10 = 1, DVgs11 = 0.6, RL = 400 Ω, Vo
= 160V.
-3
0
3
-20
8
-500
0
500
-400
0
200
0 2 4 6 8 10 12 14 16 18 20
Time: µs
Vol
tage
:[V
]V
olta
ge:[
V]
Cur
ren
t:[A
]C
urre
nt:
[A]
ILm ILp
ILs
Vab
Vcd
Fig. 16. G2V mode PWM mode2, DVgs9,10 = 0, DVgs11 = 0.6, RL = 400 Ω, Vo = 330V.
-4
0
4
-6
0
6
-500
0
500
-200
0
200
0 2 4 6 8 10 12 14 16 18 20Time: µs
Vol
tage
:[V
]V
olta
ge:[
V]
Cur
ren
t:[A
]C
urre
nt:
[A]
ILm ILp
ILs
Vab
Vcd
Fig. 17. G2V mode PWM mode2, DVgs9,10 = 0, DVgs11 = 1, RL = 200 Ω, Vo = 400V.
-6
0
6
-6
0
6
-500
0
500
-200
0
200
0 5 10 15 20 25 30 35Time: µs
ILm ILp
ILs
Vab
Vcd
Vol
tage
:[V
]V
olta
ge:[
V]
Cu
rren
t:[A
]C
urre
nt:
[A]
Fig. 18. G2V mode PFM mode, DVgs9,10=0, DVgs11=1, RL=400 Ω, Vo=440V, fs= 0.6 f0.
Ou
tput
V
olta
ge[V
]O
utp
ut
Cur
ren
t[A
]
R=400ΩR=100Ω
R=400Ω
30V 30V
Fig. 19. The dynamic response when the load resistance changed in the G2V mode PWM mode 2.
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noted that the auxiliary MOSFETs S10, S12 is set to be in a normally OFF or normally ON state. Therefore, no extra switching losses are introduced.
V. CONCLUSION
In this paper, a reconfigurable bidirectional CLLC topology is proposed for V2G enabled PEV charging applications. Pulse width and frequency hybrid modulation is utilized. PWM is used for one of the auxiliary switchs on the rectifier side that is used to regulate the output voltage. Another auxiliary switch is set to be in a normally open or normally closed state which makes the control more simplier. In the PWM mode, the output voltage control the pulse width of the auxiliary switch. So, only one variable should be considered in this mode. When the converter is operated in the PFM mode, the primary side is in full bridge mode, and the rectifier side is in half bridge which help narrow down the fs range. A simulation model is designed to validate the concept. The output voltage of 100-440V has been achieved with the input voltage of 400V in the G2V mode. Zero voltage switching is realized among all active MOSFETs S1-9 and S11. S10 and S12 are operated in a normally open or normally closed state. So they won’t introduce extra switching loss and control difficulty. Circuit modeling and design considerations are addressed in detail. The proposed concept can also be extended to applications where a wide voltage gain range is required.
ACKNOWLEDGMENT
This work was supported in part by the National Natural Science Foundation of China under Grant 51607113, and in part by the Shanghai Sailing Program under Grant 16YF1407600.
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