ht66fv1x0 integrated audio amplifier application guideline · in a class b amplifier, a single...

HT66FV1x0 Integrated Audio Amplifier Application Guideline

AN0486E V1.00 1 / 14 October 1, 2018


D/N: AN0486E

Introduction The Holtek HT66FV1x0 series of MCUs include a 16-bit DAC for digital volume control, a

class AB audio power amplifier, SPI and UART interfaces, etc., making them applicable

for use in a wide range of home appliances, health care products, security protection and

many other consumer electronic products that require an audio function. As these MCUs

contain an internal 1.5W high power audio amplifier together with digital volume control

functions, they can cater to customers’ demand for high quality sound without requiring an

external power amplifier. With the advantages of simplified external component

requirements and competitive overall costs, the devices should find excellent use in a

wide range of voice playing products.

This text will take the HT66FV1x0 series as an example to introduce the operating

principles, features and usage of the MCU integrated audio power amplifier.

Functional Description A power amplifier is the most basic device in an audio system. Power amplifiers can

amplify a weak input signal from a sound source or a pre-amplifier and then generate a

current large enough to drive the speaker for voice playing. Some common amplifier

types are Class A, Class B, Class AB and Class D.

Class A Principles

Class A is the simplest type. In a Class A amplifier, the output transistor remains in a

conducting state over the entire range of input signal cycle, i.e., the conduction angle is

360 degrees. As Class A amplifiers operate within the linear portion of their individual

characteristic curve, they have less transient distortion and crossover distortion problems,

however with low efficiency. The quiescent operating point of the amplifier is near the

midpoint of the load line. A load characteristic curve directly reflects the relation between

the load voltage and current change. The intersection of the load line and the transistor

output characteristic curve is the quiescent operating point, which is used to analyse the

circuit quiescent point and distortion situations.


AN0486E V1.00 2 / 14 October 1, 2018

ICIC

IC

t

Load Line

Output Waveform

Quiescent Point

Vi Input Waveform

Quiescent Point

VBE VCE

Class A

Class B Principles

The quiescent operating point of a Class B amplifier is located on the output characteristic

curve with a base current of zero, namely the cut-off point of the load line. In a Class B

amplifier, a single output transistor conducts only one half of the input signal cycle, that is,

the conduction angle is 180 degrees. To amplify a complete signal, two transistors are

used, one for the positive output signal and the other for the negative output signal. A

pseudo load, RL, is connected to the amplifier output port, replacing the normal power

receiving component, which is used to debug the power amplifier circuit. After the debug

has been successfully completed, a true load, a speaker is connected. The efficiency of

Class B amplifiers is much improved over Class A amplifiers. However, at the crossover

point from the on to off state of the two transistors, the distortion of Class B is higher.

ICICIC

t

t

Output Waveform

Load Line

Quiescent PointQuiescet

Point

Vi Input Waveform Crossover Distortion

VBE VCE

Class B

Class AB Principles

The Class AB design contains the advantages of both Class A and Class B. The

quiescent operating point of Class AB amplifier, which is lower than Class A but higher

than Class B, is located between the load line midpoint and cut-off point, resulting in

efficiencies higher than Class A and distortion lower than Class B. The conduction angle

is in the range of 180~360 degrees. By biasing the two transistors, when the signal is

close to zero, both transistors are turned on with a relatively small current, which is similar

to Class A. In the case of a large signal, when one of the transistors turns off the other

must turn on. The two transistors are always turned on alternatively, which is similar to

Class B. The crossover distortion of Class B amplifiers is caused by the fact that neither

transistor can conduct when the input signal is in the range of -0.6V~0.6V. In a Class AB

Q1

V+

Q1

RL

V+

V-

Q2


AN0486E V1.00 3 / 14 October 1, 2018

amplifier, a VBB bias is applied between the two transistors to reduce the crossover

distortion.

IC IC

Class B Crossover Distortion

Class AB Crossover Distortion Eliminated

Q2 On

Q1 On Q1 On

Vbe Vbe

Class AB

Class D Principles

Class D amplifiers operate based on an MOS transistor on/off switching. Transistors can

be completely switched on or off in a very short time providing a relatively high efficiency.

However, this switching mode of operation adds distortion to the output signals. The

Class D modulator is a PWM modulator composed of a comparator and a triangle wave

generator. The input signal is filtered by an integrator to generate a corrected signal,

which is used to modulate the triangle wave to produce the modulated square wave

output. A MOSFET driver is used for high power voltage and current amplification after

which the amplified digital signal is filtered by a low-pass filter to restore the analog audio

signal.

Class D Modulator

MOSEFET Driver

Low-pass Filter

Class D

Advantages and Disadvantages Comparison – Class AB Amplifiers vs. Other Power Amplifiers

For Class AB, its efficiency is higher than Class A and its distortion is lower than Class B.

The operating mode of Class D is totally different from Class AB. In a Class D amplifier,

some high frequency harmonics will be generated therefore EMI will be greater. Class AB

amplifiers have a significant cost advantage over Class D amplifiers, because the latter are

usually two or three times the price of the former. In general, Class AB amplifiers have the

advantages of higher efficiency, lower distortion and lower costs, which make them the

most widely used design in audio amplifier applications at present.

Q1

RL

V+

V-

Q2


AN0486E V1.00 4 / 14 October 1, 2018

The advantages and disadvantages of the aforementioned amplifier types are summarised

in the table below.

Class A Class B Class AB Class D Operating Point Location Load line midpoint Load line cut-off point Between load line

midpoint and cut-off point Transistors operate in

a switching mode Conduction Angle θ=360° θ=180° 180°<θ<360° Switching status

Distortion Lower distortion Higher than Class AB with crossover distortion

Crossover distortion can be eliminated Higher distortion

Power Transfer Efficiency

Lowest efficiency, under 50%

Efficiency in the rage of 50%~78.5%

Efficiency in the rage of 50%~78.5%

Highest efficiency, higher than 85%

Main Applications Low power amplifiers with small distortion High power amplifiers General audio speakers High power or high

efficiency amplifiers

Amplifier Electrical Characteristics

The characteristics of the HT66FV1x0 integrated Class AB amplifier is listed in the

following table (Ta=25°C).

Total Harmonic Distortion – THD

When a sinusoidal signal of a particular frequency is input to the power amplifier,

harmonics based on input frequency multiples are generated due to factors such as the

amplifier internal circuit or external component non-linear distortion. The ratio between

the root mean square value of these harmonic amplitudes and the input frequency

amplitude is called the total harmonic distortion.

Noise – N

In addition to the harmonic distortion described above, there might be other interference

caused by circuit and components, such as thermal noise, etc.

The total harmonic distortion and noise are combined to describe the output noise index,

which should be as small as possible. The typical value of (THD+N)/S can be as low as

0.2% for the HTFV1x0 series.

Maximum Output Power – POUT

This character reflects the output capacity of an audio power amplifier. Usually the audio

amplifier manufacturer will provide several product POUT values for certain operating

voltages and rated load conditions. The output power of the MCU integrated power

amplifier is 1.5W when VDD is 5V and (THD+N)/S equals 10%.

Users should select a proper speaker according to the amplifier output power and

impedance. The speaker power is usually a little higher than the amplifier power. It is

suggested that the speaker impedance should match the corresponding load parameters

listed below.


AN0486E V1.00 5 / 14 October 1, 2018

Symbol Parameter Test Condition

Min. Typ. Max. Unit VDD Condition

AVDD_PA Audio Power Amplifier Operating Voltage – – 2.2 – 5.5 V

(THD+N)/S (THD+N)/S 5V 8Ω load, Output power=500mW

– 0.2 – %

POUT Output Power 3V

8Ω load, (THD+N)/S=1% – 410 – mW 8Ω load, (THD+N)/S=10% – 550 – mW

5V 8Ω load, (THD+N)/S=1% – 1200 – mW 8Ω load, (THD+N)/S=10% – 1500 – mW

Note: Sine wave input @1kHz & -6dB.

Operating Principles The HT66FV1x0 includes an integrated Class AB high output power audio amplifier,

which will be introduced in this section. Using its integrated SPI interface the HT66FV1x0

reads digital audio data from the external Flash ROM and writes it into the 16-bit DAC

data registers PLADH and PLADL. Each piece of data will be converted into a

corresponding audio analog voltage signal by the DAC after which the speaker will play

the corresponding sound.

The HT66FV1x0 voice playing function block diagram is shown as follows. DAEN and

PAEN are the DAC and amplifier enable bits respectively, which can be cleared to zero to

reduce power consumption when the voice playing function is not used. The USVC[6:0]

field is used for digital volume adjustment.

PLADH

PLADL

USVC[6:0]

16-bit D/A +Power Amplifier

Speaker

DAEN

8

8

PAEN

Voice Playing Controller Registers The overall voice playing function of the HT66FV1x0 is controlled using a series of

registers. Two control registers exist to control the 16-bit D/A converter and power

amplifier functions together with the speaker mute control. Two data registers exist to

store the data which is to be played.


AN0486E V1.00 6 / 14 October 1, 2018

USVC Register

Bit 7 6 5 4 3 2 1 0 Name MUTEB USVC6 USVC5 USVC4 USVC3 USVC2 USVC1 USVC0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0

Bit7 MUTEB: Speaker mute control 0: Mute speaker output 1: Enable speaker output

This bit is used to enable the speaker function. When this bit is cleared to zero,

the D/A converter and power amplifier will be disabled and the speaker output

will be switched off.

Bit6~0 USVC6~USVC0: Speaker volume control

These bits are used to control the volume which ranges from -32dB to 6dB.

PLAC Register

Bit 7 6 5 4 3 2 1 0 Name – – – – – – PAEN DAEN R/W – – – – – – R/W R/W POR – – – – – – 0 0

Bit7~2 Unimplemented, read as “0”

Bit1 PAEN: Power amplifier enable control 0: Disable 1: Enable

Bit0 DAEN: 16-bit D/A converter enable control 0: Disable 1: Enable

Note that the 16-bit D/A converter and power amplifier will all be disabled when the MCU

enters the IDLE/SLEEP mode.

PLADL Register

Bit 7 6 5 4 3 2 1 0 Name P_D7 P_D6 P_D5 P_D4 P_D3 P_D2 P_D1 P_D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0

Bit7~0 P_D7~P_D0: Paly data low byte register bit7~bit0

This register is used to store the 16-bit play data low byte.


AN0486E V1.00 7 / 14 October 1, 2018

PLADH Register

Bit 7 6 5 4 3 2 1 0 Name P_D15 P_D14 P_D13 P_D12 P_D11 P_D10 P_D9 P_D8 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0

Bit7~0 P_D15~P_D8: Paly data high byte register bit7~bit0

This register is used to store the 16-bit play data high byte. Note that the low byte play

data register should first be modified followed by the high byte play data register being

written if the 16-bit play data is necessary to be updated.

Hardware Description The HT66FV1x0 MCU includes an integrated voice playing controller and voice data

stored in an external SPI Flash ROM can be read via the integrated SPI interface. This

makes voice content changes more convenient. A complete 5V application circuit is

shown below.

AVDD_PA is connected to the VCC power and AVSS_PA is the power amplifier ground

pin. SP+ and SP- are externally connected to a speaker. AUD is the DAC output pin and

AUD_IN is the power amplifier input pin. The audio signal output on the AUD pin will first

be filtered by a low-pass RC filter and then input to the AUD_IN pin via capacitive

coupling. Whether to connect a variable resistor to AUD/AUD_IN is optional according to

the desired volume control method. A 10µF capacitor is connected to the BIAS pin for

bias reference voltage stabilisation and filtering.


AN0486E V1.00 8 / 14 October 1, 2018

Pin Description SP+ Power amplifier output positive end SP- Power amplifier output negative end AUD_IN Power amplifier input BIAS Power amplifier internal reference voltage AUD 16-bit DAC output AVDD_PA Power amplifier positive power supply AVSS_PA Power amplifier negative power supply

PCB Layout Considerations When placing components, priority should be given to the power supply filter

capacitors which should be located as close to the MCU as possible. This is also the

case for the SPI Flash ROM and especially the SPI clock line which should be as short

as possible.

To avoid noise interference caused by instantaneous large currents during audio

amplifier operations, two separate power supplies are required, VDD for digital power

and AVDD_PA for analog power.

The audio amplifier power pin AVDD_PA should be wired directly to the positive power

supply and the line width should not be less than 12mil.

To avoid noise interference caused by instantaneous large currents during audio

amplifier operations, two separate grounds are required, VSS for digital ground and

AVSS_PA for analog ground.

The audio amplifier ground pin AVSS_PA should be wired directly to the negative

power supply and the line width should not be less than 12mil.

The VSS and AVSS_PA are two separate grounds and should be implemented with

copper layers.

Ensure that enough space is reserved for the power and ground lines when placing

components.

The power amplifier outputs, SP+/SP-, tracks should be thick and free of through

holes.

As right angles tend to accumulate charge resulting in point discharge effects, which

can influence the PCB stability, it is better to route tracks using 45-degree angles or

arc angles.


AN0486E V1.00 9 / 14 October 1, 2018

Software Description

Voice Playing Controller Setup

The HT66FV1x0 controls the voice playing function using several registers, as described

below.

1. When the PAEN (PLAC.1) bit is set high, the power amplifier is enabled. When the

DAEN (PLAC.0) bit is set high, the 16-bit D/A converter is enabled.

2. When the MUTEB (USVC.7) bit is set high, the speaker is enabled.

3. There are two methods for volume control.

Analog volume control: Externally connect a variable resistor between the DAC

output pin, AUD, and the power amplifier analog input pin, AUD_IN. The DAC

output signal is first attenuated via the resistor divider and then input to the power

amplifier. This method is suitable for applications which use a rotary knob to adjust

volume.

Digital volume control: Use the USVC6~USVC0 software bits to control the

speaker volume. This can be used to adjust the speaker volume within a range of

+6dB to -32dB. Each stage is 0.5dB for high volume applications or 1dB for low

volume applications.

4. Voice data is stored in the external SPI Flash ROM. The MCU reads voice data from

the SPI Flash using its integrated SPI interface.

5. Each 16-bit section of voice data is placed in the PLADL and PLADH registers. Use a

timer to generate interrupt signals at regular intervals, read the voice data from the SPI

Flash each time an interrupt is generated and write it into the 16-bit DAC. After this the

analog signal amplified by the integrated power amplifier will be output to drive the

speaker to produce sound.

Power Up/Down Pop Noise Elimination

Pop noise is a burst sound resulting from transient effects produced when the audio

device is turned on and during various operations after power up. To avoid the pop noise

caused by these transients, which is generated when the DAC and audio power amplifier

switch on and off, a ramp up and a ramp down procedure is required.

The DAC 16-bit data, which is stored in the PLADH and PLADL registers, should be set

with an initial value of 0000H and the MUTEB bit must first be cleared to zero.

Ramp Up – Start Voice Playing

Set both the PAEN and DAEN bits to “1”, increase the PLADH/PLADL value from 0000H

to 8000H gradually and then set the MUTEB bit high to start playing the voice.


AN0486E V1.00 10 / 14 October 1, 2018

The Ramp up software flowchart is as follows.

Ramp up

Voice playing registers initialisation (PLADL=0;PLADH=0;

MUTEB=0;PAEN=1;DAEN=1;)

PLADH/PLADL=8000H?

Y

N

RET

16-bit voice data (PLADH/PLADL)+1

Enable speaker output (MUTEB=1)

Ramp Down – Finish Voice Playing

First, gradually increase the 16-bit DAC PLADH/PLADL value to 8000H and clear the MUTEB

bit to zero. Then gradually decrease the DAC PLADH/PLADL value from 8000H to 0000H.

Finally turn off the power amplifier and DAC by clearing the PAEN and DAEN bits to zero.


AN0486E V1.00 11 / 14 October 1, 2018

The Ramp down software flowchart is as follows.

Ramp down

PLADH/PLADL=8000H? 16-bit voice data (PLADH/PLADL)+1

Y

Mute speaker output (MUTEB=0)

N

16-bit voice data (PLADH/PLADL)-1

PLADH/PLADL=0000H?

Y

Disable power amplifier (PAEN=0) Disable D/A converter (DAEN=0)

RET

N

Generally speaking, a ramp up or ramp down procedure should take more than 200ms in

order to avoid pop noise effects.

The following program examples of ramp up and ramp down procedures are designed to

solve the pop noise problem produced when the DAC and audio amplifier are turned on

or off. Refer to the following programs where fSYS is set to 8MHz.

Ramp up setup using the ASM language RAMPUP: MOV A,00H MOV PLADL,A ; Initialise the DAC 16-bit data MOV PLADH,A CLR MUTEB ; MUTEB=0, mute speaker output SET PAEN ; Enable power amplifier SET DAEN ; Enable 16-bit D/A converter LOOP1: CALL DELAY_7US MOV A,1 ; Gradually increase PLADH/PLADL from 0000H to 8000H ADDM A,PLADL MOV A,0 ADCM A,PLADH SNZ PLADH.7 JMP LOOP1 SET MUTEB ; Enable speaker output RET


AN0486E V1.00 12 / 14 October 1, 2018

Ramp up setup using the V3 C language void RAMP_UP(void) { _pladl = 0x00; // Initialise the DAC 16-bit data _pladh = 0x00; _usvc = 0x00; // MUTEB=0, mute speaker output _plac = 0x03; // Enable power amplifier and16-bit D/A converter PLAD = 0x0000; while(!(_pladh & 0x80)) // Gradually increase PLADH/PLADL from 0000H to // 8000H { GCC_CLRWDT(); GCC_DELAY(7); PLAD++; _pladl = PLAD; _pladh = PLAD >>8; } _usvc = 0x80; // Enable speaker output }

Ramp down setup using the ASM language RAMPDOWN: SZ PLADH.7 JMP VOICE_OFF MOV A,1 ; Gradually increase PLADH/PLADL to 8000H ADDM A,PLADL MOV A,0 ADCM A,PLADH JMP RAMPDOWN VOICE_OFF: CLR MUTEB ; Mute speaker output LOOP2: CALL DELAY_7US MOV A,0FFH ; Gradually decrease PLADH/PLADL from 8000H to 0000H ADDM A,PLADL MOV A,0FFH ADCM A,PLADH SZ PLADL JMP LOOP2 SZ PLADH JMP LOOP2 CLR PAEN ; Disable power amplifier CLR DAEN ; Disable 16-bit D/A converter RET


AN0486E V1.00 13 / 14 October 1, 2018

Ramp down using the V3 C language void RAMP_DOWN(void) { PLAD =((unsigned int)_pladh<<8) & _pladl; while(!(_pladh & 0x80)) // Gradually increase PLADH/PLADL to 8000H { PLAD++; _pladl = PLAD; _pladh = PLAD >>8; } _usvc = 0x00; //MUTEB=0, mute speaker output while(PLAD) { // Gradually decrease PLADH/PLADL from 8000H to // 0000H GCC_CLRWDT(); GCC_DELAY(7); PLAD--; _pladl = PLAD; _pladh = PLAD >>8; } _plac = 0x00; //Disable power amplifier and 16-bit D/A converter }

Demo Codes Holtek HT8 RSIC architecture MCU demo codes.

V3C language demo code

HT66FV140_V3C.zip

ASM language demo code

HT66FV140_ASM.zip

Conclusion By using this HT66FV1x0 integrated audio power amplifier functional introduction, users

should have a better understanding of the Holtek 8-bit MCU integrated power amplifier

function application.

Versions and Modification Information

Date Author Issue Release and Modification

2018.4.30 蓝爱娣 First version


AN0486E V1.00 14 / 14 October 1, 2018

Reference File The HT66FV130/140/150/160 voice product development application note AN0375E.

For more information refer to the Holtek’s official website www.holtek.com.

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