high-level language for embedded microprocessors

High-level language for embedded microprocessors High-level languages are gradually replacing assembler language for complex

applications. An MPL cross-compiler is presented for cross-software development for the MC6800/6809 family by Jacob Davidson

The importance of high-level languages used in programming embedded microprocessors cannot be overestimated. It has become increasingly undesirable to use assembler language for complex applications, particularly in those areas of process automation which require sophisticated control algorithms. As a result, high-level languages are gradually replacing assembler language. This paper presents the implementation of a number of modifications to an existing high-level language cross-compiler, MPL, to allow efficient cross-soffware development for the Motorola MC6800/MC6809 family of embedded microprocessors. Also included is an example of an interrupt-driven microprocessor application using floating-point calculations, which was developed on a Vax/VMS system with the help of this cross-compiler.

microprocessors embedded systems high-level languages

The majority of embedded realtime microprocessor applications today fall into the category of 8-bit microprocessors and microcontrollers, taking into account that the total code and data for an application rarely exceeds 64 kbyte. The choice of an embedded realtime microprocessor requires an extensive analysis of the require- ments imposed by the control system. Usually, a realtime application is I/O intensive and must provide time-critical response actions for each input I. Equally important for embedded applications is the interrupt response time of the microprocessor and the method of interrupt used2: vector interrupt, autovector, priority interrupt, etc. Microcontrollers and 8-bit microprocessors are usually programmed with the help of a development system containing an assembler, or a cross-assembler, and a set of software tools for linking, debugging and down-loading. Nevertheless, in some applications, their usage is hindered

Mathematics and Computer Sciences Department, University of Quebec in Montreal, PO Box 8888, Station A, Montreal, Quebec, Canada H3C 3P8 Paper received: 15 November 1988. Revised 23 March 1989

by a lack of floating-point calculations and efficient cross- compilers for high-level languages as tools of software development. Several companies now offer c cross- compilers for embedded applications on 8-bit and 16/32- bit microprocessors. The advantage of c lies mainly in its universality, making it the language of choice for systems corn posed of various microprocessors 3. The disadvantages are that a specific c cross-compiler and set of software tools has to be acquired for each type of microprocessor. Also, few c cross-compilers for 8-bit microprocessors have facilities for transcendental and exponential functions (i.e. sinus, cosinus, power of I0 etc.) or for the simple handling of interrupts. This paper presents the modifications implemented on the MPL high-level language cross- compiler for efficient cross-software development of the entire Motorola MC6800/MC6809 family of microprocessors on Vax/VMS or IBM PC systems. The MPL cross-compiler has been supplemented with a translator, a BCD floating-point data type and a ROM-able run-time library for floating-point calculations for transcendental and exponential functions and for I/O subroutines.

MPL HIGH-LEVEL LANGUAGE

For realtime applications several microprocessor manufac- turers have developed their own high-level, realtime languages such as MPL from Motorola or PI_/Vi from Intel. MPL was initially developed for the MC6800 family of microprocessors 4, specifically for realtime applications involving mathematical computations and manipulations of numerical and string data. The result of the compilation of a source program is an assembler code, which can be subsequently translated into a downloadable object code (S0-S9 format) with the help of a cross-assembler. The MPL cross-compiler was initially written in FORTRAN and was available only on IBM mainframes. Following recent modifications, it can now be installed on the majority of existing micro- and mini-computers, including Vax and IBM PC.

The compiler block diagram is presented in Figure I . The initial MPL supported only four data types namely,

0141-9331/89/09569-10 $03.00 © 1989 Butterworth & Co. (Publishers) Ltd

Vol 73 No 9 November "/989 569

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• bit string • single- or double-precision integer binary: BINARY (1)

or BINARY (2) • ASCII numeric • ASCII alphanumeric.

As a subsequent development, a translator was added to MPL to translate all the MC6800 instructions into

their counterpart for the MC6809 microprocessor, and a fifth data type was added to the language, namely a BCD floating-point representation. In addition, a ROM-able run-time library was implemented containing the object code for I/O subroutines, transcendental functions and general floating-point calculations. In its present form MPL can be used for the entire spectrum of MC6800 and MC6809 microprocessors (MC6800, MC6801, MC6802, MC6803, MC6808, MC6809 and MC6811). The compilation and assembly of the new version of MPL is presented in Figure 2.

MPL statements are divided into three categories:

• arithmetic statements (example: C = F(5) + A4) • control statements (example: IF THEN ELSE; GO TO;

D O I = I TO 40 BY 2) • specification statements (example: DECLARE AA

BINARY(I) INIT "55")

Any assembler statement can be directly included in an MPL source file, provided that the first column contains a dollar sign ($).

All other statements can be written in a free format mode to improve the readability of the program. State- ment labels must be followed by a colon (:), and comments can be enclosed between the symbols/* and */, orthe symbol (!) is used in the first column. Subroutine procedures are set up as follows:

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570 Microprocessors and Microsystems

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F L O A T I N G - P O I N T A N D I / O S U B R O U T I N E S

The BCD floating-point representation added to MPL uses 7 byte of data for each real number as follows:

1 sign byte 00 = + (positive) ; FF = - (negativ); 2 5 byte of mantissa represented in a normalized sub-

unitary BCD format. The first BCD value is always 0, the second is always different from 0 unless the floating- point value is 0. The maximum value of mantissa represented in this way is 0.999999999

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Table 1. Memory map

Address Device

$0000-$DFFF $E004-$EO05 SE008-$E00B $E040-$E043 SF080-$E08F $E100-$E13F SESO0-$FFFF

(7) 8 X 8 kbyte RAM (56 kbyte memory (1) MC6850 - - ACIA (terminal serial port) (1) R6551 - -ACIAP (second serial port), baud programmable (1) MC6821 - - PIA (parallel interface adapter) (1) R6522 - - VIA (versatile interface adapter) (1) MC146818 - - RTC (realtime clock) (1) 6 kbyte EPROM (monitor)

The exponent being referred to base 10, the maximum numbers represented in this format are: (-0.999999999) * (10 ** ( -128)) to (+0.999999999) * (10 ** (127))

A number of examples of this representation are shown below ($ is used to represent hexadecimal values).

o = $oo,$oo,$oo,$oo,$oo,$oo,$oo 1 = $oo,$o1,$oo,$oo,$oo,$oo,$ol

- 1 = $FF,$01,$00,$00,$00,$00,$01 127 = $00,$01,$27,$00,$00,$00,$03

- 127 = $ FF,$01 ,$27,$00,$00,$00,$03

-(56.7"10"*(-15)) = - (0.567"10"*(-13)) = $FF,$O5,$67,$OO,$OO,$OO,$F3

(0.999999999"10"*(127)) = $00,$09,$99,$99,$99,$99,$7F

- (0.999999999"10"*(- 128)) = $FF,$09,$99,$99,$99,$99,$80

The floating-point and I /O subroutines added to MPL are presented below.

Floating-point subroutines All the parameters of the floating-point subroutines are declared ARG(7) BINARY(2) parameters are used only in FLOAT and FFIX functions

$FDIV (ARC; 1 ~,RC 2,RSLT) $FMUL (ARC1 ,ARC 2,RSLT) $FADD (ARG1 ,ARC 2,RSLT) SFSUB (ARC; 1 ~RG2, RSLT) $FCMP (ARG t,ARG2,RSLT) $FEQU (RSLT,ARG 1) $FLOAT (ARG 1,RSL1-) SFFIX (ARG1 ,RSLT) $FNEG (RSLT,ARG1) $FXTOY (ARGX,ARGY, RSLT) SFSQRT (ARG1,RSLT) SFSI N (ARG 1 ,RSLT) SFCOS (ARG1 ,RSLT) $FTAN (ARG 1 ,RSLT) SFASIN (ARG1 ,RSLT) SFACOS (ARGt ,RSLT) $FATAN (ARG 1,RSLT) $FSINH (ARG 1 ,RSLT) $FCOSH (ARG1 ,RSLT) $FTANH (ARG1 ,RS LT) $FEXP (ARG1 ,RSLT) $FINV (ARG1 ,RSLT) $FLOG (ARG1 ,RS LT) SFLN (ARG1 ,RS LT) $FP10 (ARG1 ,RSLT)

! I/O SUBROUTINES

$DWORD (VAL,BUFFER) $DBYTE (VAL,BUFFER) $DFIXB (VAL,BUFFER) $DFIXW (VAL,BUFFER) $DFLOAT (FLOAT, BUFFER) $OUTBLK (NBL) SPRINT (BUFFER) SNLINE $INPUT (BUFFER) SGHEXB (BUFFER) $GHEXW (BUFFER)

Divide Multiply Add Substract Compare two floating-point numbers Equate Transform fix into floating-point format Transform floating-point into fix format Negate X to power Y Square root Sinus Cosinus Tangent Arc-sinus Arc-cosinus Arc-tangent Hyperbolic sinus Hyperbolic cosinus Hyperbolic tangent Exponential Inverse Logarithm base 10 Natural logarithm 10 to power

Transform bindary word into decimal (ASCII string) Transform binary byte into decimal (,a6CII string) Transform binary signed byte into decimal (ASCII string) Transform binary signed word into decimal (ASCII string) Transform signed floating-point number into ASCII string Print space (NBL times) Print string Print CR+LF Read a string of characters Read a hexadecimal byte Read a hexadecimal word

$GFIXB (BUFFER) $GFIXW (BUFFER) SGFLOAT (BUFFER)

Read a signed decimal byte (+-127) Read a signed decimal word (+-32767) Read a signed floating-point number

M P L P R O G R A M

As an example of an MPL application, an MC6809 system was chosen as a target board (Figures 3, 4 and 5). The MC6809 microprocessor is driven by a 7.3728 MHz crystal and produces a system clock speed of 1.8432 MHz. The target board was connected to a process interface consisting of eight A/D channels, four D/A channels, two stepper motors (M1 and M2) and twelve digital I /O (see Figure 6). The process interface is driven by a parallel interface adapter - - PIA (MC6821) - - and by a versatile interface adapter - - VIA (R6522). The memory map of the target board is shown in Table 1. The interrupt pins of the I /O devices are connected to an MC6809 microprocessor as shown in Table 2. An interrupt-driven program to increase or decrease the speed of a 12 Vdc stepper motor by 2.8 fold (or 1.7 fold) is presented in the Appendix. The motor (Canon - - PM55), is connected with its four phases to the M1 interface (see Figure 6). The program starts at the hexadecimal address $3000 by initiating the PIA registers in order to drive the stepper motor. The EQU statements for the floating-point and I /O subroutines and the statements CLI (clear interrupt mask bit in condition code register), and RTI (return from interrupt), are directly introduced into the high-level source code by using ($) in the first column. The interrupt routine, INKEY, is written in MPL and is located at the hexadecimal address $4000. IN KEY deposits characters received from the terminal in a command buffer, using hardware interrupts through the ACIA device. Depending on the decoding of the command characters, the program calculates (using the floating- point subroutines) the new motor speed and sends the new value to PIA registers. The source code is initially compiled by MPL in an assembler MC6800 file which is translated immediately into an assembler MC6809 source file. The object code (in format S0-$9) resulting from the assembly of the MC6809 file is afterwards downloaded and executed on the target board.

Table 2. Interrupts

MC6809 Device (interrupt pin)

NMI pin-2 VIA (pin-21) IRQ pin-3 PIA (port A) (pin-38) IRQ pin-3 PIA (port 8) (pin-37) IRQ pin-3 ACIA (pin-7) IRQ pin-3 ACIAP (pin-26) FIRQ pin-4 RTC (pin-19)

Vol 13 No 9 N o v e m b e r 1989 575

CONCLUSION

By combining the power of high-level languages and software tools with embedded microprocessors, complex realtime control applications can be easily realized. Incorporating a run-time floating-point and an I/O libraw into an existing cross-compiler (MPL) can enormously increase the efficiency of programming, especially when the same cross-compiler is used, across the board, for an entire family of microprocessors.

REFERENCES

1 Skrokov, R Mini and Microcomputer Control in Industrial Processes, Handbook of systems and application Strategies Van Nostrand Reinhold Com- pany, New York, NY, USA (1980)

2 Andrews, M Programming Microprocessor Interfaces for Control and Instrumentation Motorola Series in Solid State Electronics, Prentice Hall, Englewood Cliffs, NJ, USA (1982)

3 Taylor, C F Master Handbook of microcomputer languages Tab Books Inc. (1987)

4 MPL Language Reference Manual Motorola Inc., Austin, TX, USA (1976)

APPENDIX I: MPL PROGRAM

MOTOR: PROCEDURE OPTIONS (main)

! INTERRUPT VECTOR AND PERIPHERALS

$ OPT L,LLE=120

$MON EQU $F000 MONITOR

IRQ INTERRUPT VECTOR

ORIGIN "DFC5" DCL IRQ BINARY(2) INIT("4000")

ACIA TERMINAL REGISTERS

ORIGIN "E001" ACIA STATUS REGISTER

DCL ACIASR BINARY(I) ACIA DATA REGISTER

DCL ACIADR BINARY(I)

PIA REGISTERS

ORIGIN "E03D" DCL PIADRA BINARY(1) DCL PIACRA BINARY(1) DCL PIADRB BINARY(1) DCL PIACRB BINARY(1) ORIGIN "3000"

MAIN PROGRAM DECLARATIONS

DCL POSIT BINARY(I) INIT("2B") DCL NEGAT BINARY(I) INIT("2D") DCL ESC BINARY(I) INIT("IB') DCL CR BINARY(I) INIT ("0D") DCL DIS1 CHAR(13)INIT('STEPPER MOTOR'),EL1 INIT(4) DCL DIS2 CHAR(15) INIT('- : DECREASE'),EL2 INIT(4) DCL DIS3 CHAR(15)INIT('+ : INCREASE'),EL3 INIT(4) DCL DIS4 CHAR(22) INIT('<CR> : STEP BY STEP'),EL4 INIT(4) DCL DIS5 CHAR(20) INIT('<ESC> : OUTPUT'),EL5 INIT(4) DCL OCC01 BINARY(2) INIT(0) DCL OCC02 BINARY(2) INIT(O) DCL OCC03 BINARY(2) INIT(O) DCL MODE BINARY(I) INIT(0)

DCL SENS BINARY(I) INIT(0) DCL BRK BINARY(I) INIT(1) DCL BUF BINARY(I) DCL NULL BINARY(I) INIT(O) DCL OUTPUT BiNARY(I) INIT("FF") DCL RS BINARY(I) INIT("03") DCL ACIAIN BINARY(I) INIT("95") DCL PLAINT BINARY(I) INIT("3C") DCL ONE BINARY(I) INIT("01") DCL CLEAR BINARY(I) INIT(48) DCL CLEAR2 BINARY(2) INIT("3030") DCL BUFFER BINARY(2)

DCL FLAG BIN(2) DCL NO1(7) INIT(0,02,"80",0,0,0,01) DCL NO2(7) INIT(0,01,"70",0,0,0,01) DCL NO3(7) INIT(0,01,0,O,0,O,01) DCL RES(7) INIT(O,0,0,0,0,0,0) DCL CLEAN(7) INIT(0,0,0,O,O,0,O) DCL RESI(7) INIT(O,0,O,0,0,O,O) DCL RES2(7) INIT(0,0,O,0,O,O,0) DCL RES3(7) INIT(0,0,0,0,0,0,O) DCL RES4(7) INIT(0,0,0,0,0,O,0) DCL RES5(7) INIT(O,0,O,0,O,O,0) DCL MAX BINARY(2) INIT("0700") DCL DELAY BINARY(2) INIT("7000") DCL MIN BINARY(2) INIT("7000") DCL PBUF(16) INIT(48,48,48,48,48,48,48,48,48,48,48,48,48,48,48,04) DCL PBUFI(6) INIT(48,48,48,48,48,04)

! FLOATING-POINT SUBROUTINES

$FDIV EQU $0DA7 (ARG1 ,ARG2,RSLT) SFMUL EQU $0E31 (ARG1,ARG2,RSLT) $FADD EQU $0EBB (ARG1 ,ARG2,RSLT) $FSUB EQU $0F45 (ARG1 ,ARG2,RSLT) $ECMP EQU $0FCF (ARG1 ,ARG2,RSLT) $FEQU EQU $103B (RSLT,ARG1) SFLOAT EQU $109F (ARG1 ,RS LT) SFFIX EQU $1121 (ARG1 ,RSLT) SFNEG EQU $ 1 1 8 5 (RSLT,ARG1) $FXTOY EQU $11 F4 (ARGX,ARGY,RSLT) $FSQRT EQU $1282 (ARG1 ,RSLT) SFSIN EQU $121:5 (ARG1,RSLT) $FCOS EQU $ 1 3 6 4 (ARG1 ,RSLT) SFTAN EQU $13D3 (ARG1 ,RSLT) SFASIN EQU $ 1 4 4 2 (ARG1,RSLT) SFACOS EQU $1481 (ARG1,RSLT) SFATAN EQU $1520 (ARG1 ,RSLT) $FCOSH EQU $158F (ARG1 ,RSLT) $FTAN H EQU $15FE (ARG1 ,RSLT) SFEXP EQU $166D (ARG1,RSLT) $FI NV EQU $16DC (ARG1 ,RSLT) SFLOG EQU $ 1 7 4 B (ARG1 ,RSLT) SFLN EQU $17BA (ARG1 ,RSLT) $FP10 EQU $ 1 8 2 9 (ARG1 ,RSLT) $FSINH EQU $1898 (ARG1,RSLT)

! I/O SUBROUTINES

$DWORD EQU $1920 (VAL, BUFFER) SDBYTE EQU $196D (VAL,BUFFER) SDFIXB EQU $19A9 (VAL,BUFFER) SDFIXW EQU $19CE (VAL,BUFFER) $DFLOAT EQU $1A00 (FLOAT,BUFFER) $OUTBLK EQU $1A98 (NBL) SPRINT EQU $1AAA (BUFFER) $NLINE EQU $1AB4 $1NPUT EQU $1AB8 (BUFFER) $GHEXB EQU $1AD5 (BUFFER) $GHEXW EQU $1AFF (BUFFER) $GFIXB EQU $1845 (BUFFER) $GFIXW EQU $1C16 (BUFFER) $G FLOAT EQU $1DF8 (BUFFER)

! MAIN PROGRAM

! INIT PIA AND ACIA

PIACRA = NULL PIADRA = OUTPUT

5 76 Microprocessors and Microsystems

PIACRA = PLAINT ACIASR = ACIAIN

CLI ENABLE IRQ INTERRUPT

INITIAL MESSAGES

CALL NLINE CALL NLINE CALL NLINE CALL PRINT(DIS1) CALL NLINE CALL PRINT(DIS2) CALL NLINE CALL PRINT(DIS3) CALL NLINE CALL PRINT(DIS4) CALL NLINE CALL PRINT(DIS5) CALL NLINE CALL NLINE CALL NLINE

LOOP1: IF MODE EQ 0 THEN GO TO CONTIN IF SENS EQ 0 THEN CALL CWROT

!

ELSE CALL CCWROT LOOP: IF BRK EQ 0 THEN GO TO LOOP

BRK = 0

GO TO LOOP1

CONTIN: IF SENS EQ 0 THEN CALL CWROT ELSE CALL CCWROT

GO TO LOOP1 END MOTOR

!

INKEY: PROCEDURE ORIGIN "4000"

INTERRUPT PROCEDURE

BUF = ACIADR IF BUF EQ CR THEN DO

CALL STBYST BRK = 1

END

IF BUF EQ POSIT THEN DO CALL SPEED BRK = 1

END

IF BUF EQ NEGAT THEN DO CALL SLOW BRK = 1

END

IF BUF EQ ESC THEN DO CALL STOP GO TO MON

END

CALL DWORD(BUFFER,PBUF1) CALL PRINT(PBUF1) PBUFI(1) = CLEAR PBUFI(2) = CLEAR PBUF1 (3) = CLEAR PBUFI(4) = CLEAR PBUFI(5) = CLEAR CALL NLINE CALL POUT(RES)

RTI RETURN FORM INTERRUPT

END INKEY !

SPEED: PROCEDURE

PROCEDURE TO INCREASE SPEED BY 2.8 TIMES

CHARACTER " + "

DCL DIS6 CHAR(22) INIT('SPEED INCREASE'),EL6 INIT(4)

SENS = 0 MODE = 0 OCC02 = OCC02 + 1 CALL FLOAT(DELAY,RES1) CALL FEQU(RES,CLEAN) CALL FDIV(RES1,NO1,RES) CALL FFIX(RES,DELAY) CALL DWORD(DELAY,PBUF1) CALL PRINT(PBUF1) BUFFER = DELAY IF BUFFER LT MAX THEN DELAY = MAX CALL PRINT(DIS6) CALL NLINE RETURN END SPEED

SLOW: PROCEDURE

PROCEDURE TO DECREASE SPEED BY 1.7 TIMES

CHARACTER " - - "

DCL DIS7 CHAR(20) INIT('SPEED DECREASE'),EL7 INIT(4)

SENS = 1 MODE = 0 OCC03 = OCC03 + 1 CALL FLOAT(DELAY,RES1) CALL FEQU(RES,CLEAN) CALL FMUL(RES1,NO2,RES) CALL FFIX(RES,DELAY) CALL DWORD(DELAY,PBUF1) CALL PRINT(PBUF1) BUFFER = DELAY IF DELAY GT MIN THEN DELAY = MIN CALL PRINT(DIS7) CALL NLINE RETURN END SLOW

STBYST: PROCEDURE !

! STEP BY STEP PROCEDURE !

INITIALIZE STEP BY STEP OPERATION

DCL DIS8 CHAR(13) INIT('STEP BY STEP'),EL8 INIT(4)

MODE = 1 OCC01 = OCC01 + 1 CALL PRINT(DIS8) CALL NLINE RETURN END STBYST

CWROT: PROCEDURE

CLOCKWISE ROTATION

DCL TABLE1(4) BINARY(I) INIT("10","20"/ '40", '80") DCL NU BINARY(I)

PIADRA = TABLE1 (1) CALL DELAYS PIADRA = TABLE1(2) CALL DELAYS PIADRA = TABLE1(3) CALL DELAYS PIADRA = TABLE1 (4) CALL DELAYS

RETURN END CWROT

CCWROT: PROCEDURE

! COUNTER CLOCKWISE ROTATION

DCL TABLE2(4) BINARY(I) INIT( '80","40","20"," lO') DCL NU1 BINARY(I)

Vol 13 No 9 November 1989 577

PIADRA = TABLE2(1) CALL DELAYS PIADRA = TABLE2(2) CALL DELAYS PIADRA = TABLE2(3) CALL DELAYS PIADRA = TABLE2(4) CALL DELAYS

RETURN END CCWROT

STOP: PROCEDURE

STOP MOTOR

CALL NLINE CALL NLINE CALL DWORD(OCCO2,PBUF1) CALL PRINT(PBUF1) CALL NLINE CALL DWORD(OCC03,PBUF1) CALL PRINT(PBUF1) CALL NLINE CALL DWORD(OCC01,PBUF1) CALL PRINT(PBUF1) CALL NLINE PIACRA = NULL

RETURN END STOP

DELAYS: PROCEDURE

TIME DELAY

DCL NO BINARY(2)

N O = 0 DO WHILE NOT (NO EQ DELAY) NO = NO + 1 END RETURN END DELAYS

!

POUT: PROCEDURE

! PRINTOUT PROCEDURE

CALL DFLOAT(RES,PBUE) CALL NLINE CALL PRINT(PBUF) CALL NLINE RETU RN END POUT

Jacob Davidson is a professor of microelectronics at the University of Quebec in Montreal, Canada. He obtained a PhD in electrical engineering from the Ecole Polytechnique, Montreal, Canada, in 1984. He has participated as a consultant in several process control computer projects. His current research interests

include microelectronics, microprocessor applications, robotics and digital communications.


high-level language for embedded microprocessors

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