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Guiding Embedded Designers on Systems and Technologies
Engineers’ Guide to Military, Aerospace & Avionics
SoCs Boost SFF Performance
Modern Avionics, Critical Communications and FPGAs
Navigating Component Obsolescence
Special Issue: Fall/Winter 2015 Military & Aerospace Guide
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FROM THE EDITOR
Embedded Systems Engineering and The Engineers’ Guide to Military, Aerospace & Avionics 2015 is published by Extension Media LLC. Copyright ®2015 Extension Media LLC. Extension Media makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this issue nor does it make a commitment to update the information contained herein. No information in this Catalog may be reproduced without expressed written permission from Extension Media @ 1786 18th Street, San Francisco, CA 94107-2343.
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GE Intelligent Platforms Sold to Veritas CapitalGE-IP to be “spun out” to focus on rugged, COTS systems and positioned
a notch or two removed from prime contractors.
Chris A. Ciufo, Editor-in-Chief
I used to keep a “Top 10” list of rugged COTS vendors, subjectively compiled and ranked
based upon how I thought they were doing in the market. Budgets, time, and mergers
have caused me to abandon that list—and I can’t any longer remember all of the melting
and morphing of companies no longer in existence. Yet I do remember that GE Intelligent
Platforms (I’ll call them “GE-IP”) consists mostly of a collection of the former SBS Tech-
nologies—itself a collection of acquired companies—Radstone, and VMIC of Huntsville.
It seems GE-IP is returning to its pre-GE days. What does this mean to the market, DoD
and GE-IP’s competitors?
Veritas Capital is acquiring GE-IP and the private equity firm has a large and successful
stable of government-related technology companies (Aeroflex and Integrated Defense
Technologies, for example). Announced internally mid-September and publicly on 22
September 2015, all 600 GE-IP employees and five facilities go with the acquisition, and
new CEO Bernie Anger is also the former GE-IP General Manager and has elected to leave
mother GE to run the “start-up.” This is a strong testimonial on how excited the GE-IP
team is to be free from corporate encumbrances if Mr. Anger is giving up the GE logo on
his business card. Working at GE is serious career cred for executives.
Yet without Big GE, “New-Co.”—the new company doesn’t yet have a name—will be
forced into the same R&D and tech roadmaps as its peers at Curtiss-Wright, Mercury
Computer, and smaller competitors like ADLINK, Extreme Engineering, General Micro
Systems, Kontron and others.
“New-Co.” is expected to continue doing what they already do best: fit in between the
rugged COTS board guys and the DoD’s prime contractors by designing and customizing
rugged COTS systems that meet program requirements. Unlike some COTS suppliers,
“New-Co.” definitely possesses the “ilities” and infrastructure required to do long-lead/
life-cycle biz on government programs. And, as a US-based company, they might have a
FAR/ITAR leg up over non-US competitors.
GE-IP just announced a deeper relationship with Intel, and is one of only a handful of
COTS vendors—commercial or otherwise—to announce boards and systems based upon
Intel’s 6th Generation Skylake Core i7 and Xeon processors. GE-IP also has an exclusive
relationship with nVidia to build rugged Tegra K1-based GPGPU products. I’m told all of
this IP—plus that of GE itself—transfers over to “New-Co.” This is an impressive port-
folio from which to build a new company and roadmap.
Yet the competition is fierce and relentless, and without the GE logo on the door “New-
Co.” will have to work just as hard as everyone else to secure new designs.
Still, if I had to resurrect that old “Top 10” rugged COTS list, I’d still put “New-Co.” in the
Top 5, maybe higher. Why? It’s that MIL-SPEC infrastructure plus GE procedures that
may be the secret differentiator to assure “New-Co’s” success.
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ENGINEERS’ GUIDE TO MILITARY, AEROSPACE & AVIONICS • Fall 20154
IN THIS ISSUE
CONTENTS
Features COVER STORY
Critical Communications in Modern Avionics Systems By Michael Plannerer, MEN Mikro Elektronik 6 mPCIE Takes on Shrinking Footprints/Growing ChallengesBy John Hentges, ACCES I/O Products, Inc. 12
Structural Component Defects Screened Out by Acoustic Micro ImagingBy Tom Adams, Sonoscan, Inc. 14
Overcoming High-Speed Networking ConstraintsBy Nigel Forrester, Concurrent Technologies 18
System on a Chip Technology Improves Small Form Factor PerformanceBy Bill Ripley and Wayne McGee, Creative Electronic Systems 22
Drones, Security, the IoT and More Find the Mil/Aero and Commercial Worlds Looking for Common Strengths By Chris A. Ciufo, Editor-in-Chief, Embedded; Extension Media 24
Hot Topics at VITA By Jerry Gipper, VITA 29
Navigating the Inevitable Component ObsolescenceBy Doug Patterson, Aitech Defense Systems 31
Stop the Presses! VPX is Dead.By Ben Sharfi, General Micro Systems 32
Departments
From the Editor 2
Product Showcases
Application Solutions
COTSArtesyn Embedded Technologies 33
CPU or Single Board ComputerADL Embedded Solutions 34Artesyn Embedded Technologies 35
Data Acquisition ACCES I/O Products, Inc. 36
Development BoardsPentek 37
EnclosuresADL Embedded Solutions 38Atrenne Computing Solutions 39, 40
Engineers’ Guide to Military, Aerospace & Avionics
Fall 20156
SPECIAL FEATURE
Critical Communications in Modern Avionics Systems As mission-critical systems increase in complexity, customizable FPGA chips are ushering
in a new era of cost-effective, standardized and robust computing networks.
Smaller, faster and denser computing
systems are enabling new capabilities in avi-
onics operations, with modern aircraft housing
a wide number of electronic components. Some
of them—like flight control and guidance sys-
tems—provide flight critical functions. Others
may provide assistance services that, while
not critical to maintain airworthiness, help
reduce the workload of the crew. As capabilities
increase, so does the amount of information
that needs to be processed and displayed.
Standardized interfaces that fit a wide range of
aircraft will facilitate high levels of technology
reuse and help keep costs down, improving
system lifecycles and reducing design demands.
In addition, a modern computing architecture
that is flexible and scalable enough to support
this growing set of capabilities—such as system
communication, reliability and maintain-
ability—needs to mesh with the reduced size,
weight and interfaces that these systems are
demanding.
WHERE IT ALL BEGANA typical aircraft control system generally consists of
a number of sensors that read environmental or iner-
tial data, an avionic system performing certain flight
relevant control functions, and outputs to control
actuators that carry out functions such as rudder or
flap movements. Interconnecting these elements has
traditionally been accomplished through ARINC-429
or MIL-STD 1553—two main data buses that sync up
the components of the aircraft control system.
By Michael Plannerer, MEN Mikro Elektronik
With its maximum 32-bit length and unidirectional data transfer,
ARINC-429 supports a maximum of 20 receivers on a single twisted
wire pair (or ‘single bus’). Messages are transmitted at either 12.5 or
100 Kbit/s to other system elements monitoring the bus messages.
ARINC-429 was developed specifically for commercial and transport
aircraft.
MIL-STD-1553 is a serial data bus that incorporates a dual redundant
balanced line physical layer, a (differential) network interface, and
time division multiplexing, half-duplex command/response protocol.
It can support up to 31 remote terminals (devices) with communica-
tion speeds of up to 1 Mbit per second. And being a military standard,
it’s widely used by all branches of the US military.
Figure 1: Starting with the proven platform of standard Ethernet technology, AFDX builds out a robust, cost-effective communications network for modern avionics systems.
Fall 20158
SPECIAL FEATURE
Figure 3: Flexibility and reduced engineering costs to AFDX implementations result through use of a customizable FPGA chip.
Table 1. FPGA Failure Modes
Figure 2: The end systems in AFDX handle all protocol operations and reliably send and receive network data.
NEW ARCHITECTURE TAKES FLIGHTAs computing needs have increased, aircraft manufacturers as well
as suppliers of avionic subsystems have sought a new avionic systems
architecture that would provide a standardized hosting platform.
Such an architecture would require:
A general purpose computing platform that provides the compu-
tational power
Standardized interfaces to sensors and actuators delivered on
separate I/O boards
A computing platform with a real-time operating system (RTOS)
using a standard interface (API) to avionic applications
This type of architecture would facilitate shared resources, aid in
increasing computational power and accommodate growth as systems
required additional performance.
Based on standard IEEE 802.3 10/100 Mbit Ethernet hardware, Asyn-
chronous Full Duplex (AFDX) switched Ethernet is a commercially
proven hardware technology that applies a software protocol to enable
reliable transport, delivery and timing of data packets (Figure 1).
Normal Ethernet topology treats each node equally. If a peer wants
to transmit a packet on the network and the media is occupied, a
collision occurs and the peer backs up and tries again until the trans-
mission is successful, or a predefined amount of time has elapsed. This
variable length latency is not tolerable in safety-critical applications,
so to avoid collisions on the network, a switched full duplex topology
is used.
An AFDX switch forwards packets according to a static table. It is, in
fact, a general policy in this network to statically define all peers and
their respective network addresses. There is no address resolution
protocol (ARP) necessary to resolve MAC addresses from IP addresses.
To increase network availability, redundancy is built in at the physical
layer. Each packet can be transmitted simultaneously by two Ethernet
controllers onto separate wires, via physically separate switches, to
the destination system.
ENSURING RELIABLE DATA TRANSMISSIONAn AFDX network consists of switches and ‘end systems.’ An end
system is a connected component capable of handling all AFDX-
related protocol operations and is usually part of an avionic or aircraft
subsystem that needs to send or receive data over the network.
Depending on the network hierarchy, one or more switches are located
on the data path between two end systems (Figure 2).
At the application level, AFDX is intended to replace ARINC-429 con-
nections, so it shares the same point-to-point and point-to-multipoint
characteristics as ARINC-429. These connections are represented by
virtual links (VLs). A single VL may connect two end systems (point-
to-point) or it may connect one sending end system with multiple
reading end systems (point-to-multipoint).
The VLs also help eliminate any bottlenecks created from the data
paths that are using separate data buffers. Separate paths are required
to decouple the transmit operation from the data reception and create
true full duplex data links between end systems. While this enables
full wire speed data communication between the end system and the
9
SPECIAL FEATURE
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AFDX switch, it could result in individual switch transmission rates
totaling more than the capacity of the inter-switch data link. VLs ease
the data throughput to ensure reliable communication.
HIGH DEMANDS ON SYSTEM OPERATIONBecause of the critical nature of the data being processed, an AFDX
end system needs its “loss of function” probability to be very low,
usually in the magnitude of less than 10-6 per flight hour, which has
strong implications on the mission safety concept. The system must be
able to recover effortlessly from most, if not all, possible internal fault
scenarios to provide this high service availability.
While detected errors relate to the availability of the end system,
undetected errors are also a concern, with probability of end system
failure usually needing to be less than 10-7 per flight hour. Three main
considerations include:
1. Undetected payload manipulation—the recipient(s)
receive(s) inconsistent or wrong data.
2. Undetected manipulation of a packet’s address field — the
recipient(s) may think the packet was sent by an authorized
sender, when it has not; or a packet is delivered to the wrong
recipient and lost for the intended node.
3. Excessive delay of a packet.
FLEXIBLE FPGA ARCHITECTUREWhile most end systems have traditionally used ASICs, today’s FPGA
devices offer the performance and capacity that allow them to be a
viable alternative. And they are far more flexible when implementing
additional functionality.
But this flexibility also makes FPGAs susceptible to bit errors induced
by cosmic radiation, causing internal failures of the logic or changes
in the configuration. In order to meet the safety requirements of air-
borne equipment, additional safety considerations have to be included
into the design of such complex FPGA logic.
Clock crossing and metastability as well as single event effects (SEEs)
that manifest as single event upsets (SEU), latch-ups (SEL) and tran-
sients (SET) all contribute to possible internal FPGA failures. Even
temporary ‘soft’ errors that are fixed by a reset need to be detected in
a safety-critical system.
Hard errors, where hardware is permanently damaged resulting in
a persistent error, are destructive SEEs and need to be detected and
logged to avoid unnecessary removal of a component, if the error can
be tolerated. As hard errors are only fixed by changing the defective
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Fall 201510
SPECIAL FEATURE
board, they have to be detected and reported to the system, and a close
evaluation by the software determines whether the system has to be
replaced or if system functionality is not affected. Table 1 shows possible
failure modes as a result of some SEEs.
INDEPENDENCE REIGNSThe increasing need for reliable, mission-critical electronics that offer
design flexibility as well as reduced engineering costs has fostered a
new era of computing. One example is an FPGA chip installed directly
on the boards of an end system that enables customized AFDX-based
communication systems independent of a form factor. This eliminates
the need for an additional module to integrate the AFDX protocols
that send information between the avionics subsystems. (Figure 3)
Developed according to ARINC 664P7-1 to meet the demands of
safety-critical avionic applications, the new chip is DO-254-compliant
and is prepared to meet the requirements for DAL-A, already con-
forming to and certifiable to DAL-D.
The flash-based architecture makes the chip configuration SEU-
resistant and it can offer real time capability. Because of its inherent
flexibility, the customizable FPGA chip enables such functions as
gateway solutions including AFDX-to-CAN, AFDX-to-standard Eth-
ernet or AFDX-to-ARINC-429. Not to be forgotten is data throughput.
With up to 255 receive VLs and 64 transmit VLs, the chip ensures safe
and deterministic data transfer through determined bandwidths.
These types of technological innovations are giving AFDX the foothold
it needs to provide avionics control systems with modern architec-
tures that can support the growing amount of data being transmitted
among systems.
ENHANCED COMPUTING FOR MISSION-CRITICAL SYSTEMSAFDX essentially extends the IEEE 802.3 standard by adding Quality
of Service (QoS) and deterministic behavior with a guaranteed band-
width. Using COTS Ethernet components helps reduce overall costs,
while providing faster system development and less costly mainte-
nance for the system network. Hardware components, cables and test
equipment for Ethernet are field proven and much more affordable
than “build-to-spec” avionics solutions, and when the robustness of
AFDX is added, the benefits increase exponentially.
Michael Plannerer is head of development, Men Mikro Electronik.
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Fall 201512
SPECIAL FEATURE
mPCIe Takes on Shrinking Footprints/Growing Challenges Keeping solutions rugged enough, and small enough, to support modern mobile applications.
DAQ systems using plug-in slot cards, or even stack-
able I/O boards, consume a virtual ton of volume
and weight, and achieving extended temperature and
vibration certification using most COTS hardware is a real
headache.
In order to reduce size and improve ruggedness (while still retaining
flexibility with regard to changing CPU technologies and requirements)
various Computer-On-Module (COM) standards became popular.
Instead of DAQ I/O devices being plugged into the CPU’s backplane, the
CPU module itself is mated to a single custom-designed carrier board,
containing all the application-specific I/O onboard. This carrier board
hosts the CPU module as well as the connectors for both the I/O and
the standard PC interfaces.
Commercial slot I/O cards (ISA, PCI, PCI Express) are neither small
enough nor rugged enough for many applications. Stackable expansion
options, like PC/104 and its faster brethren, are indeed more rugged, but
still take up an awful lot of room—and weight—when modern sensor
count and mobile applications are considered. These large form factor
solutions also encourage a one-size-fits-all approach to I/O design. Thus
a wide variety of input and output types, perhaps including voltage, cur-
rent, frequency, TTL, PWM, quadrature and more, may all be found on
one I/O board. Keeping the solution rugged enough, and small enough,
to support modern mobile applications requires something different.
NOT JUST FOR “BIG GULP” PRODUCTION QUANTITIES ANYMOREThe upfront costs associated with a fully custom I/O-equipped carrier board
limited widespread adoption of COM technologies to applications with large
production quantities. Also, these fully custom COM carrier boards lacked
the flexibility necessary to handle changing real world requirements. Sud-
denly needing a few extra channels of GPIO, or adding a serial interface to a
complex instrument over RS422 late in the engineering process, could result
in an expensive retooling of the entire carrier module.
Semi-custom COM solutions came on the market to reduce upfront costs
and support smaller production quantities. The ETX-NANO from ACCES
I/O, for example, provides a standard COM interface, but rather than a
dedicated set of DAQ I/O features hard-wired on the carrier board, a
PC/104+ bus is available. Integrators can verify proper operation of their
application and software using a COTS COM board coupled with one or
more COTS DAQ I/O boards, greatly reducing upfront costs. Only after the
selection of I/O is verified—and the application software working—is the
By John Hentges, ACCES I/O Products, Inc.
carrier board re-spun, integrating the specific I/O channels that were
actually used directly onto the carrier board for production scaling.
Although semi-custom solutions eliminate this retooling when it
occurs before volume production begins, some application require-
ments change after hundreds or even thousands of units have been
shipped. Many other applications will never reach the relatively
small production volumes necessary to make even a semi-custom
carrier board solutions cost effective.
Adding mPCIe for I/O expansion solves these issues: flexibility, com-
patibility, and low production volume ROI.
MORE FLEXIBILITY WITH REDUCED SIZE AND WEIGHTAdding legacy expansion (like PCI slots, or even PC/104) back to
the COM carrier modules would offer the I/O flexibility and future-
proofing needed, but these interfaces are large—very large—compared
to the modern PCI Express Mini Card (mPCIe).
mPCIe was developed for adding wireless features to notebook computers,
isolating the notebooks’ logic board design cycles from the ever-evolving
Wi-Fi, Bluetooth and cellular specifications. Unlike its predecessor the
PCI Mini Card, mPCIe cards include mounting provisions, preventing
any vibration or shock issues common to the older standard. A full size
(F1) mPCIe device (Figure 1) is less than 30 x 51 x 6mm in size, and the
Industrial and Military DAQ market has pounced on the standard as a
rugged-yet-tiny replacement for the larger legacy options.
Figure 1: Suitable for industrial automation and test in vehicle, mobile, or any other shock / vibration sensitive application, mPCIe is a third generation small form factor flexible interface designed for the modern mobile world, leveraging the mature and ubiquitous PCI Express and USB busses. Photo courtesy ACCES I/O Products, Inc.
13
SPECIAL FEATURE
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Selecting mPCIe makes it possible to increase flexibility while reducing
size and weight, without sacrificing ruggedness. A COM carrier board
or SBC can be designed with all the DAQ I/O and PC interfaces the
requirement demands, yet have one, two, even four or more expansion
slots available for handling the contingencies of the real world.
TIME SAVINGS Another benefit of the smaller mPCIe standard is a focused approach
to I/O expansion: the limited PCB and connector real estate eliminates
the unused I/O types and channels common to the one-size-fits-all
“multifunction data acquisition system” devices often seen on the
larger legacy interfaces.
Performance is assured with the mPCIe’s PCI
Express interface, but real flexibility in I/O design
is also possible: the mPCIe connector includes a
USB 2.0 interface, as well as SMBus and sup-
port for future expansion busses. These extra
interfaces greatly reduce the time-to-market and
upfront costs of bringing new I/O devices to the
mPCIe bus, which assures a broad selection of
I/O to match present, and future, application I/O
requirements.
Maintenance and repair are also greatly improved
over various stackable expansion options: dis-
mantling a PC/104-type stack to replace a failed
I/O card is a real hit to system MTTR and usually
precludes LRU designation. mPCIe is two simple
screws—or even tool-less mounting provisions.
PCIe to mPCIe adapter boards, installed in
normal desktop computers, can be used to
prototype the I/O before the COM carrier is
developed. During the layout of an integrated
carrier board it’s possible to have one or more
mPCIe boards (which provide the same func-
tionality you’ll be integrating) installed in a
single PCI Express slot of a software developer’s
PC. Programmers can write and test their code
against real hardware months before it would
otherwise be available to them.
Additionally, the PCI Express Mini Card specifi-
cation itself effectively requires each and every
mPCIe unit produced be RoHS compliant.
Choosing a carrier board vendor with a broad
and deep repository of I/O interfaces already
designed on mPCIe, PCI Express, PCI, PCI-104
and USB (to name just a few), helps assure the
finished, I/O-integrated, carrier board will use
the same schematic and software as the mPCIe
prototypes.
Mini PCI Express Cards offer compatibility, flexibility & future-
proofing – inexpensive in both footprint/volume and price, and
rugged I/O expansion options suitable for all applications, big and
small. Add an mPCIe slot to your solution, today!
John Hentges is head of software and digital design for ACCES I/O Prod-
ucts. His experience includes over 25 years at ACCES I/O Products as well
as directing numerous data acquisition software projects for companies such
as Duracell, Harris, Lawrence Livermore National Laboratory, Honeywell,
and the X PRIZE Foundation.
Fall 201514
SPECIAL FEATURE
Structural Component Defects Screened Out by Acoustic Micro ImagingNew AMI developments have made component screening more informative and more effective, a boon
to the task of scrutinizing avionics parts before assembly and removing those likely to cause field failures.
W hen a plastic-packaged IC fails in service, the cause is just as
likely to be a pre-existing internal structural defect in the
package, as it is to be a defect in the circuitry on the chip. The vast
majority of internal structural defects are gap-type defects—voids,
non-bonds, delaminations, cracks and the like. In the field, they may
expand in size, collect moisture and contaminants that percolate
through the plastic and initiate corrosion. In any case, the result is
often a broken connection in the package.
X-ray has a hard time imaging gap-type
defects, but they are easily imaged and
analyzed by acoustic micro imaging
(AMI) tools, which pulse high-frequency
ultrasound into the package. The key to
imaging a defect is the material interface
between a solid (the mold compound, die,
die paddle, etc.) and the air (or vacuum or
another gas) inside the gap. The physical
properties of the solid and the air are so
different that more than 99.99% of an
arriving ultrasonic pulse is reflected by
the interface and received by the trans-
ducer of the AMI tool.
The extraordinarily high ultrasonic reflectivity of the gaps means that
it is feasible to inspect parts before assembly to remove those parts
whose internal defects are likely to cause field failures in avionics and
other applications. The more expensive a part, or the more critical its
application, the more likely it is to be imaged by an AMI tool. Ceramic
chip capacitors, which are relatively inexpensive, are frequently
imaged if they are intended for critical systems such as avionics con-
trol systems. Components going into low-cost systems where failure is
not critical are generally not pre-scanned. (But during the 2008-2009
business recession some component suppliers screened components
acoustically before shipping them as a way of gaining a competitive
advantage on reliability.)
Today, though, components are typically screened by the assembler,
or by outside laboratories specializing in such screening. In addition
to plastic-packaged ICs, the components may include ceramic chip
capacitors, insulated gate bipolar transistors (IGBTs) and other parts.
Generally in-line automated systems that handle trays of parts perform
Figure 1: Two trays on components on the stage of an AMI tool. The ultrasonic transducer is about to begin scanning.
By Tom Adams, Sonoscan, Inc.
high-volume screening (thousands or millions of components), image
acoustically and report the results to factory information systems.
Medium-volume screening is carried out by a semi-automated system
that requires a technician but provides non-stop throughput. The com-
ponents in low-volume screening are often high-reliability military or
aerospace items, and are usually imaged on laboratory-type systems.
For one of the companies in this field, Sonoscan, it is not unusual
to receive small lots of components that
require very advanced inspection.
AMPLITUDE MODE IMAGINGThere are about a dozen AMI imaging
modes, each making different use of the
ultrasound echoes from layers inside
the component. One common mode
of screening is the amplitude mode. A
JEDEC-style tray of parts rests below the
transducer, which scans the area of the
tray. It pulses VHF or UHF ultrasound into
the parts and receives the return echoes,
often from a specific depth of interest
(e.g., die attach) known to be a location for
gap-type anomalies. Pulse-echoes occur
thousands of times per second as the transducer scans.
Echoes are returned from any material interface in the part, but only
those echoes whose arrival time coincides with the depth of interest
are used to make the acoustic image. Thus a PQFP may be gated on
the depth from the top of the die to the die paddle, since most critical
gap-type anomalies will occur within this gate.
Figure 1 shows the arrangement for scanning trays of parts. The trans-
ducer here is stationary above the two trays; when scanning begins,
it will move at speeds >1 m/s and collect echoes from thousands or
millions of x-y coordinates on each part.
Figure 2 is the acoustic image of the gated depth (top of die to die
paddle) of a tray of plastic-encapsulated ICs. In each IC package the
die, die paddle and lead fingers are visible because the interfaces (e.g.,
mold compound to lead finger) reflect a portion of the ultrasound at
medium amplitude. The red feature in the second IC in the second row
Fall 201516
SPECIAL FEATURE
for example, might be rejected if the performance demands on the
product it is going into are especially high.
MULTI-GATE IMAGINGSome imaging modes are just beginning to be used in screening of
numbers of components. These AMI modes take advantage of the
ways in which the transducer receives and handles return echoes
from the interior of a sample. When the transducer sends a pulse of
ultrasound into the sample, echoes are returned at various times from
multiple interfaces located at various depths. Each echo reports time
data (which tells the depth of the interface), amplitude data (which
identifies well-bonded and non-bonded interfaces), and polarity data
(whether the acoustic impedance—density times velocity—increases
or decreases at the interface).
One AMI mode takes advantage of the time-since-launch data to
permit the user to set a number of gates before starting the scan. Each
gate receives echoes only from a specified vertical distance within the
part. If there are ten gates, for example, then ten depths of interest are
being imaged separately, and each will produce its own acoustic image.
The gates can be of the same or different vertical width (thicknesses),
and can be adjacent to each other, overlapping or separated. Imaging
the TQFPs in Figure 3 in this way would have resulted in multiple
images that would reveal the depth of each of the multiple voids. Set-
ting multiple gates does not increase the scan time.
The plastic-packaged IC shown in Figure 4 was “sliced” horizontally
into a total of 50 gates as a demonstration; most component screening
operations would use a handful of gates. But using 50 gates shows how
powerful this method can be.
Figure 3: Thru-Scan images of part with (at left) serious internal defects, and (right) numerous small voids in the mold compound.
Figure 2: Acoustic image of a portion of a tray of parts. The red area is a significant internal structural defect.
from the top is a non-bond between the mold compound and the die
paddle—red here indicating echoes having the highest amplitude.
This IC would be rejected because a non-bond in this location is likely
to expand underneath the die. If it separates the die from the die
paddle, the resulting gap would interfere with heat removal from the
die and could cause electrical failure.
THRU-SCAN IMAGINGThru-Scan is probably the second most commonly used acoustic
micro imaging mode. The amplitude mode, described above, uses
one transducer to pulse ultrasound into the top of the component
and to receive the return echoes from material interfaces. Thru-
Scan uses two transducers: one on top to pulse ultrasound, and
one beneath the part to receive the ultrasound that is transmitted
through the entire thickness of the part. A pulse sent into the top of
the part will be entirely blocked from reaching the transducer below
by gap-type defects. It will be partly attenuated by well bonded
solid-to-solid interfaces.
Thru-Scan images of two TQFPs are shown in Figure 3. Ultrasound
pulsed into the top surface traveled with some attenuation through
most areas of both components. Bright regions have the least attenu-
ation and the highest amplitude in echo signals exiting the bottom
surface, while regions where the ultrasound is fully reflected are black
because no echo signal reached the bottom surface.
In the TQFP at right (Figure 3) numerous small black features are
visible. These are small voids in the mold compound. Because the Thru-
Scan pulse travels through the entire thickness of the component,
there is no way to tell the depth of each of these voids, but unless they
are in direct contact with wires (for example) they pose little risk.
The TQFP at left shown in Figure 3 has numerous voids, as well as
a large black ultrasound-blocking feature. This could be a delamina-
tion or a popcorn crack, but its position at the edge of the die makes
it dangerous, and this component would probably be rejected.
Each assembler establishes his own rules for accept/reject. Typically
the rules specify that an acoustic anomaly above a specified size and
in a specified location will be cause for rejection. High-reliability
products naturally have more rigorous standards. The TQFP at right,
Figure 4: Acoustic images of gates 22 through 24 (out of 50 gates) in a plastic-encapsulated IC package.
The topmost 15 or so gates,
as you might expect, were
featureless (solid black)
because there were no ultra-
sonic reflections from the
mold compound. At gate 22
in Figure 4, the die and lead
fingers are just coming into
view. In gate 23, there are
numerous non-bonds (red)
between the lead fingers and
the mold compound, and
also along the tape. Gate 24
lies slightly deeper; only scattered defects on the tape and on the lead
fingers are visible.
TIME DIFFERENCE MODE A recently developed AMI mode lets the user measure and map the
flatness of an internal feature. It is handy for determining whether the
die in an IC package is tilted, as well as mapping features that should
be flat in other parts. Called the Time Difference Module, it records the
time, in nanoseconds, between the launch of a pulse and the arrival
of the returned echo. It does this for each of the millions of pulses
launched by the transducer during the scan. A color is assigned to each
range of arrival times, which determines the distance to the interface
from which the echo was reflected. The result is a color map showing
the tilt of the die, or, with other features, the details of warping.
This method was used to map the flatness of one ceramic raft in an
IGBT module, as shown in Figure 5. The rainbow-like bands indicate
the distance of each point on the raft’s surface from the transducer.
The magenta area at bottom is farther from the transducer and thus
the lowest portion of this warped raft. Moving upward, the red-orange
area is highest, except for the narrow black band above it. To make
this image, the transducer pulsed ultrasound into the surface of the
heat sink at the bottom of the IGBT module, and echoes were gated
on the solder bonding the heat sink, and on the raft. The black band
represents a region where warping has pushed the solder aside and
made contact with the heat sink.
The scattered irregular features are voids (air bubbles) in the solder.
Their colors indicate their depth in the solder. Two large red voids, for
example, are close to the heat sink.
SUMMARYMost large-scale component screening today uses Amplitude mode or
Thru-Scan mode. There are also innovations that do not involve new
imaging modes. One example: programming the scanning of a tray
holding a few large parts so that only the parts, and not the unoccupied
areas of the tray, are scanned. Overall, new AMI developments have
made component screening more informative and more effective.
Tom Adams is a consultant to Sonoscan, Inc.
Figure 5: Acoustically imaged contours of a warped ceramic raft inside an IGBT module.
Fall 201518
SPECIAL FEATURE
Overcoming High-Speed Networking Constraints The challenge of bridging from external Ethernet to alternative internal fabrics.
In the commercial and residential world, networking
has become relatively simple; typically there is an
ingress point that is fanned out to any number of com-
puter nodes via Ethernet switches. The main challenge
is to balance the bandwidth of the incoming connec-
tions with user needs as they scale up and down. This
has driven a steady rise of a few orders of magnitude in
the speed of wired Ethernet: bandwidth is usually the
most important consideration rather than space and
power consumption.
Within an embedded computing environment, net-
working can be a little more complex. Instead of having
a High Performance Computer (HPC) made up of lots
of separate boxes linked by external cables, a High Per-
formance Embedded Computer (HPEC) is more likely to
consist of a single box with multiple boards or modules
linked together by a backplane. This may be further
complicated by more stringent latency requirements demanded by
real-time embedded applications, leading to the use of different
internal networking connectivity that is not Ethernet. This article will
explain in more detail why this is necessary, show what the challenges
are in bridging from external Ethernet to alternative internal fabrics
and look at a middleware solution that enables standard Ethernet
socket based applications to run without change even though the
underlying network interface is different.
POWER CONSUMPTION, UAVS AND SOLDIERSFor over a decade there has been a move in the embedded world to
use high-speed serial fabrics on the backplane. The primary driver
has been the need to improve networking performance especially
when compared to legacy parallel bus standards like VMEbus and
CompactPCI. One question often asked is, ‘why doesn’t the embedded
community universally adopt Ethernet as the backplane fabric of
choice? The answer is that whilst Ethernet provides excellent scal-
ability it doesn’t score so well on power consumption and latency
compared to alternatives such as PCI Express (PCIe) and RapidIO that
are more critical for many embedded applications.
Most processor silicon has native PCIe connectivity and this can be
used across a backplane fabric without any extra bridge silicon, leading
to a lower-power solution. Power consumption is much more an issue
in mobile embedded computer deployments. The military
market uses the phrase Size, Weight and Power (SWaP)
specifically to emphasise how critical this is. Every extra
watt of power consumption leads to shorter battery life,
more complex cooling solutions and more weight. There
are numerous articles on the issues caused by the weight
of the packs that our dismounted soldiers have to carry
and the effect it is having on their health.
In the case of Unmanned Aerial Vehicles (UAVs), the
payload weight has a direct link to the time they can stay
airborne and even whether they can take off. The internal
networking fabric can have a critical effect, for example
the author’s company now often publishes power
consumption figures showing the effect of disabling
Ethernet ports or running them at lower speeds. This
can make a substantial difference to the overall power Figure 1: Throughput Comparison
By Nigel Forrester, Concurrent Technologies
“…each Ethernet port running at 10G speeds can add as much as 4W compared to running
the same port at 1G speeds.”
-
www.generalstandards.com 8302A Whitesburg Drive SE
Huntsville, AL 35802 PH: (800) 653-9970 PH: (256) 880-8787
Fax: (256) 880-8788 [email protected]
LOANER BOARDS
Fall 201520
SPECIAL FEATURE
consumption; each Ethernet port running at 10G speeds can add as
much as 4W compared to running the same port at 1G speeds.
APPLES TO APPLES?Whilst PCIe is more power efficient than Ethernet it is not so easy to
scale. PCIe was conceived as the way to connect high-speed peripherals
to the processor in the personal computer domain, where the processor
is the root and the PCIe endpoints are the branches of a tree-like
structure. It’s not so easy to use PCIe in a cluster type of arrangement
where each node has equal standing and may want to access resources
in other nodes. To achieve this typically requires additional devices
with non-transparent bridge capability, which in turn increases the
overall power consumption and complexity.
There is another alternative networking fabric that is able to scale
using a flexible topology and which has the benefit of low and deter-
ministic latency—RapidIO. Low latency is particularly important for
embedded applications that need to process data between different
types of boards (FPGA/DSP/GPU/CPU) and that need to guarantee
latency to ensure correct operation. The ability to read data from the
memory of a different board in a specific time period is one of the
reasons why RapidIO is used as the basis for nearly all 3G and 4G wire-
less basestation deployments. We take mobile phones for granted, but
the technology to guarantee that our voice messages are not lost or
garbled even during handovers in real time across cells, depends on
the low latency characteristics of RapidIO. The latency that can be
achieved using RapidIO performing a remote read operation can be
less than a microsecond, compared to several microseconds with 10G
Ethernet using TCP/IP.
However, it’s not always clear that we are comparing apples to apples
with this type of comparison for the embedded systems designer. The
higher latency measured with Ethernet is partly because the TCP/IP
stack relies on software to make sure that messages are received and
ordered, unlike PCIe and RapidIO, which are based around built-in
hardware solutions. On the other hand, far more applications engi-
neers are familiar with programming in an Ethernet socket based
environment and numerous off the shelf applications are available for
clusters from the high-performance computing world.
CAPITALIZING ON ALTERNATIVE NETWORKING FABRICSHaving considered use cases from the embedded world that dictate
the use of a networking fabric other than Ethernet, is there a way of
making alternatives like PCIe or RapidIO easier to use from a software
perspective? One potential solution is a product called FIN-S, which
is designed to run on VPX boards or AdvancedMC modules that slot
together in a rack or similar enclosure. FIN-S sits between the net-
working fabric and the application as a middleware layer, enabling off
the shelf applications to utilize standard socket interfaces irrespective
of the underlying networking hardware. As well as minimizing appli-
cation changes, FIN-S provides the additional benefits of the lower
latency and better throughput associated with either PCIe or RapidIO.
In order to provide a realistic comparison at a system level, Concur-
rent Technologies produced benchmarks to compare the latency and
throughput of three solutions using the same generation processor
and memory configuration. The standard Linux “iperf” network
benchmarking utility was used for various packet sizes, using:
A 10 Gigabit Ethernet adapter having a x8 Gen2 PCIe link to the CPU
FIN-S running on PCIe Gen2 x4 links
FIN-S running on RapidIO Gen2 x4 links
As can be seen from Figure 1, when using FIN-S the sustained
throughput was significantly higher than when using the standard
TCP/IP stack across a 10G Ethernet link. In addition, Figure 2 shows
that the latency when using FIN-S is much more stable irrespective of
the packet size.
BANDWIDTH IMPROVEMENT AND REDUCED LATENCYThe results in Figures 1 and 2 indicate that in an embedded multi-
processor solution with boards connected via a backplane, it is possible
to obtain both a networking bandwidth improvement and reduced
latency with a standard socket based application. Concurrent Tech-
nologies has recently updated FIN-S by adding a lightweight variant
that is easily portable to devices like FPGAs and GPUs. Concurrent
Technologies has also been working with the RapidIO Trade Associa-
tion to improve its Datapath Application Interface and is working to
put the relevant parts of FIN-S into the open source community as a
way of speeding up the development of and the innovation in high-
performance embedded computer systems.
Nigel Forrester is technical marketing manager at Concurrent Technologies
plc with responsibility for product strategy and promotion across VPX,
AdvancedMC, CompactPCI and VME form factors. Nigel has previously
held a number of product and vertical marketing roles in the embedded space
and is an accomplished speaker and author.
He has a B.Sc. (Hons.) in Computer Science and Statistics from Reading
University, United Kingdom and can be contacted at [email protected]
Figure 2: Latency Comparison
Fall 201522
SPECIAL FEATURE
Software Defined Radio (SDR) and specialized or high
capacity I/O. The 12.5 mm module is usually used for
data bus interfaces such as MIL-STD-1553, ARINC-
429, CAN Bus, Serial interfaces, etc. Additionally, the
smaller 12.5mm module has been utilized with Mini
PCIe mezzanine cards for Commercial-off-the-Shelf
(COTS) I/O, as well as a MEMS Inertial Navigation Unit
(INU), Global Positioning Satellite (GPS) receiver and
even the military GPS with SAASM functionality.
WHICH SOC PROCESSOR? With this thermal envelope in mind we will examine
several SoC processor choices for performing specific
compute tasks commonly required by airborne and
ground vehicle computers.
The AMD embedded “G-series” is an example of an x86
architecture SoC that uses 28nm process technology.
This SoC can be procured with either dual or quad
core processors, as well as an optional dual-port GPU.
Merging the CPU, GPU, Northbridge, Southbridge
and multiple I/O chips into one highly integrated SoC
processor, the AMD SoC design offers a 33 percent foot-
print reduction over last year’s less-integrated model,
and more than 60 percent reduction as it compresses
4 or 5 chips to just a single highly integrated SoC pro-
cessor. There are several available processor choices
with either 2 or 4 CPU cores, several different clock
speeds, and multiple GPUs. SoC power consumption
for this family ranges from 6 Watts to 25 Watts Total
Dissipated Power (TDP). The capability afforded by this
robust CPU and its dual-port GPU (aka “APU”) rivals
what was achievable with a large power hungry 3U SBC
System on a Chip Technology Improves Small Form Factor PerformanceThe SBCs that demanded more than its share of elbowroom and was piggish
on power is giving way to airborne and ground vehicle computers that rely
on SoC processors to curb power appetites and shrink footprints.
Not too many years ago, a typical embedded Single Board Com-
puter (SBC) was manufactured using a Central Processing Unit
(CPU) and a “Chip Set,” a defined set of discrete function LSI integrated
circuits. The CPU was a stand-alone single-core microprocessor that
was connected to a “Northbridge,” also known as a Memory Controller
Hub (MCH). Wired to the MCH was one or more Random Access
Memory (RAM) banks, as well as the “Southbridge,” also known as
the I/O Controller Hub (ICH). The ICH provided the disk drive con-
troller, Ethernet controller and audio. The Southbridge was typically
connected to a “Super I/O” chip which provided keyboard, mouse,
serial and parallel ports, an external graphics controller and FLASH
memory for the BIOS. This classic architecture utilized a ton of chips,
required a boatload of space and consumed a lot of power.
MORE CORES, MORE SPEEDToday’s System on a Chip (SoC) technology has integrated most of this
functionality onto a single chip. The RAM and BIOS FLASH banks
remain external. The single-core CPU has given way to multicore
processors, and many have options to include one or more multicore
Graphics Processing Unit (GPU) engines. Yesterday’s parallel PCI bus
has generally been replaced with the much faster serial PCI Express
(PCIe) bus, most running today at Gen2 speed, but on the cusp of
transitioning to Gen3 speed. Today, the number of SoC CPU processor
cores ranges from 1 to 8, with different versions supporting a variety
of clock speeds depending on performance sought and power avail-
ability. Optional GPUs are often integrated into the same package;
operating as either a GPU or General Purpose Computer on Graphics
Processing Unit (GPGPU).
VNX, also known as VITA 74, is a relatively new Small Form Factor (SFF)
standard that is gaining acceptance in the marketplace. Born in the VITA
Standards Organization (VSO), this SFF Standard has been created to be
electrically similar to VPX, but at half the Size, Weight, and Power (SWaP).
By design, it is only available as a conduction-cooled module. VNX is being
positioned as a lower SWaP and lower cost (SWaP-C) addition to the VPX
family, able to perform well for the applications where the performance
of the SoC is adequate, allowing significant SWaP and cost savings over
conduction-cooled variants of VPX.
The baseline VNX specification defines two module sizes, 12.5 mm and
19 mm. These modules are currently rated at 10 and 20 Watts respec-
tively, although newer cooling techniques have seen typical use cases
rise to 15 and 30 Watts without issue. The 19 mm module is generally
used for SBC, Video Image Processor (VIP), FPGA functions such as
Figure 1: 19 mm VNX module.
By Bill Ripley and Wayne McGee, Creative Electronic Systems
Bill Ripley,Creative Electronic
Systems
Wayne McGee,Creative Electronic
Systems
23
SPECIAL FEATURE
www.eecatalog.com/military
Figure 2: Smart Terminal
Figure 3: Rugged Mission Computer
with an adjacent 3U GPU board at twice the power, 4x the volume, and
2x the cost. This VNX AMD “G-SoC” SBC can provide computing and
graphics ability to drive two independent high definition digital video
displays, making it ideal for Display Processor, Mission Computer, or
with its GPS module, Digital Map applications.
The Intel Atom E3800 processor of the Celeron family, formerly known
as Bay Trail, is Intel’s first SoC designed specifically for intelligent sys-
tems. This SoC utilizes Intel’s 22nm process technology. Based on the
4th generation Haswell technology, the Bay Trail design offers a similar
condensed architecture as its AMD rival, but is aimed at a slightly lower
SoC TDP range of 5 to 10 Watts, and can scale from 1 to 4 CPU cores.
The Bay Trail GPU is modeled after the Ivy Bridge internal GPU. Similar
to the AMD processor, the VNX Bay Trail processor is well suited for
Mission Computer, Display Processor, or SIGINT applications.
The Freescale/NPX QorIQ P2041 is a quad core Power Architec-
ture SoC using the e500mc engine. This processor brings high-end
architectural features pioneered recently by the P4 platform to the
low-to-mid range quad core processor space. It is software compat-
ible with some of the P1 family and all of the P3, P4 and P5 families.
Use of this SoC allows customers to readily scale their application
software throughout the entire QorIQ product spectrum. This SoC
does not have an internal GPU. The Freescale processor brings SWaP
optimized computing to the SFF marketplace and includes a hardware
hypervisor for safe partitioning of operating systems between cores,
as well as sophisticated data path optimization. Additionally, the CPU
includes a trusted boot capability to ensure only the correct code is
booted and is designed so that the code may not be reverse engineered.
The Freescale processors are well suited for Safety Certifiable applica-
tions, SIGINT, ELINT and Mission Computing applications.
The NVIDIA Tegra K1 combines a 64-bit quad core “Denver” ARM
processor with 192 supercomputer-class GPU cores built on NVIDIA’s
Kepler architecture. With a similar target market as the AMD SoC
described above, the K1 gives the customer full support for CUDA
6.5, DirectX 11 (with Tessellation), and OpenGL 4.5; all this in a very
small SoC footprint. The CPU consists of an NVIDIA “4-Plus-1” Quad
Core ARM Cortex A15 processor at 2.3 GHz, using 28 nm Process
Technology. The NVIDIA processor is ideally suited for GPGPU appli-
cations already written using the CUDA toolset, as well as high-end
graphics and low-power computing applications.
Multiple Operating Systems are being supported by these SoC designs.
The AMD offering supports Linux, Windows, VxWorks, Integrity and
Deos, along with the CoreAVI OpenGL and OpenCL on VxWorks. The
Intel processor supports Android, Windows, Linux and VxWorks. The
NVIDIA processor supports Linux, along with OpenGL and CUDA.
The Freescale processor supports a wide variety of Real Time operating
systems, including VxWorks and Integrity, as well as Linux.
PROMPT DEPLOYMENTVNX is not a system specification, but instead defines the hardware
at a plug-in module level. The flexibility inherent in the VNX speci-
fication allows the modules to be packaged according to the system
designer’s need. A smart terminal such as that shown in Figure 2
or rugged mission computer shown in Figure 3 are just two of the
packaging possibilities. The wide variety of processor options avail-
able in this form factor enable prompt deployment of the appropriate
processor for the particular application, in a SWaP optimized system.
Wayne McGee is the vice president of sales and general Manager for North
American Operations for Creative Electronic Systems SA. Wayne has
served in various senior management positions in his career and has more
than 30 years of experience in the VME, CompactPCI, ATCA and VPX
markets. Wayne is also the chairperson for the VNX VITA-74 Marketing
Alliance. Companies Wayne has worked for include Motorola Computer
Group, VMIC, SBS Technologies and GE Intelligent Platforms. He holds a
BSEE from the University of South Carolina.
Bill Ripley is the director of business development for the North American
Operations of Creative Electronic Systems. Bill has served in various
Consulting, Business Development, Product Management, Sales and Mar-
keting roles in the Embedded Computing marketplace for over 15 years
with Creative Electronic Systems, Themis, GE Intelligent Platforms and
SBS Technologies. Prior to these, Bill spent 23 years with Bell Helicopter
performing electronic design and integration of avionic, flight control,
electrical and electronic warfare systems on a variety of commercial and
military aircraft including the CV/MV-22 and M609 tilt-rotor aircraft, as
well as the OH-58D, AH-1W, M412 CFUTTH, M407 and M222 helicop-
ters. He holds a BSEE from the University of Texas at Arlington.
Fall 201524
SPECIAL FEATURE
Drones, Security, the IoT and More Find the Mil/Aero and Commercial Worlds Looking for Common Strengths On the topics of security, unmanned vehicles, and the IoT—to name just a few—the mil/aero and
commercial worlds face common concerns—yet many issues continue to demand starkly different approaches.
Our thanks to this issue’s round table panelists: Todd
Wynia, vice president, communications products,
Artesyn Embedded Technologies; Andrew Girson, CEO of
Barr Group; Wayne McGee, vice president of sales and gen-
eral manager for North American Operations for Creative
Electronic Systems (CES); Jim McElroy, vice president,
marketing, LDRA; Nigel Forrester, technical marketing
manager, Concurrent Technologies; Rodger H. Hosking,
vice-president and co-founder of Pentek, Inc.; and Ian
Shearer, managing director, VadaTech Ltd.
Chris A. “C2” Ciufo, Embedded Systems: With
so much attention on UAVs, UAS, UCAV and other
drones—and cheap hardware—what effect will this
have on the behemoth multi-billion dollar UAVs funded
by the world’s Western governments? And...will we see
Arduino COTS boards replacing VPX anytime soon?
Ian Shearer, VadaTech: The interactions among
mil/aero, communications, gaming/leisure, etc. are
fascinating when you consider what has driven silicon
design over the last 20-30 years, and UAVs are another
such interaction. Defense programs make use of much
of the same core technology as used in ‘prosumer’ drone
products, but the way that technology is implemented
is quite different. The difference between a product
that works well for civilian use and one that is mission-
critical is immense. And that probably explains why
Arduino will have a limited impact on mil/aero—at
least in the near term. Open source hardware certainly
has the potential to have a real impact in defense, as in
other markets, but the barriers to adoption are higher
than in most non-defense spaces.
Todd Wynia, Artesyn: As the FCC has eschewed the
use of open source for wi-fi devices for reasons of secu-
rity vulnerability, we believe the defense industry will
similarly block the use of open source like Arduino for
drones. However, the widespread civilian use of drones
is likely to drive the development of new and cost effective technolo-
gies that may be replicated in defense applications.
Wayne McGee, CES: Even small drones can present hazard issues.
There are many reports of accidental injuries from small drones.
The bigger, faster drones are far more dangerous if they lose control.
Operators will need liability insurance to protect themselves from
accidents resulting in lawsuits, and it is likely that drones large enough
to be lethal will require safety certified control electronics in order to
warrant coverage. If you drop a large UAV in a war zone it is called
collateral damage. Drop one in the U.S. on a school and heads will roll.
Jim McElroy, LDRA: First of all, we anticipate rapid advancement in
the capabilities of the commercial products, and these will ultimately
drive the capabilities in the defense industry. However, defense sys-
tems will need higher levels of security and safety, as these systems
are higher-valued targets for enemies of the United States. The defense
unmanned systems will continue to be more sophisticated and capable
with larger and more complex payloads. No question that more and
more COTS hardware and software will be incorporated into these end
systems; however, the process of vetting and authenticating these solu-
tions will need to be in place.
Rodger Hosking, Pentek: Over the next five years, strict local and
federal government regulations on UAVs will be developed and imple-
mented. They will be driven by commercial, civilian and military flight
safety, homeland, military and intelligence security for government
bases and installations, personal and corporate privacy, and personal
safety. Mandatory licenses requiring identification transponders may
be required. Advanced detection, identification and destruction sys-
tems will protect restricted areas.
C2: Long-term programs like F-35 (USAF) and WIN-T (Army) are now
in full production and deployment. Yet programs like these started
over 10 years ago. If technology evolves 2x per year, how can the DoD
hope to “tech refresh” platforms that are so out-of-sync with the com-
mercial world?
By Chris A. Ciufo, Editor-in-Chief, Embedded; Extension Media
Ian Shearer, VadaTech
Wayne McGee, CES
Todd Wynia, Artesyn
Jim McElroy, LDRA
Rodger Hosking, Pentek
Nigel Forrester, Concurrent
Technologies
Andrew Girson, Barr Group
25
SPECIAL FEATURE
www.eecatalog.com/military
Nigel Forrester, Concurrent Technologies: Compared to 20 or
even 10 years ago, there has been a change with the military adopting
more COTS based technology, which enables the potential for tech-
nology transitions using open standard form-factors like VPX. With
products available from a wide ecosystem of vendors who are con-
stantly updating their portfolios to use the latest technology there is
more scope to stay in sync, if and when the opportunity is right. We
work hard to make sure we offer backwards compatibility options even
when we introduce new features—specifically to help transitions.
Shearer, VadaTech: COTS and MOSA. MOSA because a Modular
Open Standards Architecture, within a well-managed program, allows
tech refresh to benefit from technology updates without a forklift
approach. COTS because commercial off-the-shelf hardware will
generally be kept up-to-date with technology evolution. All of which
avoids the questions of revalidation against requirements, legacy
product support to put the customer in control of refresh cycles and
maintaining compatibility across product generations. In common
with other COTS vendors specializing in supporting defense pro-
grams, we have an organizational infrastructure for supporting prime
contractors who have to deliver long-life programs.
Hosking, Pentek: To the extent these systems are based on open
standards like VPX, new technology updates are easier. Older sub-
systems can be replaced with newer open standard counterparts to
streamline future upgrades and extend the useful lifecycle of these
important programs.
Wynia, Artesyn: Platforms like ATCA that are used in both commer-
cial and defense applications keep up with the latest technology and
help to future-proof defense applications.
McGee, CES: There are a number of reasons why weapons programs
take so long to deploy. Proprietary closed systems will be threatened in
the future if initiatives such as FACE are successful. Customers are also
finding opportunities to do “minor upgrades” to a board or system by
exchanging old boardsets or subsystems with COTS replacements. You
might set up a spiral program where you plan for 3x minor upgrades to
every 1x major technology refreshes. As we, the merchant board and
system providers, become better at managing slot profiles and differ-
ential functionality, it will be less likely that our customers will have to
throw out everything and start from scratch every few years.
McElroy, LDRA: More and more software will be incorporated into
these systems to provide flexibility and extensibility for the future.
C2: Describe some of the ways you use FPGAs in your systems. With
Altera coming under Intel’s umbrella, does this change your plans for
FPGAs or FPGA vendors?
Wynia, Artesyn: We use FPGAs on our designs to add specific board
functions that off-the-shelf silicon solutions do not provide. These are
typically I/O, register and logic functions. With Altera joining Intel
we can envision future CPU generations having FPGA capabilities
built into the CPU that directly connect with the core architecture
via high-speed interfaces. This could allow for product
customization almost in real-time to fit a design to spe-
cific applications such as crypto hardware acceleration
in security applications or DSP capabilities for radar
signal analysis.
McGee, CES: We are finding many applications that
require manipulation and analysis of video, high-speed
telecommunications, RADAR and weapons. These tasks
had previously been done by power hungry compute
platforms, filled with ASICs and other specialized
hardware. Today, a reasonably powered SBC with Intel
Architecture processor with GPU/ GPGPU on board and
an FPGA provides a great way to integrate these func-
tions together in a small, scalable package. Our latest
Intel-based VPX and VNX processors are architected
like this. Having a one-stop support establishment
with Altera FPGAs and Intel CPUs is still a ways off. The
technologies are sufficiently complex that one guy can’t
really support both technologies as well as the separate
support teams. Many customers are fans of the “other
guys” chips, whether that be AMD, ARM, Xilinx or
Actel. Momentum is hard to change.
Forrester, Concurrent Technologies: Today we offer
processor boards based on Intel processor technology,
which are integrated along with separate FPGA boards.
With Intel’s acquisition of Altera, we are looking
forward to seeing how their joint technology can be
applied in the embedded board market.
Hosking, Pentek: Virtually every component in our
software radio products connects to the FPGA for spe-
cialized interfaces, control and status registers, digital
signal processing, data formatting, DMA transfers,
clocking, synchronization and PCIe host communica-
tion. SoCs with substantial FPGA capabilities are now
available from both Altera and Xilinx, allowing vendors
to shift many of the system host control and status
functions to the on-chip CPU. This supports a high level
host API that simplifies host tasks for more efficient
system operation, faster development cycles and easier
upgrades.
Shearer, VadaTech: As well as ‘internal’ FPGA usage,
we have a broad product range where the FPGA is
exposed for customer use, typically coupled to one
or more FMC (VITA-57) sites, or to ADC or RF sub-
systems for sensor processing. Our customers use these
“If you drop a large UAV in a war zone it is called collateral damage. Drop one in the U.S. on a school and heads will roll.”
Fall 201526
SPECIAL FEATURE
FPGAs for anything from filtering/down-conversion for
RADAR, to waveform synthesis for SDR, to full-blown
application implementation. Our products are based on
both Altera and Xilinx FPGAs, since customers typically
select between the two on the basis of factors outside
our control. We also have a strong positive relationship
with Intel, and the capabilities that make Altera attrac-
tive to our customers will likely continue to receive
investment, so there is no impact on our current plans.
C2: Security is finally starting to move the needle on the
general embedded market. Companies like ARM, Intel,
McAfee and others are citing mil/aero specifications
and procedures as examples of what the commercial
industry/ies need to emulate. What are your thoughts?
McElroy, LDRA: The mil/aero market’s rigorous
approach to system and software development stan-
dards should be used as the benchmark in developing
critical systems. That said, the mil/aero standards
historically have been very much focused on functional
safety. There is more that can and should be done
to address all facets of security — from security risk
analysis to the development of security requirements
for software code that is less vulnerable to attack. This
shift ensures that systems from an architectural per-
spective are secure and resilient, as well as software,
firmware, and hardware authentication.
Wynia, Artesyn: The need for high-density security
solutions spans most industries. Defense applications
have led the charge for security, given what’s at stake
if a breach in defense systems occurs. So it’s not sur-
prising that other industries look to emulate the best
security practices developed by the military. We have
teamed with Clavister to offer very high-density secu-
rity solutions and can provide them on ATCA bladed
server architecture and in PCIe-based systems.
Andrew Girson, Barr Group: Awareness is an impor-
tant factor when it comes to embedded systems security.
But many companies still don’t consider security to be
a feature worthy of investment. Until managers and
executives view security as a necessary feature that will
increase sales of their products or reduce costs, security
will continue to languish in embedded devices. We’ve
found that arguments for improvements in embedded
software safety carry more weight at the corporate
level, and we emphasize that safety and security are
intertwined—that is, taking care to design a safer and more reliable
system will improve security as well.
McGee, CES: As we move forward in time, creative people and coun-
tries are always looking for the most innovative ways to hack into our
systems, regardless if they are a big cloud storage system or a small,
limited functionality, embedded system in some random ground
vehicle. Defense experts have known for a while that if there is a weak-
ness found, someone will exploit it. The policy makers are not keeping
up with the “canaries in the coal mines” that are warning of the risks.
In the near term, merchant board vendors have a lot of technology
they can bring to the table in order to keep small systems safe. But
nobody wants to fund the development of the software and hardware
required to keep pace with the problem because the requirements are
not clearly spelled out, and the threats are constantly changing.
Forrester, Concurrent Technologies: Military grade security
features, by definition, need to be incredibly robust and are part of
the fundamental design. With more commercial embedded products,
the design cycle tends to focus on features and cost—leaving secu-
rity features to be bolted on. There should be a change in the design
methodology to address security earlier in the cycle. Some military
grade security features may not be appropriate in other markets. For
example, it may not be desirable to execute a secure erase to render
an industrial device inoperable if someone tries to attempt a software
update.
C2: Name some of the features—hardware and software—you are
building into your products that relate to security.
McGee, CES: There is a fair amount of “low hanging fruit” that can
be implemented, the first of which is the “Trusted Platform Module”.
There are several vendors for this component, but not uniform opin-
ions on what BIOS, hardware and software changes are required to
go along with this technology, particularly when the requirements for
its use have not been mandated yet. The ability to encrypt data, both
at rest and in motion, is becoming easier to accomplish. The ability to
disable unused ports is not too difficult to implement and could be
specified into advanced systems.
Physical interlocks that zeroize boards when cases are opened without
authorization are sometimes used. Last, and most important, is the
use of a Secure Operating System. This represents the most bang for
the buck because the costs of development can be spread out over a lot
of programs and “seats.” With a Secure OS, you are defending much
closer to the source of the problem.
McElroy, LDRA: One is static code analysis, which enables our cus-
tomers to examine their code following secure coding standards, such
as CERT C and CERT C++, as well as CWE. With static code analysis
and programming standards, checking developers are able to build
more security into their code from the beginning, making it less vul-
nerable to attack.
“There should be a change in the design methodology to address security earlier
in the cycle.”
27
SPECIAL FEATURE
www.eecatalog.com/military
As well we have dynamic code analysis, a means by
which customers can measure the effectiveness of their
testing process, i.e., what code has been executed, what
code has not, and what code may be dead or unused. The
combination of static and dynamic analysis provides a
robust suite of tools, from reducing code complexity, to
making code more clear, concise, maintainable, and less
vulnerable to attack.
Automated unit/integration testing enables our
customers to automate the process of testing their
individual software units or integrated software com-
ponents to achieve high coverage and quality analysis.
And security requirement traceability makes it possible
for customers to link their particular security require-
ments to the design, development and verification
activities and artifacts. With this level of traceability
one can easily audit the software development life cycle
and ensure proper development procedures were fol-
lowed.
Hosking, Pentek: Our XMC, PCIe and VPX products
based on Xilinx Virtex-7 FPGAs include our GateEx-
press FPGA Configuration Manager, which allows the
system host to reconfigure the FPGA as a software
task, without the need to reboot the system. UAVs
receive secure radio link updates to the FPGA bitstream
without returning to base. The new bitstream loads
only into the volatile memory of the FPGA, thwarting
recovery of sensitive code if the UAV is captured by the
enemy.
C2: How has (or will) the IoT affect the military and
your own product roadmap?
Wynia, Artesyn: Many of the military IoT applications
require real-time response with very low latency. Our
PCIe system (MaxCore platform) offers a very low-
latency, high-density compute solution for aggregation
and real-time response close to the sensors. Use in
defense applications will drive ruggedization and fur-
ther partnering with security software providers.
McGee, CES: The military is clearly adopting a lot of
commercial technology and blending it into their MIL
proprietary systems. We try to participate in leading
edge organizations and working groups like VICTORY
and FACE in the USA, as well as MILVA in Europe. We
use these forums to listen to our customer and our
customer’s customer, as well as to keep abreast of the
evolving technologies. We, and the government end
user, are becoming much more interested in using COTS
when practical to reduce monetary and calendar risk to
a program.
McElroy, LDRA: IoT is a relatively new term for technology capability
that has been available for a long time. However, with the coining of
the term, the industry can now add flesh and definition to the straw
man that has been in place. The IoT will not significantly change the
military roadmap, with the exception of more emphasis being placed
on securing data both at rest and in transit. LDRA will continue to
enhance the capability of our products to address the evolving security
standards.
Shearer, VadaTech: Network-centric warfare has driven IoT-style
concepts into defense sensors and systems for some time. Now the
adoption of an IoT approach in non-defense applications will generate
synergy across segments that allow one segment to feed on another.
As the mass-market adoption grows, so the abundance of connected
sensors will mushroom and the processing/traffic requirements ramp
up as a result. Much of VadaTech’s customer base is leading edge, so we
already have 100 GbE line cards and ultra wideband signal acquisition.
Those have niche usage at present, but the inexorable growth in band-
width demand is bound to be fed the ‘everything connected’ approach
expands.
C2: As the PowerPC architecture gives way to Intel’s x86 in many
applications, will ARM supplant—or supplement—Intel in high-rel
embedded systems?
Wynia, Artesyn: Many ARM solutions are lower power than x86 solu-
tions and the ubiquity of ARM processors helps drive the cost down. So
in applications where SWAP is an issue, such as mobile and battlefield
applications, ARM could supplant Intel. But changing processor archi-
tectures is not trivial and typically has huge software implications.
Therefore ARM is more likely to be used in greenfield applications
rather than retrofitting existing applications.
McGee, CES: For applications that require bunches of traditional
compute power Intel will continue to dominate. Applications that can
make use of GPGPU technology or have SWaP restrictions will likely
see ARM or ARM hybrids like the Tegra series. IA processors tend to
be more power hungry than ARM processors. The time will soon come
that will show that a cluster or network of small processors will out-
perform a big “monolithic” processor for many tasks. We are looking at
ways to dynamically turn off or reallocate unused processor banks in
order to match the processing ability to the demand, as well as improve
the MTBF and overall availability of a system.
C2: What effect will Intel’s 6th generation Core family (i5/i7/Xeon)
have on the mil/aero/defense market besides “yet another new CPU on
a commodity SBC”?
Forrester, Concurrent Technologies: Many of the defense solutions
that use our Intel based processor boards also utilize separate GPU and
FPGA boards as acceleration engines. For several generations, Intel
has been improving the number and capability of the GPU cores in its
processor devices. When used commercially, the GPU cores power better
visuals, but many of the rugged programs we work with do not have local
Fall 201528
SPECIAL FEATURE
displays. Making use of these GPU cores to speed up ele-
ments of the application can have a direct SWaP benefit.
Wynia, Artesyn: The GPU that’s a part of that
architecture is a powerful engine for high-density,
high-resolution video transcoding. This can be used
for streaming video communication as well as video
surveillance.
McGee, CES: The typical programs we see take between
three to five years to go into production. Looking at it
from a safety critical perspective, newer is not easily
certifiable. Not many programs want to admit that
they will knowingly redesign with the latest processor
right before they would normally go to certification, so
depending on the application, older (“good enough”) is
often perceived as better. Getting away from a safety
certified system gives lots of opportunity to go with the
best processor available at the time. We are building
Gen5 today, so customers are starting their non-safety-
critical designs with Gen4 or Gen5 and riding the
pedigree to the best near term processor in the family.
C2: Hacking, exploits, attack surfaces...these terms are
becoming popular among the general population (out-
side of tech). How do some of these negative instances
affect your product planning and your customers?
Shearer, VadaTech: As a supplier of dual-use tech-
nology that goes into commercial communication
systems as well as mil/aero, VadaTech is used to a
customer base that is proficient at addressing such
concerns. The terminology changes from market to
market, but the underlying requirements are often very
similar. The realistic concerns, and sometimes the hype,
can impact how we communicate the features of our
systems, but the core capabilities are in place already.
Customer interactions across market segments will
generally cover such topics sooner or later.
Girson, Barr Group: We are starting to see more
interest in improving embedded systems security from
the companies and engineers with which we interact in
our training and consulting. It is difficult to attribute
this to any specific event or circumstance, though the
horror stories in the media of automobiles being taken
over and credit card numbers being stolen are catching
the attention of product managers. Converting these
concerns into requirements and features that improve security within
new products is the challenge, though.
McGee, CES: We have an option on some of our SBCs for a Trusted
Platform Module (TPM). However, we have not seen consistent
requirements for it from our customer base. System security means
different things from company to company and we have not seen a
consensus on a plan towards implementation yet.
Forrester, Concurrent Technologies: We have been offering
specific board security features targeted to the military space for
several years. Designed to help prevent access to sensitive data and
stop tampering, the documentation on these features is only available
on a ‘need-to-know’ basis even within our own organization. Putting
the necessary measures in place to control this information requires
careful planning and rigorous implementation, perhaps more so now
that general awareness of security is increased.
McElroy, LDRA: For our customers in the critical software markets,
it’s imperative that they build in security from the beginning. It can’t
be bolted on haphazardly. These terms have increased visibility in
markets such as aerospace, defense, industrial, automotive, medical
and rail transportation. From a product-planning perspective, LDRA
will continue to focus on helping our customers produce both safety-
and security-critical software. These terms are not new to us, although
our customers in the “hot new” security markets like automotive and
medical are noticing solutions already in place in the mil/aero and
industrial markets.
Hosking, Pentek: Although no panacea, many of our customers have
moved away from Windows platforms to various versions of Linux
for improved security, visibility and control of the entire embedded
software package.
Chris A. Ciufo is editor-in-chief for embedded content
at Extension Media, which includes the EECatalog.com,
Embedded Systems Engineering, Embedded Intel® Solutions,
and other related blogs and embedded channels. He has 29
years of embedded technology experience, and has degrees in electrical engi-
neering, and in materials science, emphasizing solid state physics.
29
SPECIAL FEATURE
www.eecatalog.com/military
Hot Topics at VITAThe activity of VITA members, sales with the supplier members and program designs with the user members
are all candidates for the hot topic list. With plenty of new technologies hitting the market, design wins are
mounting and major programs are deploying. Just what technologies are driving the latest programs?
By Jerry Gipper, VITA
VPXTop on the list is VPX. Introduced ten years ago, the
technology is reaching unit volume deployment in
several major programs. VITA members have been
indicating that they are receiving production orders
on programs every day and report they are busy with
customers finishing up designs, with new opportuni-
ties emerging. Several working groups are deep in the
development of ancillary specifications that support
VPX designs.
ANSI/VITA 46.11: SYSTEM MANAGEMENT ON VPXVITA 46.11 “System Management on VPX” completed
the VITA and ANSI processes reaching full recognition
as ANSI/VITA 46.11-2015 in July. The specification
defines a framework for System Management in
VPX systems. It enables interoperability within the
VPX ecosystem at the Field Replaceable Unit (FRU),
chassis and system levels. The framework is based
on the Intelligent Platform Management Interface
(IPMI) specification and leverages many concepts and
definitions from the AdvancedTCA® (ATCA®) specifi-
cation by PICMG.
VITA 46.11 took on the challenge of defining a set
of physical, logical and protocol requirements to
standardize the management of VITA 46 and VITA
65 compliant modules and backplanes. ANSI/VITA
46.11 provides a true solution for systems man-
agement interoperability across various hardware
and software vendors, chassis suppliers, systems
integrators and end users. It provides consistent
management capabilities and behaviors for these dis-
parate elements, and it provides a robust framework
that allows individual implementers to add their own
enhancements without impacting interoperability.
ANSI/VITA 65: OPENVPX ARCHITECTURAL FRAMEWORK FOR VPXThe OpenVPX architectural framework specification is a living docu-
ment that is continuously being updated with new profile information.
The working group is reviewing clocking, keying and nomenclature
proposals for the next release.
VITA 66.4: OPTICAL INTERCONNECT ON VPX – HALF WIDTH MTThe VITA 66 base standard defines physical features of a stand-alone
compliant blind mate Optical Inter-connect for use in VPX systems.
This standard defines a half width MT style contact variant. VITA 66.4
has completed the ANSI public review ballot and the working group is
reviewing comments. The work being done on VITA 66 is some of the
early work leading to optical backplanes in the future.
VITA 78.0: SPACEVPX SYSTEMSIn April, VITA 78 “SpaceVPX Systems” completed the VITA and
ANSI processes reaching full ANSI recognition as ANSI/VITA 78.00-
2015. ANSI/VITA 78 defines an open standard for creating high
performance fault tolerant interoperable backplanes and modules to
assemble electronic systems for spacecraft and other high availability
applications. Such systems will support a wide variety of use cases and
potential markets across the aerospace and terrestrial communities.
This standard leverages the OpenVPX standards family and the com-
mercial infrastructure that supports these standards.
The goal of SpaceVPX Systems is to achieve an acceptable level of fault
tolerance while maintaining reasonable compatibility with OpenVPX
components, including connector pin assignments. For the purposes of
fault tolerance, a module is considered the minimum redundancy element.
“The FMC specification is the most frequently downloaded specification in the inventory of nearly 100 VITA specifications.”
Fall 201530
SPECIAL FEATURE
VITA 78.1: SPACEVPX LITE SYSTEMSThis effort leverages the work done on
ANSI/VITA 78 to create a specification
with an emphasis on 3U module imple-
mentations. The most significant change
from SpaceVPX is to shift the distribu-
tion of utility signals from the SpaceUM
to the System Controller to allow a radial
distribution of supply power to up to
eight payload modules. The working
group is developing a draft document of
the specification.
VITA 75: VNXVNX is a small form factor that is loosely
based on VPX for the electrical intercon-
nection but in a smaller, more rugged
package for mobile applications such as
those found in the U.S. Army VICTORY
program. The VITA 75 specification has
been in VITA Draft Standard for Trial Use
status since the fall of 2012. The working
group is reforming to consider enhance-
ments before taking the specification to
the full ANSI/VITA accreditation level.
VITA 57.4: FMC+The VITA 57.4 FMC standard extends
the original VITA 57.1 FMC standard
by specifying two new connectors that
enable additional gigabit transceiver
interfaces that run at up to 28 Gbps and
eventually to 32 Gbps. It also describes
FMC+ I/O modules and introduces an
electro-mechanical standard that creates
a low overhead protocol bridge between
the front panel I/O, on the mezzanine
module, and an FPGA processing device
on the carrier card that accepts the mez-
zanine module. The working group is
reviewing pinout proposals and plans to
finalize a specification for working group
ballot by the end of this year.
The FMC specification is the most fre-
quently downloaded specification in the
inventory of nearly 100 VITA specifica-
tions. FMC is very popular in many
computer market segments that use FPGA
technology. The FMC Marketing Alli-
ance, formed in 2010, has more than 20
members that supply either FMCs or FMC
carriers in several different form factors.
VITA 17.1: FRONT PANEL DATA PORT (FPDP)This standard defines a multi-drop syn-
chronous parallel non-addressable bus
connection between multiple boards in a
single chassis. ANSI/VITA 17.1 has been
approved by ANSI for re-accreditation.
A VITA 17.3 working group was formed
recently to incorporate the Interlaken
protocol for packet transfers scaling
from 10 Gbps to 100 Gbps. The current
plan of record is for VITA 17.3 to be
based on 64B/67B encoding and support
channel bonding.
ANSI/VITA 49.X: VITA RADIO TRANSPORT (VRT)The VITA Radio Transport (VRT) stan-
dard defines a transport-layer protocol
designed to promote interoperability
between radio frequency receivers and
signal processing equipment in a wide
range of applications. The VRT pro-
tocol provides a variety of formatting
options allowing the transport layer to
be optimized for each application. The
ANSI/VITA 49.1 VITA Radio Link Layer
(VRL) standard specifies an optional
encapsulation protocol for VITA 49.0
(VRT) packets. The working group has
completed revisions to VITA 49.0 and
VITA 49.1; both were approved to be sub-
mitted for ANSI accreditation. The VITA
49a working group has completed a docu-
ment for control packet and spectrum
analyzer packet specifications and has
voted to submit for ANSI accreditation.
VITA 79: EMBEDDED PHOTONICSThis working group is chartered with
developing a standard based on work
done by the JEDEC 13.6 subcommittee
for photonics. This is the first step in
preparing a series of projects to address
using optical backplane technology
in the future. The working group is
currently working on developing an
environmental qualification document
that encompasses complimentary fea-
tures from various U.S. and European
standards.
SUMMARYThere are several other projects sup-
ported by active working groups.
Participating in these working groups
is a great way to influence the direction
of the next generations of technology
important to the critical embedded com-
puting industry. If you are involved with
any of these activities and your company
is not a VITA member then now is a great
time to join VITA. Contact VITA if you
are interested in participating in any of
these working groups and for details on
upcoming VITA Standards Organization
(VSO) meetings.
Copies of all specifications reaching
ANSI recognition are available from the
VITA website. For a more complete list of
VITA specs and their status, go to www.
vita.com/Specifications.
Jerry Gipper is executive director of VITA.
31
SPECIAL FEATURE
www.eecatalog.com/military
Navigating the Inevitable Component ObsolescenceAs today’s defense and aerospace programs move from their development phase into
production, the last thing a program manager wants to hear is “we have a looming
obsolescence issue” and—worse than that—“…and, we missed the last time buy.”
No matter how you parse the problem, component obsolescence
(CO) equals added costs—in many instances unplanned, and
unbudgeted, and that translates into program delays and program
cost overruns. And even with a preplanned technology insertion
roadmap, early component obsolescence is hard to predict and even
harder to counter.
Unfortunately, semiconductor companies today are driven more by
yields and profits, and less about the design-ins and consequences of
any one component’s early demise to our nation’s security. Component
obsolescence is now occurring more frequently, and even sooner, in
many military program production cycles.
DON’T ABANDON SHIP YETIn the military/defense and aerospace industries, high reliability and
sustainability-of-supply is everything. And it’s not only technology
reliability that’s important. The underlying technical expertise behind
it and the long-term lifecycle sustainability of a program are just as
important.
As companies design and build advanced, reliable COTS products, they
should be thinking about how the customer will be supported long term.
These embedded systems aren’t like the latest cell phones, easily dis-
carded when the next upgrade comes
along. They’re comprised of rugged or
even military-grade SBCs, enclosures,
I/O and graphics products that take
time and money to create, and should
be available for the long haul.
Even at the onset of product devel-
opment, component obsolescence is
already in the mind of the developer,
with an eye towards mitigating the
costs in the future.
SECURE THE RIGGINGThe lifecycle of COTS products
needs to be managed according to
a well-defined and forward-looking
program. At Aitech, for example, this
is broken out into three distinct pro-
gram phases: Active, Supported and Extended Support, each of which
provides product availability for at least four years. The combined life-
cycle ensures a minimum COTS product lifetime of at least 12 years
from product introduction, and usually far longer.
Employing total program and lifecycle support services ensures
that the products you design in today to meet the functional, envi-
ronmental and operating requirements of your specifications will be
available tomorrow as well.
FULL WINDS AS THE SHIP SAILSElectronic systems have always consisted of both active and pas-
sive components. In time, these components are replaced by the next
generation of more technically capable components, resulting in the
obsolescence of the earlier products. This is a natural progression, but by
implementing a structured approach that thinks ahead of the next elec-
tronics evolution, you can effectively guard against such obsolescence.
There will come a time when a component is truly obsolete, but wouldn’t
you rather the progression be your decision instead of being dragged
along kicking and screaming (and way overspending) in the process?
A solid component obsolescence program enables you to plan and
budget for technology upgrades as you, and your budget, see fit. Now
that’s what we like to call smooth sailing.
Doug Patterson is VP, Military & Aerospace Business Sector, Aitech Defense
Systems.
Figure 1: Setting the right course in the first stages of product development will significantly reduce the anxiety of component obsolescence.
By Doug Patterson, Aitech Defense Systems
Figure 2: With a solid plan in place, system upgrades can be managed at your own pace, not dictated by component availability.
Fall 201532
SPECIAL FEATURE
Stop the Presses! VPX is Dead.
Editor’s Note: Ben Sharfi is the colorful CEO/Founder of General
Micro Systems. GMS is one of the original suppliers of VME boards
since the standard was envisioned in the 1970s, and Ben is fre-
quently outspoken on all manner of embedded technology. I’ve been
in VITA/VSO meetings that erupted into—well, “intense debate.”
Ben has his critics; however, that doesn’t mean he’s wrong.
Regarding this editorial opinion—penned by Ben himself and not our editors—we
invite feedback and comments. Email me at [email protected]. We’ll post
cogent replies on our homepage at: www.eecatalog.com/military and www.eecatalog.
com/vme.
VPX is dead as a viable technology. If you’re a smart engineer (and all engi-
neers are smart, right?), you already know this. So if that’s the case, why
are so many manufacturers still offering it as a product? And worse, why are
people still purchasing it, and all the baggage that comes with it?
Let me explain why VPX is dead. There are two parts to this discussion—one
part is from the technology itself and one part is from how it’s deployed. Let’s
start with the technology, which is a rock-solid argument, and the images here
back up that argument.
The majority of the VPX boards that are sold go into conduction-cooled sys-
tems. In this scenario, you have to take the heat from the entire board, a 6U
card. For the sake of argument, let’s say that it’s 150 W that needs to be dis-
sipated. It may be higher than that, but it’ll serve well for this discussion.
You have to take that 150 W of heat across the board’s surface to the ejectors
(the fasteners that lock the board in place), also known as the wedge lock. The
wedge lock then transfers the heat to the chassis to cool it. This is where the real
problem is. The surface area of the wedge lock that can actually conduct that heat
is very limited. Consequently, it can’t transfer enough surface-area heat from the
cold plate out to the wedge lock and from the wedge lock to the ATR box.
Figure 1 shows a VPX card using standard wedge locks. You can see the thermal
dissipation of the heat generated by the microprocessor, with the heat flowing
to the wedge lock, right toward the bottleneck (note that anything that’s not
blue in the figure is bad).
General Micro Systems (GMS) has come up with a patented architecture for a
wedge lock that’s a clear improvement for heat transfer, as shown in Figure 2.
While it’s a clear improvement, it’s still not good enough, especially when com-
pared to a GMS chassis that can be built with that same board, but with the
heat conducted to the outside. It’s true—even our patented technology is still
a far cry from what’s really needed, which is to get the heat outside the box.
In summary for Problem 1: VPX is dead is because you can’t transfer heat
properly to the outside world.
Problem 2 arises because once you do transfer heat to the wedge lock inside
an ATR box, you’re transferring it to the sides of the box. That box could very
well be sitting in the cabin of an aircraft, like a helicopter, or some other
vehicle. Hence, you have to cool the cabin to keep it from overheating.
This clearly wasn’t a problem back at the origin of VPX, because the higher
power boards were only dissipating 30 or 40 W. Now, because everything is
so highly integrated and processors consume so much power, 150-W solu-
tions are common. Heck, the Xeon processor alone could consume 85 W.
Also, bear in mind that older systems placed each function on a different
card. Today, it’s the norm for a motherboard to hold the CPU, memory,
graphics, communications, I/O and so on.
GMS came up with a way to integrate that board into a box that sits on the
base of the chassis, as shown in Figure 3. As a result, the board’s entire sur-
face gets conducted directly through its bottom. Think of it as a 100% heat
pipe going directly from the processor to the box’s aluminum frame, and
NOT through the wedge lock.
Clearly, the advantage of this technique is that there’s more surface area to
use for cooling, and when you do cool it, you cool the frame. You transfer all
the heat directly to the frame of the vehicle or aircraft (and not heat/cool the
cabin).
In conclusion, the VPX standard for transferring heat to wedge locks is
the dumbest thing ever created. It doesn’t work. Hence, VPX as we know
it is dead.
Figure 1: A VPX card using standard wedge locks Figure 2: A wedge lock designed to improve heat transfer.
By Ben Sharfi, General Micro Systems
Figure 3. Heat conduction not taking place through a wedge lock.
- Chris A. Ciufo, Editor
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engineers guide to Military, Aerospace & Avionics
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CONTACT INFORMATION
Artesyn Embedded TechnologiesATCA® Systems & Blades
Centellis® AdvancedTCA® platforms from Artesyn support leading-edge packet and data processors while providing a degree of ruggedness in a compact and power-efficient bladed architecture. ATCA technology is already engaged in various military & aerospace applications that require dense computing processor blades communicating over a 10G/40G integrated network.
Artesyn also offers a rich selection of payload blades – server blades, packet processing blades and DSP-based blades – that feature various processor architectures to suit the dense computing and integrated network needs of military and aerospace applications.
TECHNICAL SPECS
◆ Application-ready platform configurations shorten time-to-market
◆ Long life embedded processors and switching architec-tures support long life military programs
◆ Strong ecosystem of off-the-shelf or custom blades allows the Centellis platform to be easily configured
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Artesyn Embedded Technologies2900 South Diablo Way, Suite 190 Tempe, AZ 85282-3222USA+1 800 759 1107 Toll Free+1 602 438 5720 Telephone [email protected] www.artesyn.com
for a range of applications & upgraded as new technologies become available
◆ Wide range of processor architecture options (Intel® Xeon®, Cavium OCTEON; TI or Octasic DSPs)
CONTACT INFORMATION
Artesyn Embedded TechnologiesMaxCore™ Compute Platform – Maximum performance & density in an open form factor
The MaxCore™ platform from Artesyn offers a versatile, high performance architecture to achieve maximum flexibility, maximum compute density per rack unit (RU), and unmatched innovation in design for both datacenter and carrier grade applications.
The MaxCore advantage is its ability to perfectly balance I/O, compute and compute-associated accelerators within the same box, all connected by a high-performance, multi-domain capable backplane. Whether the application requires dense computing through the use of MaxCore microserver cards, multiple media processing cards for audio or video acceleration, or a combination including 3rd party PCI Express cards, the MaxCore platform offers a superior architecture for flexibility in deployment.
TECHNICAL SPECS
◆ 3U rackmount server platform with 15 module slots for any mix of compute engines and PCIe cards
◆ Express fabric backplane for > 50Gbps connectivity to or between cards; 100Gbps to select slots
Artesyn Embedded Technologies2900 South Diablo Way, Suite 190 Tempe, AZ 85282-3222USA+1 800 759 1107 Toll Free+1 602 438 5720 Telephone [email protected] www.artesyn.com
◆ High core density: 240-480 Intel® Xeon® processor cores◆ Shared 2x 10GBaseT in chassis or 100GE I/O card
option with load balancer ◆ Wide range of media processing accelerator cards◆ Cable-less system for redundant/hot-swappable
power and cooling
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engineers guide to Military, Aerospace & Avionics
Application Solutions
CONTACT INFORMATION
ADL Embedded Solutions
◆ Mobile Autonomous Systems for Civil, Commercial and Defense Applications Including:
– Unmanned Ground Vehicles – Robotic Subs – Unmanned Avionics – Unmanned Buoys and Other Surface Vehicles
NEW ADLE3800PC – Intel® Atom™ Processor E3800 Series PCIe/104 SBC
The ADLE3800PC is based on Intel’s first System-on-Chip (SoC) Intel® Atom™ processor E3800 product family, which is built using Intel’s 22nm 3D Tri-gate process. It offers vastly superior compute performance and energy efficiency including Intel’s 7th generation graphics engine for stunning graphics performance. Improved power management capabilities result in standby power measured in milliwatts with days of standby time.
FEATURES & BENEFITS
◆ Intel Atom processor E3800 Series SoC, DC/Quad◆ Junction Temperature Rated at -40C to +110C◆ Up to 8 GB DDR3L-1333, 1.35V SoDIMM204 Socket◆ Onboard mini PCIe/mSATA Socket◆ 4x USB 2.0, 1x USB 3.0, 2x Serial COM, 2x SATA 3 Gb/s,
2x GLAN Ethernet
APPLICATION AREAS
◆ Military & Defense Rugged SFF◆ Rugged Mobile Computing ◆ Portable Medical Devices
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CONTACT INFORMATION
ADL Embedded Solutions 4411 Morena Blvd Suite 101 San Diego, CA 92117 USA 858-490-0597 858-490-0599 [email protected] www.adl-usa.com
Military, Aerospace & Avionics ONLINE
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engineers guide to Military, Aerospace & Avionics
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CONTACT INFORMATION
Artesyn Embedded TechnologiesMVME8100 Freescale QorIQ P5020 VME64x/VXS SBC
Compatible Operating Systems: Linux, Wind River VxWorks, Green Hills Integrity Compatible Architectures: Power Architecture
The Artesyn™ MVME8100 is a high performance 6U VME/VXS SBC featuring the new Freescale P5020 QorIQ processor supporting high speed ECC DDR3-1333MHz. It offers expanded IO and memory features with PCIe and SRIO fabric connectivity and multiple USB, Serial and Ethernet ports. Memory includes up to 8GB DDR3, 512K FRAM non-volatile memory, and 8GB eMMC NAND Flash. The MVME8100 is offered in commercial and rugged variants for extreme environments with extended shock, vibration, temperatures and conduction cooling. It is designed for a range of high end industrial control such as SPE and photo lithography and C4ISR, including radar/sonar. It will provide technology insertion to prolong current programs while providing more performance and throughput.
Artesyn Embedded Technologies2900 South Diablo Way, Suite 190 Tempe, AZ 85282-3222USA+1 800 759 1107 Toll Free+1 602 438 5720 Telephone [email protected] www.artesyn.com
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CONTACT INFORMATION
TECHNICAL SPECS◆ Freescale QorIQ P5020 1.8/2.0GHz Processor◆ 2 PMC/XMC sites◆ Optional hard drive mounting kit ◆ 2x4 PCIe or SRIO connectivity to VXS backplane P0◆ Up to 3 USB 2.0, 5 Ethernet & 5 Serial ports +GPIO◆ Extended temperature and rugged variants
Artesyn Embedded Technologies
MVME250X Freescale QorIQ P2010/P2020 VME64x SBC
Compatible Operating Systems: Linux, Wind River VxWorksCompatible Architectures: Power Architecture
Artesyn Embedded Technologies’ MVME250X series features the Freescale QorIQ™ single-core P2010 or dual-core P2020 processor. It is a cost effective migration path for older generation MVME3100, MVME4100, MVME5100 and MVME5110 boards. The MVME2500 series is ideal for automation, medical, and military applications such as railway control, semiconductor processing, test and measurement, image processing, and radar/sonar. Memory includes up to 2GB DDR3 and 512KB non-volatile MRAM. The MVME2502 variant has 8GB soldered eMMC solid state memory for additional rugged, non-volatile storage. Connectivity includes Gigabit Ethernet, USB2, serial, SATA and either one or two PMC/XMC sites. A hard drive mounting kit and conformal coating are available.
TECHNICAL SPECS
◆ 800 MHz, 1.0 GHz or 1.2 GHz Freescale QorIQ P2010 or P2020 processor
◆ Up to 8GB soldered memory ◆ Optional rear transition module ◆ Extended temperature and rugged variants
Artesyn Embedded Technologies2900 South Diablo Way, Suite 190 Tempe, AZ 85282-3222USA+1 800 759 1107 Toll Free+1 602 438 5720 Telephone [email protected] www.artesyn.com
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engineers guide to Military, Aerospace & Avionics
Application Solutions
CONTACT INFORMATION
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ACCES I/O Products, Inc.
Rugged, Industrial Strength PCI Express Mini Card Embedded I/O Solutions
Compatible Operating Systems: Linux (including Mac OSX) and Windows
ACCES I/O Products offers a variety of high performance PCI Express Mini Card (mPCIe) data acquisition and control cards and solutions. These PCIe Mini DAQ cards are perfect for a variety of applications requiring monitoring, control and industrial serial communications as well as other shock and vibration sensitive applications. Add the features you need in your application in hours, not days. Choose from many different models and options (including extended temperature) encompassing analog I/O, digital I/O, counter/timer, and serial I/O configurations.
All of our PCI Express DAQ products feature Plug-and-Play operation which permit the cards to be automatically detected and configured. This allows for easy installation in industrial, embedded, OEM or stationary systems. PCIe Mini cards greatly simplify how users add and upgrade systems. mPCIe is a third generation small form factor flexible interface designed for the modern mobile world, leveraging the mature and ubiquitous PCI Express and USB busses.
Call us today and start your application tomorrow. And remember, if you don’t see what you need, ask us and we will make it for you.
FEATURES & BENEFITS
◆ Digital Input / Output PCI Express Mini Card DAQ Prod-ucts for compact control and monitoring applications. Choose up to 24 channels offering various voltage, isolation, speed, and counter/timer options.
◆ Serial Communication PCI Express Mini Card Products. Designed for use in retail, hospitality, automation, games, as well as point of sale systems and kiosks.
◆ Custom PCI Express Mini Card I/O Products. Over 25 years of product development, 350 COTS products, over 750 specials and options. If you don’t see what you need, ask us and we will make it for you.
TECHNICAL SPECS
◆ Serial COM mPCIe cards feature 2 or 4-port versions with 128-byte FIFOs for each TX and RX. Software select-able RS-232/422/485, and data communication rates to 921.6Kbps in RS232 – as high as 3Mbps in differential modes – 16Mhz with custom crystal option.
◆ Isolated mPCIe RS-232/422/485 cards feature 4 or 2 ports of Tru-Iso™ isolated serial communications. 1.5kV isolation is provided port-to-computer and 500V isolation port-to-port on ALL signals at the I/O connectors along with ±15kV ESD protection on all signal pins. Also included...industrial oper-ating temperature (-40°C to 85°C) and RoHS certification
◆ Our Tru-Iso™ products are designed under IPC-221B. The circuit is isolated with a ≥ 300mil gap between all signal and plane layers between the ports and the PC, and a ≥ 100mil gap port to port. These gaps are rated under IPC-221B at 1500V (Port to PC) and 500V (Port to Port).
◆ The PCI Express Mini Card product line PCB size measures just 30mm x 50.95mm and includes two mounting holes to ensure secure and easy installation using standard standoffs.
◆ All mPCIe cards include high retention latching connectors for shock and vibration mitigation.
AVAILABILITY
Now
APPLICATION AREAS
Monitoring and Control, Embedded OEM, Energy Man-agement and Conservation, Gaming Systems, Industrial Automation, Kiosks, Machine Control, Manufacturing Test, Medical, POS, Precision Measurement, Process Monitoring, Retail, Robotics, Security, UAVs
ACCES I/O Products, Inc. 10623 Roselle Street San Diego, CA, 92121 USA1-858-550-9559 Telephone1-800-326-1649 Toll Free1-858-550-7322 [email protected] http://acces.io
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engineers guide to Military, Aerospace & Avionics
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CONTACT INFORMATION
Pentek
FLEXORSET ENVIRONMENT SELECTIONS FlexorSets are designed for air-cooled, conduction-cooled, and rugged operating environments.
5973-317 FlexorSet 8-Channel 250 MHz A/D with DDCs, Virtex-7 FPGA – 3U VPX
FEATURES
◆ Supports Xilinx Virtex-7 VXT FPGA◆ GateXpress supports dynamic FPGA reconfiguration
across PCIe◆ Eight 250 MHz 16-bit A/Ds◆ Eight multiband DDCs◆ 4 GB of DDR3 SDRAM◆ Sample clock synchronization to an external system
reference◆ PCI Express (Gen. 1, 2 and 3) interface up to x8◆ User-configurable gigabit serial interface◆ Optional optical Interface for backplane gigabit serial
interboard communication◆ Optional LVDS connections to the Virtex-7 FPGA for
custom I/O◆ Compatible with several VITA standards including:
-VITA-46, VITA-48 AND VITA-66.4 and VITA-65 -OpenVPX™ System Specification)
◆ Ruggedized and conduction-cooled versions available
5973-317 FlexorSet 8-Channel 250 MHz A/Dwith DDCs, Virtex-7 FPGA – 3U VPX
The FlexorSet Model 5973-317 is a 3U VPX carrier combined with Flexor Model 3316 8-Channel A/D FMC that contains Pentek’s eight channel digital down con-verter (DDC) intellectual property (IP), which is ideally matched to the eight 250 MHz, 16-bit A/Ds on the FMC.
Each DDC has an independent 32-bit tuning frequency ranging from DC to the A/D sampling frequency. Each DDC can have its own unique decimation setting, supporting as many as eight different outputbandwidths. Decimations can be programmed from 2 to 65,536 providing a wide range to satisfy virtually all applications.
BUNDLING FOR SEAMLESS INTEGRATION
The Model 5973-317 FlexorSet comes pre-configured with a suite of built-in functions for data capture, synchronization, time tagging and formatting, all tailored and optimized for the FMC and carrier. This IP enables high performance capture and delivery of data to provide an ideal turn-key signal interface for radar, communications or general data acquisition applications, eliminating the integration effort typically left for the user when integrating the FMC and carrier.
DEVELOPMENT TOOLS AND SOFTWARE SUPPORT
FlexorSet presents system integrators with an ideal development and deployment platform for custom IP. The Pentek GateFlow® FPGA design kit gives users access to the complete factory installed IP at the source level, allowing them to extend or even replace the built-in functions.
The Pentek GateXpress® PCIe configuration manager supports dynamic FPGA reconfiguration though software commands as part of the runtime application. This provides an efficient way to quickly reload the FPGA, which slashes development time during testing. For deployed environments, GateXpress enables reloading the FPGA without the need to reset the host system, ideal for applications that require dynamic access to multiple processing IP algorithms.
The Pentek ReadyFlow® Board Support Package is available for Windows and Linux operating systems. The ReadyFlow C-callable library contains a complete suite of initialization, control and status functions, as well as a rich set of precompiled, ready-to-run-examples, accelerate application development.
PentekTelephone: 201-818-5900Email: [email protected] http://www.pentek.com/go/em5973-317Twitter: www.twitter.com/pentekincLinkedin: www.linkedin.com/company/pentek
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Application Solutions
ADL Embedded Solutions
APPLICATION AREAS
Military and Aerospace – Rugged SFFRugged Industrial Applications Communications ApplicationsMobile Routers and Other Network AppliancesRailway Train Control Transportation Imaging Applications
ADLMES-8200 High-Ingress Protection (IP) Modular Enclosure Systems
The ADLMES-8200 is a highly innovative embedded enclosure design. Its highly configurable modularity makes it possible to expand or reduce a system without replacing the entire enclosure. Side wall modules may be added or removed as system requirements evolve. Three standard profiles provide quick turn inventory availability. A broad portfolio of PC/104 SBC options ranging from low-power Intel® Atom™ processors to high performance 4th Generation Intel® Core™ i7 processors are available.
FEATURES & BENEFITS
◆ Modular Sidewall Design Supports Variable PC/104 Stack Heights (2 - 6 Cards) or Expanded 3.5” SBC Intel-ligent Systems
◆ High and Low IP (Ingress Protection) Systems Possible via High IP, Modular Chassis Design Coupled with Full Custom, Quick-Turn I/O Panels
◆ Broad Portfolio of PC/104 SBC Options Ranging from Low-Power Intel Atom processors E3800 to High Performance 4th Generation Intel Core i7 processors
◆ Fully Supported by ADL Embedded Solutions’ Team of Solidworks Engineers for Model and or Design Support
◆ Options for MIL-STD 461, and MIL-STD 704/1275◆ Designed for MIL-STD 810 Shock & Vibration
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CONTACT INFORMATION
ADL Embedded Solutions 4411 Morena Blvd Suite 101 San Diego, CA 92117 USA 858-490-0597 858-490-0599 [email protected] www.adl-usa.com
Military, Aerospace & Avionics ONLINE
Explore...➔ Top Stories and News
➔ White Papers
➔ Expert Opinions (Blogs)
➔ Exclusive Videos
➔ Valuable Articles
Sign up for the Military. Aerospace & Avionics Quarterly Report email newsletter
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39
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CONTACT INFORMATION
EnclosuresEncl
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Atrenne Computing Solutions
“Mupac” 760 Small Form Factor Series
Designed to deliver mission-critical computing performance in a fully portable enclosure - ideal for rugged small spaces.
Building on Atrenne Computing Solutions’ 40-year history of design excellence in rugged electronic and embedded systems, the “Mupac” 760 Small Form Factor product line is designed for mission-and performance-critical communications and intelligence. “Mupac” 760 Small Form Factor compute platforms allow data processing in the field in a fully transportable, highly rugged computing module that improves speed and efficiency by completing processing in the machine, at the distributed level, before delivering data upstream. Atrenne Computing Solutions’ Small Form Factor line provides a complete distributed computing module – exceptionally powerful and fully portable in everything from a UAV to a backpack. “Mupac” 760 Small Form Factor compute modules enable the most modern technology to work in harsh conditions at a level of distributed computing never before possible. In addition to standard offerings, the “Mupac” 760 Small Form Factor line can also be customized for a wide variety of unique specifications, providing high-end compute-class performance for harsh industrial and military environments where extreme temperatures, air particulates, liquids and vibration prevent the use of standard commercial computers.
FEATURES & BENEFITS
◆ Extremely rugged◆ Easily customized◆ Dip-brazed construction◆ Modular power supply◆ Rated to operate in temperatures ranging from -40 to
+85 degrees Celsius
TECHNICAL SPECS
◆ Two standard dimensions: 3.25” h x 6.5” w x 8.5” d or 5.25” h x 6.5” w x 8.5” d
◆ Available in an IP67 NEMA Rated Version and IP50 NEMA Rated Version
◆ Quickly deployable with Intel® Core™ i3/i5/i7 multi-core processors and up to 4 GB RAM
◆ Standard I/O includes dual DVI display: one DVI-I (DVI-D+VGA) and one DVI-D; GbE Ethernet Port, 8 x USB 2.0, 2 x RS-232, 2 x SATA 3Gb/s with RAID 0,
1 support; 1 x 6-pin header for KB/MS
ALC888 HD SUPPORTED AUDIO
◆ Enhanced configurability via a Mini PCIe Expansion Slot that can be configured by Atrenne Computing Solutions for video capture, DOM, wireless and many other functions
AVAILABILITY
Now
APPLICATION AREAS
Harsh industrial and military environments requiring small form factors and where extreme temperatures, air particulates, liquids and vibration prevent the use of standard commercial computers.
Atrenne Computing Solutionsa division of Atrenne Integrated Solutions10 Mupac DriveBrockton, MA 02301 USA800-926-8722 Toll Free508-588-6110 Telephone508-588-0498 [email protected]
AtrenneComputing Solutions
Fall 201540
engineers guide to Military, Aerospace & Avionics
Application Solutions
CONTACT INFORMATIONCONTACT INFORMATION
Atrenne Computing Solutions
TECHNICAL SPECS
◆ Storage Temp (-40°C to +85°C MIL-STD-810F)◆ EMC (MIL-STD-461D)◆ Input Power (28VDC, 115VAC/ 400Hz. 1Ø, 115VAC/
400Hz. 3Ø- MIL-STD-704A Thru 704E, MIL-STD-1275A)◆ Wiring (Low Toxicity -MIL-C-24643)◆ Vibration (15 to 2,000Hz At 0.1g2/ Hz. (RMS~12g)
MIL-STD-810F Method 514.5) & Shock (20g for 11ms MIL-STD-810F Method 516.5)
AVAILABILITY
Now
717 Series Air-Over Conduction Cooled ATR EnclosuresCompatible Architecture: VME, VME64x, VXS, VPX and CPCI architectures
The 717 Series is available in standard ARINC sizes that include 1/2 ATR Short to 1-1/2 ATR Long and any custom form factor. From bus standards to application-specific custom designs, the 717 Series provides an expansive offering of ATRs for platforms such as the VME, VME64x, VXS, VPX and CPCI architectures. The 717 Series is a member of Atrenne Computing Solutions’ conduction-cooled line of ATRs. Designed specifically for rugged deployment and to direct air over the thermal conducting walls, its cooling can be configured to meet application requirements by either drawing air through the walls and out a rear exhaust plenum or forcing air down the walls and directing it away from the equipment. When configured for unpressurized environments, the 717 Series can be configured with a high-altitude cooling scheme to permit ultimate performance at altitudes up to 50,000 feet. When used in conjunction with Atrenne Computing Solutions’ System Performance Monitoring” technology, the 717 Series ATR can be configured to activate internal heaters in cold start-ups or control the performance outputs of the optional external cooling fan to maintain an optimal thermal environment for the circuit card assemblies. In addition, the 717 Series is sealed from the environment and meets MIL standards for up to 95% RH (humidity), 5% for 48 hours (salt fog), no fungal growth, 13.5g acceleration, and thermal shock performance. The 717 Series can be configured with an optional avionics trays for isolation from shock and vibration environments common to airborne, vehtronics and shipboard applications. For applications where stringent weight requirements are an issue, Atrenne Computing Solutions offers a lightweight composite solution.
FEATURES & BENEFITS
◆ Dip-brazed construction◆ Expansive range of ARINC sizes◆ Modular power supply /AC or DC filtered inputs◆ Cold start heaters & high altitude fan offering◆ Configurable I/O panel
Atrenne Computing Solutionsa division of Atrenne Integrated Solutions10 Mupac DriveBrockton, MA 02301 USA800-926-8722 Toll Free508-588-6110 Telephone508-588-0498 [email protected]
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OPEN
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TS-4900Computer on Module
Industrial High Performance
i.MX6 Module with Wireless
Connectivity and Flash Storage
1 GHz Solo or Quad Core Freescale i.MX6 ARM CPU
512 MB, 1 GB, or 2 GB DDR3 RAM and 4 GB eMMC Flash Storage
Wireless 802.11 b/g/n and Bluetooth 4.0 Soldered Module
4k LUT FPGA, 1x Gigabit Ethernet, 1x PCI Express Bus
1x microSD Socket, 1x SATA II, 1x USB Host, 1x USB OTG
70x DIO, 4x I2C, 1x I2S, 2x SPI, 2x CAN
-40 ºC to 85 ºC Industrial Temperature Range
Runs Linux, Android, QNX, Windows
QT, OpenGL, DirectFB, GNU Tool Kit, and More
$89Starting at
$122Qty 100
Qty 1
Available w/ TS-8550
Development Kit
(Shown with optional microSD card)
TS-7250-V2Single Board Computer
Extensible PC/104 Embedded
System with Customizable
Features and Industrial Temps
$165Starting at
$199Qty 100
Qty 1
800 MHz or 1 GHz Marvell PXA166 ARM CPU
512 MB DDR3 RAM and 2 GB SLC eMMC Flash Storage
PC/104 Connector with FPGA Driven Pins (8k or 17k LUT FPGA)
2x 10/100 Ethernet, 1x microSD Socket, 2x USB Host
75x DIO, 5x ACD, 3x RS232, 3x TTL UART, 1x RS485, 1x CAN
-40 ºC to 85 ºC Industrial Temperature Range
Preinstalled Debian Linux OS and Utilities
Available with TS-ENC720 enclosure
TS-7970Single Board Computer
Embedded Computer Version
of the TS-4900 i.MX6 CoM with
Dual Ethernet, Rugged Connector
$169Starting at
$214Qty 100
Qty 1
1 GHz Solo or Quad Core Freescale i.MX6 ARM CPU
512 MB, 1 GB, or 2 GB DDR3 RAM and 4 GB eMMC Flash Storage
Wireless 802.11 b/g/n and Bluetooth 4.0 Soldered Module
4k LUT FPGA, 2x Gigabit Ethernet, 1x PCI Express Bus
1x microSD Socket, 1x SATA II, 4x USB Host, 1x USB OTG
Daughter card interface for cell modem and more
-40 ºC to 85 ºC Industrial Temperature Range
HDMI, LVDS, and Audio In/Out Connections
Runs Linux, Android, QNX, WindowsAlso available in this form factor are the
TS-7670 and TS-7680 with 454 MHz CPU
TS-TPC-7990Touch Panel PC
7” High End i.MX6 Mountable
Panel PC with Dev Tools Such
as Debian GNU and QTCreator
$299Starting at
$342Qty 100
Qty 1
Enclosed TPCs
Also Available
1 GHz Solo or Quad Core Freescale i.MX6 ARM CPU
7 Inch or 10 Inch Touch Panel PC
Resistive and Capacitive Screens
Linux, Android, QNX, and Windows
QTCreator, GTK, DirectFB, GNU Tool Kit, and More
Runs Yocto, Debian, Ubuntu Distributions
