field-induced mobility degradation in pentacene

Organic Electronics 7 (2006) 528–536

www.elsevier.com/locate/orgel

Field-induced mobility degradation in pentacenethin-film transistors

Mohammad Mottaghi, Gilles Horowitz *

ITODYS, CNRS-UMR 7086, University Denis-Diderot, 1 rue Guy de la Brosse, 75005 Paris, France

Received 15 June 2006; received in revised form 21 July 2006; accepted 26 July 2006Available online 22 August 2006

Abstract

Pentacene-based organic thin-field transistors (OTFTs) with bottom-gate, top-contact architecture were fabricated onalumina substrates. The devices were divided into two sets, depending on whether pentacene was deposited on bare alu-mina or on alumina modified with a fatty acid self-assembled monolayer (SAM). Previous analysis have shown that themodification of alumina with SAMs result in a substantial decrease of the size of the grains in hte polycrystalline films.Careful parameters extraction, including an original determination of the threshold voltage, and contact resistance extrac-tion through the transfer line method (TLM), allowed us to estimate the gate-voltage dependent mobility in both series.The mobility is found to first increase at low bias, and then decrease at higher gate voltage (mobility degradation). Thelatter behavior is explained through an estimation of the distribution of charges across the accumulation layer, in whichthe pentacene film is modeled as a stack of dielectric layers, the distribution being calculated using basic equations of elec-trostatics and thermodynamics. A good agreement was found when the mobility in the layer next to the insulator wasassumed to be negligible as compared to that in the bulk of the film. The initial rise of the mobility is interpreted in termsof multiple trap and release (MTR) with a distribution of traps located in the grain boundaries. Interestingly, the mobilitycorrected for both contact resistance and mobility degradation is found around 3 cm2/V s for pentacene deposited on barealumina, and 5 cm2/V s when pentacene is deposited on SAM modified alumina. We conclude that the smaller grainsgrown on modified alumina are more regular, and hence less defective, than the larger grains deposited on bare alumina.� 2006 Elsevier B.V. All rights reserved.

PACS: 72.20.Jv; 73.40.�c; 73.61.Ph; 85.30.Tv; 68.55.Ln

Keywords: Organic field-effect transistors; Self-assembled monolayers; Mobility extraction; Transfer line method; Multiple trapping andrelease

1. Introduction

Gate-voltage dependent mobility is now a well-recognized feature in organic thin-film transistors

1566-1199/$ - see front matter � 2006 Elsevier B.V. All rights reserved

doi:10.1016/j.orgel.2006.07.011

* Corresponding author.E-mail address: [email protected] (G. Horowitz).

(OTFTs) [1–4]. Most usually, mobility is found toincrease with gate voltage. Two useful models foraccounting for this are the multiple trapping andrelease (MTR) and variable range hopping (VRH).The basic assumption of MTR [3,4] is a distributionof states localized in the energy gap close to thetransport band edge. These states are liable to trap

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M. Mottaghi, G. Horowitz / Organic Electronics 7 (2006) 528–536 529

the charge carriers injected into the channel of thetransistor, thus reducing the current. When increas-ing the gate voltage, the Fermi level moves towardsband edge as more of the empty traps are filled byinjected charge. Accordingly, the ratio of free totrapped carriers increases, and so does the channelconductivity, which is interpreted in term of anincrease of the effective mobility. The VRH model[2] also assumes a distribution of localized levels;it proposes that transport occurs via hopping in thatdistribution. Like with the MTR model, the gate-voltage dependent mobility is explained throughthe filling of the lower energy states, so additionalcarriers occupy higher energy states, which demandlower activation energy to hop to the next site.

More recently, a reverse behavior has beenreported, where the mobility decreases with gatevoltage [5–7]. It is worth pointing out that a similartrend has been identified for long in conventionalsilicon-based metal-oxide-semiconductor field-effecttransistors (MOSFETs) [8], where it is attributedto various scattering agents in the vicinity of theinsulator interface, namely charged centers, surfacephonons and surface roughness. A usual way todescribe this behavior is to introduce the so-called‘‘mobility degradation factor’’ h, which in its sim-plest formulation leads to a mobility that looks like

l ¼ l0

1þ hðV G � V TÞ; ð1Þ

where VG is the gate voltage and VT the thresholdvoltage.

We have previously shown [5] that the structureof pentacene films vapor deposited on alumina(Al2O3) is drastically changed by modifying the sur-face of the oxide with a self-assembled monolayer(SAM). On bare alumina, we observed a two-dimensional growth of the first monolayer followedby a three-dimensional process with larger grains,while films on SAM-modified alumina were madeof grains of smaller dimension. In this paper, wereport on new gate-voltage dependent measure-ments that bring evidence for field-induced mobilitydegradation on pentacene deposited on both sub-strates. A model for charge distribution in the chan-nel, based on the layered structure of the pentacenefilm, is developed to account for this feature. It isfound that the mobility in the molecular layer closeto the insulator–semiconductor interface is substan-tially lower than that in the bulk of the pentacenefilm. For the latter, the mobility is interpreted interms of the MTR model. The respective trap-free

mobility and trap distribution in bare and SAM-modified devices are discussed under the perspectiveof the corresponding structure of the films.

2. Experimental

The OTFTs where fabricated on highly dopedp-type silicon wafers that acted as the gate electrodeof the device. The insulator (Al2O3) was grown in ahomemade vacuum chamber by bombarding an alu-minum target with oxygen ions under reduced pres-sure (�1 Pa). The growth rate in this unusualdeposition technique is very low, thus resulting inhighly dense and smooth films, with a root-meansquare (RMS) roughness, as measure by atomic forcemicroscopy (AFM) profiling, comparable to that ofthe underneath silicon substrate (0.2 nm). The thick-ness of the Al2O3 layer was 100 nm and its capaci-tance 75 nF/cm2. Before pentacene deposition ormodification, the alumina substrates were cleanedin pure sulfuric acid, rinsed in deionized water andblown dry in a flux of argon. Self-assembled mono-layers of eicosanoic acid CH3(CH2)18COOH weredeposited by dipping the substrate during 45 min.into a solution in benzene. Silanes (e.g., octadecyltri-chlorosilane OTS) are commonly used on silicon oxi-des. However, a fatty acid (in our case, eicosanoicacid) was preferred to silanes because it more readilyassembles on alumina. We note that, because thelength of the alkyl chain is comparable in OTS andeicosanoic acid (18 and 19 carbon atoms, respec-tively), the robustness of the corresponding SAMsis equivalent, as was checked by contact angle mea-surement and surface IR spectroscopy [5]. 30 nm ofpentacene (Aldrich, used as received) was vapordeposited at a base pressure of 10�5 Pa at a rate of0.01 nm/s on substrates kept at room temperature.Source and drain electrodes were made of 20 nmthick gold evaporated through a shadow mask withchannel lengths ranging between 5 and 40 lm. Thecurrent–voltage characteristics were recorded underambient condition with a Karl Suss manual probestation and a Keithley 4200 semiconductor charac-terization system.

3. Multi-layer model

The multi-layer model takes advantage of thelayer structure of vapor deposited molecular filmswith rigid molecules like pentacene or the oligothi-ophenes. A first version of the model has been pub-lished recently [9]. However, we discovered that this

530 M. Mottaghi, G. Horowitz / Organic Electronics 7 (2006) 528–536

first version contained an inappropriate formulationof Gauss’s law (see Eq. (A.2)), which is correctedhere. Note that this initial mistake only resulted inquantitative changes, while the general conclusionsof the model were preserved.

Pentacene molecules can be viewed as rigid rods,which in the solid state assemble parallel to eachother, thus forming parallel layers, the thickness ofwhich equals the length of the molecule (minus asmall correction to account for a tilt angle). Because

Fig. 1. Distribution of charge carriers in a 30 nm (20 ML) thickpentacene film with an insulator capacitance of 75 nF/cm2. Fromtop down: VG = 1 V, 5 V and 25 V.

(1) each molecule cannot bear more than one ele-mental charge carrier and (2) the charge practicallyextends all over the molecule [10], we assimilate thepentacene film to a stack of n dielectric layers ofthickness d, each layer carrying a uniform densityof carriers ni. The layers are numbered starting fromthe insulator side. The calculation of the charge dis-tribution is detailed in the Appendix. It does notlead to an analytical expression, but rather to Eq.(A.10) that relates the charge in layer i to that in lay-ers (i + 1) to n.

Two additional equations were used to performthe numerical calculation. The first one derives froma product of Eq. (A.9) and gives the potential at theinsulator–semiconductor interface

V 0 ¼kTq

lnn1

nn; ð2Þ

while the second one gives the total charge in thefilm.

qntot ¼ qXn

1

ni ¼ CiðV G � V 0Þ: ð3Þ

Here, we have assumed VT = 0. In pentacene, thethickness of a monolayer, as determined by X-raydiffraction, is 1.54 nm [11], so a 30 nm thick layerroughly contains 20 monolayers. Fig. 1 shows thedistribution of charge carriers at three different gatevoltages: 1, 5 and 25 V. It clearly appears that as VG

increases, the charge concentrates in the first layer.At this stage, it is worth pointing out that our

calculation only refers to the distribution of thetotal (free and trapped) charge in the semiconduc-tor. No assumption was made on how these chargemoves; in particular, we stress that the presence inthe insulator of charges (fixed and mobile) anddipoles only acts on the mobility and threshold volt-age, not on the charge distribution.

4. Results

4.1. Structure of the evaporated films

The effect of the eicosanoic acid SAM on thestructure of the pentacene layer has been extensivelystudied in our previous works [5]. It appeared thaton bare Al2O3, the growth starts two dimensionaland then turns to three-dimensional with larger,though loosely connected grains, while on SAMmodified substrates, the growth is three-dimensionalall along, with much smaller grains. The situation isschematically depicted in Fig. 2. Note that the

Fig. 2. These cartoons are schematic view of the structure ofvapor deposited pentacene on (a) bare and (b) eicosanoic acidSAM modified Al2O3. In (a), a two-dimensional layer of medium-sized (�200 nm) grains is topped by larger three-dimensionalislands (average diameter 1 lm). In (b) the size of the grains isreduced to 50 to 100 nm, while the growth process is three-dimensional all along.

Fig. 3. These curves are representative of the linear-regime in ourdevices. Top panel: drain current vs. gate voltage at a drainvoltage of �0.2 V. Middle panel: first derivative (linear trans-conductance); this curve is often claimed to be proportional tothe mobility. The lower panel illustrates the method used toestimate the threshold voltage. It shows the second derivative ofthe drain current. The threshold voltage corresponds to the firstpeak (VT = �1.0 V).


actual number of layers in our films is significantlyhigher than what drawn in the figure, so that the dis-ruption between grains only occurs far from theinsulator–semiconductor interface.

4.2. Parameters extraction

Extracting the mobility and threshold voltage ofan OTFT from its current–voltage characteristics isa crucial step for any modeling of the device opera-tion. The most widespread technique uses the satu-ration current, which is predicted by simple modelsto be proportional to (VG � VT)2, so that plottingthe square root of the current as a function of thegate voltage would give a straight line from whichboth parameters can be estimated. However, thismethod presents two major drawback: It cannotbe corrected for contact resistance, and it is blindto gate-voltage dependence.

Another common method uses the first deriva-tive of the linear-regime current Eq. (4) as a func-tion of gate voltage (the so-called linear-regimetransconductance.)

ID ¼WL

lCiðV G � V TÞV D: ð4Þ

However, for a gate-voltage dependent mobility theexact expression of the linear-regime transconduc-tance is

oID

oV G

¼ WL

CiV D lþ ðV G � V TÞol

oV G

� �; ð5Þ

so that the method is only valid when the secondterm in brackets can be neglected, that is, for aslowly varying mobility (which seems to be onlythe case with single crystals [12].) Be this conditionnot fulfilled, the resulting mobility would be overes-timated when mobility increases with gate voltage,and underestimated when it decreases. The problemis illustrated in the middle panel in Fig. 3, where it

can be seen that the linear transconductance pre-sents strong variations, and eventually becomes neg-ative at high gate bias.

Our method includes a separate extraction of thethreshold voltage from the linear regime, which then

Fig. 4. Gate voltage dependent mobility of the same device as inFig. 3. The mobility is calculated form Eq. (4) where VT isestimated with the second derivative method illustrated in thebottom panel of Fig. 3.


allows for estimating the mobility without any der-ivation step. The sequential steps of the method aredetailed as follows.

4.2.1. Threshold voltage

The threshold voltage is defined as the pointabove which significant drain current flows. In con-ventional MOSFETs, it is understood as the transi-tion point between weak and strong inversion. Inthe OTFT, which operates in the accumulationregime, the change is between depletion and accu-mulation. As the threshold voltage is of fundamen-tal importance for circuit modeling, numerousmethods have been developed to extract its valuein conventional MOSFETs [13]. Interestingly,extraction is mostly done at low drain voltages,where the device operates in the linear regime. Thetechnique we have selected for this work determinesVT from a double derivation of the drain current atlow drain voltage with respect to the gate voltage[14]. This method was preferred because it wasclaimed to be insensitive to both mobility degrada-tion and contact resistance. A representative exam-ple is given in Fig. 3 for a SAM modified device.

With this method, VT could be extracted for eachdevice. Of the 12 devices without SAM and 13devices with SAM used in this work, we obtaineda threshold voltage of (1.2 ± 0.4) V in the formerseries and (�1.2 ± 0.1) V in the latter one. We notethat VT is shifted by around �2.4 V by the presenceof the SAM, and that the dispersion of the data isless pronounced in SAM modified devices, whichcan be explained by stating that, owing to itsreduced surface energy, SAM-modified alumina isless liable to contamination than bare alumina.

Once VT is known, the gate-voltage dependentmobility is directly calculated from Eq. (4), whichdoes not requires any derivation. The result isshown in Fig. 4. for the same sample as in Fig. 3.

4.2.2. Contact resistance

Contact resistance Rs is becoming a major issueas the performance of OTFTs improves. There aretwo main methods for extracting Rs: Four-pointmeasurements [6,15,7] and the transfer line method(TLM) [16–19]. Although the latter is less reliablebecause it requires measurements on differentdevices, the contact resistance of which may varyfrom sample to sample, we used this second methodbecause it is less technologically demanding. Weused four channel lengths L (5, 10, 25, and40 lm), and two to four devices for each channel

length. The width normalized resistance in the linearregime is given by

RW ¼ RsW þL

lCiðV G � V TÞ: ð6Þ

Because the threshold voltage was independentlyknown for each device, Eq. (6) could give both thecontact resistance and gate-voltage dependentmobility. In practice, we measured the transfer char-acteristic of each sample at low drain voltage(VD = �0.2 V) and then used a linear regressionmethod to estimate the gate-voltage dependent Rs

and l. Data are shown in Fig. 5; we recall that theyresult of 12 different devices for the bare aluminaseries and 13 devices for the SAM-modified series.Note that the contact resistance is very similar forboth series, which is consistent with the fact thatwe used a top-contact geometry, so that the contactsare little affected by the nature of the insulator–semiconductor interface.

It is worth pointing out that, while the data of theSAM-modified devices are in good agreement withour earlier report [5], there is some discrepancy asfor the devices made on bare alumina. In our earlierwork, we reported a significantly lower mobilitythat tended to increase all along with the gate volt-age. The discrepancy was identified as coming froma defective surface cleaning, as was checked by com-paring devices prepared according to the old clean-ing process to the new one. In the latter case, thealumina substrates were introduced in the evapora-tion chamber immediately after etching with puresulfuric acid; waiting for roughly one hour (as wasthe case in the old process) resulted in a substantialdegradation of the characteristics.

Fig. 5. Gate-voltage dependent mobility (a) and contact resis-tance (b) as deduced from the transfer line method on pentacenefilms deposited on bare and SAM-modified alumina. The upper x

axis in (a) shows the surface density of injected charge.

Fig. 6. Variation of the bulk mobility as a function of gatevoltage.


4.3. Estimation of the bulk mobility

In all cases, the gate-voltage dependent mobilityshows a decrease at high gate voltage. To accountfor this effect, we assume that the mobility is sub-stantially lower in the region close to the insula-tor–semiconductor interface than in the bulk ofthe film. The above developed multi-layer modelwas used to account for this degradation of themobility. The effective mobility of the semiconduc-tor is derived by identifying the film to parallels lay-ers of mobility li:

leff ¼Xn

1

lini

ntot

: ð7Þ

If the mobility in the first layer can be neglected infront of that in the bulk of the film, we have

leff ’ lb 1� n1

ntot

� �; ð8Þ

where lb is the bulk mobility.

In practice, the steps of the calculation were as fol-lows: (1) from Eqs. (A.10), (2) and (3), the density ofcharges ni in each layer of a 20 layer-thick pentacenefilm (permittivity: e = 3e0, room temperature, thick-ness of a layer d = 1.5 nm, insulator capacitanceCi = 75 nF/cm2) was numerically calculated as afunction of gate voltage; (2) The variation of(1 � n1/ntot) as a function of gate voltage was foundto be nicely fitted to an empirical function of the form(1 + VG)�C where C = 0.71; (3) The resulting gate-voltage dependent bulk mobility is shown in Fig. 6.These curves will be discussed in the next section.

5. Discussion

The most prominent finding of our modeling isthat the mobility in the layer next to the insulatoris significantly lower than that in the bulk of thefilm. We note that this is in agreement with whatfound by measuring the mobility as a function ofthe thickness of the film; it was reported that themobility steadily increases with film thickness, withbulk mobility only occurring above six layers [20].

The first point to discuss is: Why is mobility degra-dation so rarely observed in organic transistors [6,5]?The answer is in the amount of charge induced in thechannel. Most OTFTs use gate dielectrics with a typ-ical capacitance of 10 nF/cm2, and gate voltages upto a few tens of volts, which represents a maximumdensity of charge carriers of a few 1012 cm�2; this isalmost one order of magnitude lower than the magni-tude used in this work (up to 1.3 · 1013 cm2, seeupper x-axis in Fig. 4). Devices with high gate dielec-tric capacitance are usually designed to work at lowvoltage, so that here too the density of charge inthe channel remains moderate [21–23]. The reason


why mobility degradation is only observed in fewoccasions is thus simply that the gate voltage is not(or cannot be, because of, e.g., limitation due todielectric strength) pushed up to values where thephenomenon occurs.

A second important question is the origin of lowmobility in the first layer. A likely explanation stemsfrom the nature of our gate dielectric, namely, alu-mina. There is now strong evidence for that mobilityin OTFTs depends on the material used as gatedielectric. In particular, mobility decreases whenthe dielectric constant increases [24,12], so alumina(dielectric constant �8–9) is not favorable in thatrespect. What our result suggests is that the decreaseof the mobility is the more important as one getscloser to the insulator–semiconductor interface; thisseems in good agreement with the model of Veresand coworkers that invokes the role of dipolemoments in the insulator [24], the effect of whichdecreases when getting farther from the insulator.It is worth pointing out that the thickness of aSAM does not appear sufficient to weaken mobilitydegradation, in contrast to what reported withultra-thin polymer layers [25]. Accordingly, it canbe expected that mobility degradation will be of les-ser extent in devices involving low dielectric con-stant insulators.

As for the bulk mobility, Fig. 6, we note that itfirst increases with gate voltage, and then levels offat a magnitude that can be viewed as the grain (sin-gle crystalline) mobility. According to the MTRmodel, the initial increase corresponds to the fillingof the traps in the grain boundaries. The fact that ittakes longer to fill the traps in the SAM modifieddevices is consistent with smaller grains (averagediameter ranging between 50 and 100 nm, as com-pared to around 1 lm on bare alumina). That is,grain boundaries occupy a larger part of the film.On the other hand, the grain mobility is higher insmaller grains (ca. 5 cm2/V s) than in larger ones(ca. 3 cm2/V s), meaning that large grains are moredefective than small ones. Such a conclusion couldaccount for the now well-documented fact that themobility of pentacene decreases when grain sizeincreases [26,27], which is at variance with what usu-ally found in polycrystalline semiconductors.

6. Conclusion

We have determined the gate-voltage dependentmobility in pentacene films vapor deposited on bareand SAM-modified alumina. Raw data were cor-

rected for contact resistance and mobility degrada-tion. This was done with the help of an originalparameter extraction method, and the use of amodel to estimate the distribution of charge in theconducting channel, in which the pentacene film isdepicted as a stack of dielectric layers. The thusextracted bulk mobility was found to first increase,then level off at a value that is interpreted as thegrain mobility. Following the MTR model, the ini-tial increase is attributed to the filling of trapslocated in grain boundaries. In films deposited onSAMs, made of small grains, the density of trapsassociated to grain boundaries is higher, while themobility within the grains is larger than in the largegrains found in films grown on bare alumina. Inother words, large grains present more defects thansmall ones, which is in agreement with the well-doc-umented fact that high mobility in pentacene isassociated with small grains.

Acknowledgements

We thank Dr. Herve Aubin and Mr. Hatem Diaffor the deposition of alumina, and Dr. Philippe Langfor the elaboration of the self-assembled monolayers.The multi-layer model was initiated with Prof. LiberoZuppiroli and Prof. Marie-Noelle Bussac, and devel-oped during a stay at Bologne, Italy, under the invi-tation of Dr. Fabio Biscarini. Financial support forthis stay by the Italian CNR is acknowledged.

Appendix A. The multi-layer model

The organic semiconductor film is modeled as astack of n dielectric layers of thickness d, wherethe density of charge ni is assumed to be uniform.This is valid in the low injection regime because(1) no more than one charge per molecule is injectedand (2) the injected charge practically extends allover the molecule [10]. Let Fi and Vi be the valueof the electric field and potential at the borderlinebetween the ith and (i + 1)th layers. Because ni isconstant, F varies linearly with distance:

F ¼ aixdþ bi; i 6

xd6 iþ 1: ðA:1Þ

Applying Gauss’s law to the ith layer gives

F i�1 � F i ¼qni

e: ðA:2Þ

where q is the elemental charge and e the permittiv-ity of the semiconductor. Summing up Eq. (A.2)from i + 1 to n and setting Fn = 0 leads to


F i ¼qe

Xn

iþ1

nj: ðA:3Þ

The electric field at both sides of the ith layer writes

F i�1 ¼ aiði� 1Þ þ bi ðA:4Þand

F i ¼ aiiþ bi: ðA:5ÞFrom Eqs. ((A.3)–(A.5)), ai and bi are calculated as

ai ¼ F i � F i�1 ¼ �qni

eðA:6Þ

and

bi ¼ F i � aii ¼qe

ini þXn

iþ1

nj

!: ðA:7Þ

In turn, the electrical potential V is obtained by inte-grating F = �dV/dx between x

d ¼ i� 1 and xd ¼ i.

�Z i

i�1

dV ¼ dZ i

i�1

Fxd

� �d

xd

� �;

V i�1 � V i ¼qde� ni

2

xd

� �2

þ ini þXn

iþ1

nj

!xd

" #xd¼i

xd¼i�1

¼ qde

ni

2þXn

iþ1

nj

!: ðA:8Þ

Thermal equilibrium between the layers gives us thefollowing additional relation between the densitiesof charge:ni

niþ1

¼ expq

kTV i � V iþ1ð Þ

h i: ðA:9Þ

Inserting Eq. (A.8) in Eq. (A.9), we finally obtain

ni ¼ niþ1 expq2dekT

niþ1

2þXn

iþ2

nj

!" #: ðA:10Þ

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