external clock reference alarm handling

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External Clock Reference Alarm Handling Alarm DescriptionThis alarm is reported when a BTS fails to perform clock synchronization because external reference clock signals are lost, when the reference clock is unavailable, or when there is a large frequency offset between the reference clock and the local oscillator. Alarm ALM-26262 External Clock Reference Problem, Specific Problem= Excessive Frequency Difference between Clock Reference and Local Crystal Oscillator Possible Cause 1. Transmission quality unstable. Transmission instability is the major cause of this alarm. 2. Clock Source Lost. 3. WMPT/GTMU board is faulty; the frequency output of the crystal oscillator can’t trace and lock the upper level reference clock which leads to clock reference alarm. 4. Configuration issue. Handling Procedure 3G SITE Step 1. Check clock status. The PLL status should be equal to LOCKED to clear the alarm which means that the local oscillator is getting its clock from the source. From the result below, the clock is in Free running instead of Locked. %%DSP CLKSTAT: SN=7;%% Display System Clock Status

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huawei external clock reference guide

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Page 1: External Clock Reference Alarm Handling

External Clock Reference Alarm Handling

Alarm Description:This alarm is reported when a BTS fails to perform clock synchronization because external reference

clock signals are lost, when the reference clock is unavailable, or when there is a large frequency

offset between the reference clock and the local oscillator.

Alarm

ALM-26262 External Clock Reference Problem, Specific Problem= Excessive Frequency Difference

between Clock Reference and Local Crystal Oscillator

Possible Cause1. Transmission quality unstable. Transmission instability is the major cause of this alarm.

2. Clock Source Lost.

3. WMPT/GTMU board is faulty; the frequency output of the crystal oscillator can’t trace and

lock the upper level reference clock which leads to clock reference alarm.

4. Configuration issue.

Handling Procedure

3G SITE

Step 1. Check clock status. The PLL status should be equal to LOCKED to clear the alarm which means that the local oscillator is getting its clock from the source. From the result below, the clock is in Free

running instead of Locked.

%%DSP CLKSTAT: SN=7;%%

Display System Clock Status

---------------------------

Cabinet No. = 0

Subrack No. = 0

Slot No. = 7

Current Clock Source = Line Clock

Current Clock Source State = Frequency Deviation

Clock Working Mode = Manual

PLL Status = Free running

(Number of results = 1)

--- END

NOTE: Please check PLL status reference on the last pag.

Step 2. Check the clock resource. Check other sites of the RNC if also experiencing clock problem. If majority of sites are normal, clock resource is working without any problem, if not check the RNC

interface board and clock source.

Step 3. Check if there is fault or sync issue in the transmission network.

Page 2: External Clock Reference Alarm Handling

Step 4. Modify the value of the Current DA to adjust the value of the frequency offset to zero. Theoretically we can only adjust the frequency offset from -19 to 19.

1. Open the Maintenance Client for the NodeB. Click on the MAINTENANCE and expand the

REALTIME SPECIFIC MONITORING Tree to get on the CLOCK TEST.

2. Double click on the CLOCK TEST. A window will prompt up. Set Cabinet No = 0, Subrack No =

0, Slot No = 7 (WMPT board) and then click OK. This will show the current frequency

offset/difference of the internal oscillator to the source clock. You can choose the chart

graph to see how the frequency offset move when you adjust the current DA value. You

should adjust the current DA to make the difference as close to zero.

Page 3: External Clock Reference Alarm Handling

3. Display the CLOCK DA and take note of the Current DA value.

%%DSP CLKDA: SN=7;%%

Display Clock DA

----------------

Page 4: External Clock Reference Alarm Handling

Cabinet No. = 0

Subrack No. = 0

Slot No. = 7

Initial DA = 32316

Center DA = 32029

Current DA = 32029

(Number of results = 1)

--- END

4. Use the formula below to calculate for the value of the new current DA to adjust the

Frequency difference to 0.

New Current DA Value = Current DA – (65535/40 Hz) * Ave. Frequency Offset

5. Modify the value of the current DA with the result from the formula. You can change further

the DA value until the difference is almost 0.

%%MOD CURRDA: SN=7, DA=37760;%%

--- END

%%MOD CURRDA: SN=7, DA=37595;%%

--- END

Page 5: External Clock Reference Alarm Handling

6. When the difference is almost 0, modify the Center DA according to the Current DA. List the

clock record to check on the PLL status. It takes time before the clock will locked to the

source (about 2 – 3 hours), the alarm will clear after this time. (The PLL status will be

changed from Free Running Capture Fast Tracking Locked, see reference on the last

page)

%%MOD CENTERDA: SN=7, DA=37595;%%

--- END

%%LST CLKRECORD: SN=7;%%

List Clock Record

-----------------

Time PLL Status Current DA Center DA

2012-07-06 10:42:25 DST Fast tracking 37595 37595

2012-07-06 10:30:53 DST Free running 37760 32029

2012-07-06 10:30:19 DST Free running 38582 32029

2012-07-06 10:29:29 DST Free running 36945 32029

2012-05-27 03:26:39 DST Free running 32029 32029

2012-05-27 03:26:39 DST Free running 32029 32029

2012-05-27 01:56:44 DST Fast tracking 32029 32029

2012-05-27 01:51:43 DST Free running 32029 32029

2012-05-27 01:51:43 DST Free running 0 32029

(Number of results = 18)

--- END

7. We can forced the clock to Fast track the source by setting the clock working mode to Free

Page 6: External Clock Reference Alarm Handling

Running then setting back to Manual.

%%LST CLKMODE:;%%

List Clock Working Mode

-----------------------

Clock Working Mode = Manual

Selected Clock Source = Line Clock

Clock Source No. = 0

(Number of results = 1)

--- END

%%SET CLKMODE: MODE=FREE;%%

--- END

%%SET CLKMODE: MODE=MANUAL, CLKSRC=LINECLK;%%

--- END

%%LST CLKRECORD: SN=7;%%

List Clock Record

-----------------

Time PLL Status Current DA Center DA

2012-07-06 10:55:56 DST Fast tracking 37595 37595

2012-07-06 10:54:51 DST Fast tracking 37432 32029

2012-07-06 10:54:08 DST Fast tracking 36940 32029

2012-07-06 10:42:25 DST Fast tracking 37760 32029

2012-07-06 10:30:53 DST Free running 37760 32029

2012-07-06 10:30:19 DST Free running 38582 32029

2012-07-06 10:29:29 DST Free running 36945 32029

2012-05-27 03:26:39 DST Free running 32029 32029

2012-05-27 03:26:39 DST Free running 32029 32029

2012-05-27 01:56:44 DST Fast tracking 32029 32029

2012-05-27 01:51:43 DST Free running 32029 32029

2012-05-27 01:51:43 DST Free running 0 32029

(Number of results = 18)

--- END

8. We can see that the alarm will clear in few minutes but the clock working state will stay to

Fast Tracking until it is locked to the source. If after sometime and the clock cannot locked to

the external source the clock state will come back to the Free running state and the alarm

will reappear.

Page 7: External Clock Reference Alarm Handling

%%LST CLKRECORD: SN=7;%%

List Clock Record

-----------------

Time PLL Status Current DA Center DA

2012-07-06 13:28:27 DST Locked 37616 37595

2012-07-06 12:58:17 DST Locked 37615 37595

2012-07-06 12:58:17 DST Locked 37595 37595

2012-07-06 10:55:56 DST Fast tracking 37595 37595

2012-07-06 10:54:51 DST Fast tracking 37432 32029

2012-07-06 10:54:08 DST Fast tracking 36940 32029

2012-07-06 10:42:25 DST Fast tracking 37760 32029

2012-07-06 10:30:53 DST Free running 37760 32029

2012-07-06 10:30:19 DST Free running 38582 32029

2012-07-06 10:29:29 DST Free running 36945 32029

2012-05-27 03:26:39 DST Free running 32029 32029

2012-05-27 03:26:39 DST Free running 32029 32029

2012-05-27 01:56:44 DST Fast tracking 32029 32029

2012-05-27 01:51:43 DST Free running 32029 32029

2012-05-27 01:51:43 DST Free running 0 32029

(Number of results = 21)

--- END

Step 5. Reset/ replace the WMPT board.

Page 8: External Clock Reference Alarm Handling

2G SITE

Same principle works with 2G but the alarm handling is slightly different.

Step 1. Modify the value of the Current DA to locked the BTS clock to the external source.

1. Open the BSC LMT. On the BTS Device Panel, right click on the GTMU and select QUERY

BOARD INFORMATION. We can see that the Clock is free oscillating (same with Free running

in 3G). Clock Source is TRACE BSC CLOCK which means that the BTS gets its clocking from the

BSC through Abis Link.

2. Right click again on the GTMU then select MAINTAIN CLOCK. Take note of the Clock Factory

Value and the Current DA value.

Page 9: External Clock Reference Alarm Handling

3. Modify the Current DA value by running the command below. Set the Calibration Value to

the Clock Factory Value.

Page 10: External Clock Reference Alarm Handling

%%SET BTSCLKPARA: IDTYPE=BYID, BTSID=187, CN=0, SRN=0, SN=6, CLKMOD=BSCCLK, TRCRNGLMT=DISABLE, CALVAL=1901;%

%

RETCODE = 0 Execution succeeded.

--- END

4. Then save the BTS clock by running the command below.%%SAV BTSCLKPARA: IDTYPE=BYID, BTSID=187;%%

--- END

5. Wait until the alarm clears and check on the clock working state to change to Locked. It will

be changed from Free Oscillation Capture Locked.

Page 11: External Clock Reference Alarm Handling

6. If the clock working state changed to Locked then we can enable back the Clock Source to

the BSC clock and setting the calibration value to the current DA value.%%SET BTSCLKPARA: IDTYPE=BYID, BTSID=187, CN=0, SRN=0, SN=6, CLKMOD=BSCCLK, TRCRNGLMT=ENABLE, CALVAL=2285;%%

--- END

7. Save again the BTS clock by running the command below.%%SAV BTSCLKPARA: IDTYPE=BYID, BTSID=187;%%

--- END

PLL State Mode

1. Free Running

If no reference clock source is configured of the reference clock sources are unavailable, the

PLL works in free running state.

If there’s an available reference clock source, the BSC judges the reference clock source for

260 seconds. If the source remains stable for more than 260 seconds, the PLL shifts to quick

capture state. Otherwise, the PLL still works in free running state.

Page 12: External Clock Reference Alarm Handling

2. Quick Capture

If the reference clock source is available and remains stable for a period (longer than 400

seconds for a GPS source or 200 seconds for any source other than the GPS source), the PLL

shifts to tracking state.

If the reference clock is lost, the PLL shifts back to free running state.

3. Fast Tracking

4. Locked

Difference between CENTER and CURRENT DA

When the NE clock works in Free running mode, the current DA will be changed according to the

Center DA. If the NE uses a clock source, the current DA changes with the frequency of the clock

source. If the external clock source stays locked for seven consecutive days, this shows that the clock

source is very stable. In this case the clock module overwrites the center DA with the current DA.