exclusive test and its application to fault diagnosis
DESCRIPTION
Exclusive Test and its Application to Fault Diagnosis. Vishwani D. Agrawal Dong Hyun Baik Yong C. Kim Kewal K. Saluja. Overview. Problem Statement Introduction Background on Diagnosis Definitions for Diagnosis Main Idea Exclusive Test Example of Exclusive Test - PowerPoint PPT PresentationTRANSCRIPT
Exclusive Test and its Exclusive Test and its Application to Fault Application to Fault
DiagnosisDiagnosisVishwani D. AgrawalVishwani D. Agrawal
Dong Hyun BaikDong Hyun BaikYong C. KimYong C. Kim
Kewal K. SalujaKewal K. Saluja
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 2
OverviewOverview
► Problem StatementProblem Statement► IntroductionIntroduction
Background on DiagnosisBackground on Diagnosis Definitions for DiagnosisDefinitions for Diagnosis
► Main IdeaMain Idea Exclusive TestExclusive Test Example of Exclusive TestExample of Exclusive Test Exclusive Test GenerationExclusive Test Generation Properties of Exclusive TestProperties of Exclusive Test
► Diagnosis MethodDiagnosis Method► ResultsResults► ConclusionConclusion
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 3
Problem StatementProblem Statement
►Obtain high resolution Obtain high resolution diagnostic test using a single-diagnostic test using a single-fault ATPG.fault ATPG.
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 4
Introduction: Introduction: Background on Background on DiagnosisDiagnosis
► Single-fault dictionary approachesSingle-fault dictionary approaches Simulation based: Chang et al.Simulation based: Chang et al. Fault Diagnosis of Digital Systems, NY, Wiley-Fault Diagnosis of Digital Systems, NY, Wiley-
Interscience, 1970Interscience, 1970 Most common method for diagnosisMost common method for diagnosis
► Diagnostic test pattern generation: Diagnostic test pattern generation: Specialized Specialized ATPGsATPGs Implication based: Gruning et al. Implication based: Gruning et al. DIATEST: A Fast Diagnostic Test Pattern Generator DIATEST: A Fast Diagnostic Test Pattern Generator
for Combinational circuits - ICCAD, 1991for Combinational circuits - ICCAD, 1991 Multiple-pass strategy: Savir et al. - Multiple-pass strategy: Savir et al. -
Testing for, and Distinguishing between Failures - Testing for, and Distinguishing between Failures - FTCS, 1982FTCS, 1982
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 5
Diagnostic dictionaryDiagnostic dictionary
Introduction: Introduction: Definitions for Definitions for DiagnosisDiagnosis
a
b
c e f
d
g
h
i
► Consider CUT on the rightConsider CUT on the right All 10 faults are detected by 5 All 10 faults are detected by 5
test vectors: Ttest vectors: T11 = 001, T = 001, T22 = 010, = 010, TT33 = 011, T = 011, T44 = 101, T = 101, T55 = 111 = 111
TT11TT22TT33TT44TT55
aa11 1 0 1 0 01 0 1 0 0
bb11 0 0 0 1 00 0 0 1 0
cc00 0 0 1 0 10 0 1 0 1
cc11 0 1 0 1 00 1 0 1 0
dd11 0 0 0 1 00 0 0 1 0
ff11 0 0 1 0 00 0 1 0 0
gg00 0 0 0 0 10 0 0 0 1
hh00 0 1 0 0 00 1 0 0 0
ii00 0 1 0 0 10 1 0 0 1
ii11 1 0 1 1 01 0 1 1 0
s-a-1
s-a-1
Add T6 = 000
TT66
00
11
00
00
00
00
00
00
00
11
● DR = 10/9=1.11DR = 10/9=1.11► 10 Faults, but only 9 syndromes: 10 Faults, but only 9 syndromes: bb11 and d and d11 cannot be distingushied cannot be distingushied
● DR = 10/10=1.00DR = 10/10=1.00► 10 syndromes: 10 syndromes: bb11 and d and d11 are now distinguished are now distinguished
test syndrome for fault gtest syndrome for fault g00
• Diagnostic Resolution (DR)Diagnostic Resolution (DR)..
DR = No. of faults DR = No. of faults (classes) (classes) No. of syndromes No. of syndromes A measure of quality of A measure of quality of diagnosisdiagnosis
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 6
Main IdeaMain Idea
►Exclusive testExclusive test An Input vector that detects only one An Input vector that detects only one
fault from a pair of targeted faults at a fault from a pair of targeted faults at a primary outputprimary output
CUTfault f1
CUTfault f2
Exclusivetest vector
D 1
1
21
2010
CC
CCCC
CC00: A fault free circuit: A fault free circuit CC11: CUT with fault : CUT with fault ff11
CC22: CUT with fault : CUT with fault ff22
Diagnostic Diagnostic dictionarydictionary
Example of Exclusive TestExample of Exclusive Test► ApplicationApplication
Generate an additional vector to improve diagnostic resolution:Generate an additional vector to improve diagnostic resolution: distinguish a pair of faults, distinguish a pair of faults, bb11 and and dd11..
► ExampleExample
a
b
c e f
d
g
h
iTT11TT22TT33TT44TT55
aa11 1 0 1 0 01 0 1 0 0
bb11 0 0 0 1 00 0 0 1 0
cc00 0 0 1 0 10 0 1 0 1
cc11 0 1 0 1 00 1 0 1 0
dd11 0 0 0 1 00 0 0 1 0
ff11 0 0 1 0 00 0 1 0 0
gg00 0 0 0 0 10 0 0 0 1
hh00 0 1 0 0 00 1 0 0 0
ii00 0 1 0 0 10 1 0 0 1
ii11 1 0 1 1 01 0 1 1 0
s-a-1s-a-1
CUTfault b1
CUTfault d1
Exclusivetest vector
“abc”
D
T6 = 000
TT66
00
11
00
00
00
00
00
00
00
11
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 8
a
b
ce f
dg
h
i
e f
dg
h
i
s-a-
1
Exclusive Test GenerationExclusive Test GenerationKim, Agrawal and Saluja - Kim, Agrawal and Saluja -
“Multiple Faults: Modeling, Simulation and test” VLD “Multiple Faults: Modeling, Simulation and test” VLD 20022002
Exclusive test for (b1,d1), T6 = 000
0
0
0
D
b1
d1
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 9
Properties of Exclusive TestProperties of Exclusive Test
► If there exists an exclusive test two If there exists an exclusive test two faults then they can be faults then they can be distinguished from each other by distinguished from each other by using that test.using that test.
► If no exclusive test exists then the If no exclusive test exists then the faults cannot be distinguished; two faults cannot be distinguished; two faults form an equivalent fault set.faults form an equivalent fault set.
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 10
Diagnosis MethodDiagnosis MethodStart with fault detection tests
Make dictionary and isolate undiagnosed fault sets
Generate an exclusive test for an undiagnosed fault pair
Is DR satisfactory?
Test exists?
DoneYes
No
YesAppend the test
ATPG aborted
Form an equiv.Fault set
No
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 11
Results: ModelResults: Model
►For illustration, an XOR-tree is For illustration, an XOR-tree is added to the output of the circuit added to the output of the circuit under test to make it a single under test to make it a single output circuit.output circuit. We use We use ** to denote a modified circuit to denote a modified circuit
with a single output XOR-tree at its with a single output XOR-tree at its outputs. outputs.
►General multiple-PO case is General multiple-PO case is discussed later.discussed later.
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 12
Test GenerationTest Generation−−ISCAS85 CircuitsISCAS85 Circuits
Circuit names c432*
c880* c1908* c3540*
# of fault detection tests 82 104 176 239
# of equiv. collapsed faults 524 942 1879 3428
# of redundant faults 4 5 4 90
# of aborted faults 0 2 27 81
# of detected faults 520 935 1848 3257
Fault coverage (%) 99.24 99.26 98.35 95.01
Fault efficiency (%) 100 99.79 98.56 97.57
Circuit names c432* c880* c1908* c3540*
# of faults 520 935 1848 3257
# of syndromes 426 789 1450 2706
# of diagnosed faults 354 686 1121 2351
Diagnostic resolution ( DR) 1.22 1.19 1.27 1.20
Max. faults per syndrome 5 6 8 12
# of fault detection vectors 82 104 176 239
# of syndromes 506 870 1579 2844
# of diagnosed faults 492 808 1331 2559
Diagnostic resolution (DR) 1.03 1.07 1.17 1.14
Max. faults per syndrome 2 3 8 8
Total test vectors 126 152 262 328
# of exclusive tests added 44 48 86 89
# of equivalent pairs 0 0 0 1
# of aborted pairs 14 79 321 662
Diagnostic ResultsDiagnostic Results−−ISCAS85 ISCAS85 CircuitsCircuits
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 14
Test GenerationTest Generation−−c432c432
Detection tests c432* c432 c432
# of fault detection tests 82 82 82
# of equiv. collapsed faults 524 524 524
# of redundant faults 4 4 4
# of aborted faults 0 0 0
# of detected faults 520 520 520
Fault coverage (%) 99.24 99.24 99.24
Fault efficiency (%) 100 100 100
Diagnostic ResultsDiagnostic Results−−c432c432Circuit names c432* c432 c432
# of faults 520 520 520
# of syndromes 428 495 500
# of diagnosed faults 354 471 479
Diagnostic resolution (DR) 1.22 1.05 1.04
Max. faults per syndrome 5 5 4
# of fault sets 506 507 507
# of syndromes 506 507 507
# of diagnosed faults 492 494 494
Diagnostic resolution (DR) 1.00 1.00 1.00
Max. faults per syndrome 1 1 1
Total test vectors 131 131 123
# of exclusive tests 49 13 41
# of equivalent pairs 14 13 13
# of aborted pairs 0 0 0C432C432: Simulated using tests derived with c432*, then targeted only undiagnosed faults : Simulated using tests derived with c432*, then targeted only undiagnosed faults
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 16
ConclusionConclusion
►Definition of an exclusive test and an Definition of an exclusive test and an ATPG method are introduced.ATPG method are introduced.
►A comprehensive exclusive test based A comprehensive exclusive test based diagnostic method is presented where diagnostic method is presented where a conventional single fault ATPG can a conventional single fault ATPG can be used. be used.
►Results for ISAS85 benchmark circuits Results for ISAS85 benchmark circuits are presented.are presented.
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 18
Supplement 1: Supplement 1: Multiple Fault ModelMultiple Fault Model
a A
b B
c C
d D
Equivalent Single Stuck-at fault
► Kim, Agrawal and Saluja - Kim, Agrawal and Saluja - ““Multiple Faults: Modeling, Simulation and test” - Multiple Faults: Modeling, Simulation and test” -
VLSI Design,2002VLSI Design,2002 Convert multiple fault test generation problem Convert multiple fault test generation problem
into single fault test generation problem.into single fault test generation problem. s-a-1
a A
b B
c C
d D
Multiple (4) stuck-at fault
s-a-1
s-a-1
s-a-0
s-a-0
Agrawal, Baik, Kim and Saluja: VLSI Design 2003 19
Supplement 2: Supplement 2: Test GenerationTest Generation−−ISCAS85 ISCAS85 CircuitsCircuits
Circuit names c17* c432* c499* c880* c1355*
c1908* c2670*
c3540*
# of detection tests 6 82 58 104 104 176 236 239
# of equiv. faults 22 524 758 942 1574 1879 2747 3428
# of redundant faults 0 4 0 5 0 4 84 90
# of aborted faults 0 0 32 2 32 27 884 81
# of detected faults 22 520 726 935 1542 1848 1779 3257
Fault coverage (%) 100 99.24 95.78 99.26 97.97 98.35 64.76 95.01
Fault efficiency (%) 100 100 95.78 99.79 97.97 98.56 66.8 97.57
Circuit names c17* c432* c499*
c880*
c1355*
c1908* c2670*
c3540*
# of faults 22 520 726 935 1542 1848 1779 3257
# of syndromes 14 426 691 789 873 1450 1285 2706
# of diagnosed faults 9 354 661 686 360 1121 972 2351
DR 1.57 1.22 1.05 1.19 1.77 1.27 1.38 1.2
Max. faults per syndrome 4 5 4 6 11 8 11 12
Diagnosis with detection and exclusive tests
# of faults 22 520 726 935 1542 1848 1779 3256
# of syndromes 22 506 710 870 902 1579 1385 2844
# of diagnosed faults 22 492 694 808 366 1331 1097 2559
DR 1 1.03 1.02 1.07 1.71 1.17 1.28 1.14
Max. faults per syndrome 1 2 2 3 3 8 11 8
Total test vectors 11 126 72 152 129 262 293 328
# of exclusive tests 5 44 14 48 25 86 57 89
# of equivalent pairs 0 0 0 0 0 0 0 1
# of aborted pairs 0 14 16 79 744 321 630 662
Supplement 3: Supplement 3: Diagnostic ResultsDiagnostic Results−−ISCAS85 ISCAS85 CircuitsCircuits