eurosensors xiv m1-1 the 14 european conference on solid ...fabiano/ie012/material...

EUROSENSORS XIVThe 14th European Conference on Solid-State TransducersAugust 27-30, 2000, Copenhagen, Denmark

M1-1Plenary opening session

CMOS-based Microsensors

Henry Baltes and Oliver Brand

Physical Electronics Laboratory, ETH Zurich

Hoenggerberg, HPT H6, CH-8093 Zurich, Switzerland

e-mail: [email protected], http://www.iqe.ethz.ch/pel

Summary. CMOS-based microsensors benefit from well-established fabrication technologies andthe possibility of on-chip circuitry. In these devices, added on-chip functionality can be implemented,such as calibration, self-testing, and digital interfaces. The paper summarizes major technologicalapproaches to CMOS-based microsensors. Two packaged microsystems, namely a thermal imagerand a chemical microsystem, fabricated using CMOS technology in combination with bulk-micro-machining and thin film deposition, are reviewed. Finally, CMOS microsensors for the characteriza-tion and optimization of ball bonding processes in the microelectronics packaging industry arepresented.

Keywords: CMOS, post-processing, chemical sensor, infrared radiation sensor, thermal imager,ball bond characterization, wire bonder calibration

Introduction and Technology Overview

Over the last decades, CMOS (complementary

metal oxide semiconductor) technology has become

by far the predominant fabrication technology for inte-

grated circuits (IC). Tremendous efforts have been

made to continuously improve yield and reliability,

while decreasing minimal feature sizes and fabrication

cost. Nowadays, the power of CMOS technology is

not only exploited for ICs but also for a variety of

microsensors benefiting from well established fabrica-

tion technologies and the possibility of on-chip cir-

cuitry. In these devices, added on-chip functionality

can be implemented, such as calibration by digital pro-

gramming, self-testing, and digital interfaces.

Ideally, the microsensor is completely formed

within the regular CMOS process sequence. This is

possible for a number of, e.g., magnetic, optical and

temperature sensors [1], which have been commer-

cially available for many years. New magnetic sensing

devices, such as inductive proximity sensors [2] and

fluxgate sensors [3], have been developed by combin-

ing CMOS technology with the electrodeposition of

metal coils and ferromagnetic cores, respectively.

In recent years, an increasing number of micro-

electromechanical systems (MEMS) have been pro-

duced using CMOS (and BiCMOS) technology in

combination with compatible micromachining and

thin film deposition steps. The add-on steps can pre-

cede or follow the regular CMOS process (pre-CMOSor post-CMOS), or can be performed in-between the

CMOS steps (intermediate processing).

In case of the pre-CMOS approach, the sensing

structures are formed before the regular CMOS pro-

cess sequence. Examples are vertical Hall devices

based on a pre-CMOS trench etching technology [4],

“embedded” polysilicon microstructures based on the

iMEMS technology of Sandia [5], and pre-CMOS sili-

con fusion bonding [6]. In all cases, the pre-microma-

chined wafers have to fulfill stringent criteria, e.g.,

with respect to contaminations, to be able to enter a

microelectronic processing line afterwards.

In the case of intermediate processing, the CMOS

process sequence is interrupted for additional thin film

deposition or micromachining steps. This approach is

commonly exploited to implement surface microma-

chined polysilicon structures [7] in CMOS technology.

Either the standard gate polysilicon or an additional

low-stress polysilicon layer are used as structural

material. Examples of commercially available micro-

sensors relying on intermediate process steps are Infin-

eon’s pressure sensor IC [8] and Analog Devices’

accelerometers [9]. Both are based on BiCMOS tech-

nologies, use polysilicon structures as micromechani-

cal elements, and release the MEMS by sacrificial

layer etching.

In case of the post-CMOS approach, two general

fabrication strategies are pursued. The MEMS struc-

tures can be completely built on top of a finished

CMOS substrate, leaving the CMOS layers untouched.

Examples for this approach are Texas Instruments’

Digital Micromirror Device (DMD, [10]), the electro-

plated ring gyroscope [11,12] developed at the Univer-

sity of Michigan and Delphi Automotive Systems, and

Honeywell’s thermal imagers [13]. In all three cases,

the microstructures are released using sacrificial layer

etching. Alternatively, the MEMS can be obtained by

machining the CMOS layers after the completion of

the regular CMOS process sequence. Using a variety

of CMOS-compatible bulk- and surface-micromachin-

ing techniques [14-19], e.g., pressure [20,21], flow

ISBN 87-89935-50-0 1

M1-1Opening plenary session

H. Baltes et al., CMOS-based Microsensors, pp. 1-8

[22], chemical [23], and infrared radiation [24] sensors

have been produced this way.

The latter post-CMOS approach is pursued at the

Physical Electronics Laboratory (PEL) of ETH Zurich,

Switzerland, and will be discussed in more detail in

this paper. In particular, three CMOS-based microsen-

sors developed at the PEL are presented:

• CMOS thermal imager for presence detection

• CMOS chemical microsystem for detection of vol-

atile organic compounds in air

• CMOS temperature and stress microsensors for

investigation of wire bonding processes

The emphasis of the paper is on packagedmicrosensors. While microsystem development has

been booming in recent years, microsystem packaging

development is often neglected, even though it usually

is a major cost component and essential for the com-

mercial success of the complete microsystem. Dedi-

cated packaging solutions have been developed for the

thermal imager and the chemical microsystems pro-

tecting on-chip circuitry and reference structures while

providing a “window to the outside world” to sense

the environment.

The temperature and stress sensors for character-

ization of wire bonding processes demonstrate how

CMOS-based microsensors provide new insights in

microelectronics packaging processes.

Post-CMOS Fabrication of Microsensors

In the following, we will concentrate on microsys-

tems fabricated by CMOS technology in combination

with post-CMOS bulk-micromachining of the silicon

substrate. The microsystems presented in this paper

were processed either at Austria Mikro Systeme(AMS), Unterpremstätten, Austria or EM Microelec-tronic-Marin (EM), Marin, Switzerland.

After completion of the industrial CMOS process,

membrane-type structures for, e.g., thermal insulation

of microsensors, are released by anisotropic etching

from the back of the wafer using a potassium hydrox-

ide (KOH) solution. Crucial for the etching result is

the quality of the back surface of the CMOS wafers

and the initial oxygen concentration of the wafer start-

ing material [25].

Membranes consisting of the dielectric CMOS lay-

ers on top of the silicon substrate are obtained by etch-

ing through the complete bulk silicon of the CMOS

wafer. In this case, the thermal oxide serves as an etch-

stop layer. The resulting dielectric membrane struc-

tures are used for sensors requiring excellent thermal

insulation, such as infrared radiation or calorimetric

chemical sensors. Polysilicon and metal structures

sandwiched in-between the dielectric layers can be

used to create, e.g., thermopiles and heating resistors.

Silicon membranes and suspended n-well island

structures are released by combining the KOH etching

step with an electrochemical etch-stop technique. In

this case, the etching stops at the pn-junction between

the CMOS n-well and the p-type substrate. During the

etching step, etching potentials must be applied to the

structural n-wells and the substrate. A special prepara-

tion sequence for the electrochemical etching of

CMOS wafers is described in [15]. By combining the

bulk-micromachining process with additional reac-

tive-ion-etching (RIE), not only membrane structures,

but also bridges and cantilever beams can be released.

Depending on the actual microsystem, additional

thin film deposition steps might complement the pro-

cess sequence. Examples are the electroplating of gold

structures to thermally insulate neighboring pixels of

infrared radiation sensors [24] or the spray-coating of

polymer films as chemically sensitive layers for chem-

ical microsystems [23].

Thermal Imager

CMOS-based thermal imagers with up to 1280 pix-

els have been fabricated using the described post-

CMOS approach [26]. As an example, a 100-pixel

thermoelectric infrared (IR) microsystem is shown in

Fig. 1. It consists of a 3.3 by 3.3 mm2 micromachined

membrane comprised of the dielectric layers of the

CMOS process [24]. A grid of electroplated, 25 µm

thick gold lines divides the membrane into an array of

10 by 10 pixels, thermally separates neighboring pix-

els, and mechanically stiffens the membrane. Incom-

ing IR radiation is absorbed by the membrane

sandwich and heats up individual pixels. The tempera-

Fig. 1: 100-pixel thermoelectric infrared microsystem

with on-chip low-noise amplifier fabricated using

industrial CMOS technology in combination with

post-CMOS gold bumping and micromachining [24,

26].

Low-noise amplifier Multiplexer

Membrane Single pixel

1 mm

2



ture increase of a pixel is converted in an electrical

output voltage using integrated thermopiles consisting

of the polysilicon and the aluminum layer of the

CMOS process. The individual thermopiles are

addressed by an on-chip multiplexer and the thermo-

voltage is amplified on-chip using a low-noise ampli-

fier. Polysilicon heating resistors implemented on

every pixel provide self-test capability.

Fig. 2 shows a thermal image of a person recorded

with a CMOS-based 256-pixel array. The noise equiv-

alent temperature difference resolvable with the

microsystem is below 0.5 K.

The infrared microsystems are fabricated using an

industrial 1 µm CMOS process of EM Microelec-

tronic-Marin SA (EM), Switzerland. The gold struc-

tures are electroplated after completion of the CMOS

process using the industrial gold bumping technology

of EM. The membranes are released by anisotropic sil-

icon etching from the back of the wafer with the ther-

mal oxide acting as intrinsic etch-stop layer [14]. The

front side of the CMOS wafers is protected either

using a mechanical housing or protective metal films

making batch micromachining possible [27].

Packaging for the IR microsystem has to protect

the fragile membrane from mechanical damage, dust,

fingerprints, and unwanted non-far-infrared radiation.

Two different packaging concepts have been realized.

In a more conventional approach, the microsystem

die is mounted in a 40-pin ceramic leaded chip carrier

(CLCC) [26,28]. Electrical interconnections are made

by wire bonding. The cavity of the chip carrier is

sealed with a commercial infrared filter with a high-

pass characteristic (in terms of wavelength), which is

glued onto the CLCC with an adhesive. Based on this

packaging approach, a small series of 100-pixel ther-

mal imagers has been produced for field testing (see

Fig. 3). The thermal imagers consist of the packaged

microsystem mounted on a printed wiring board with a

microprocessor for system control. A Fresnel lens is

used as low-cost optics. The output data are trans-

ferred to a computer via a serial link to display the

thermal images.

In the second, low-cost packaging approach, the

infrared filter is directly bonded onto the sensor die

using a fluxless isothermal solidification process [28,

29] based on the Au-In-Ni system. Isothermal solidifi-

cation provides a temperature stability of the bond

which exceeds the bonding temperature. The sensor

die with attached filter is further mounted in a plastic

ball grid array (PBGA) package to enable standard

SMT (surface mount technology) assembly of the

microsystem.

The optical filter is bonded to the outer frame of

the gold grid separating the pixels of the sensor array

[28]. Therefore, the electroplated gold structure on the

CMOS die acts as spacer between sensor and filter and

is actively involved in the bonding process. The IR fil-

ter consists of a silicon chip covered on both sides

with a stack of optical layers. An additional stack of

Cr, Au, Ni and In films is deposited and patterned on

the filter wafer to prepare for the bonding process.

Prior to bonding, the filter wafer is diced.

Chip and filter are aligned to each other and the

bonding is performed in forming gas atmosphere with

a bonding temperature, time, and pressure of 195 °C,

10 minutes, and 8 MPa, respectively, as optimal

parameters. Fig. 4 shows a 100-pixel infrared micro-

system with bonded filter.

Under a constant shear stress of 0.5 MPa, the Au-

In-Ni bonds exhibit a temperature stability up to

473 °C which is well above the bonding temperature

and the processing temperature of subsequent SMT

soldering steps (typically 230 °C). The reliability of

the bond was verified using thermal aging at 155 °C

for 1000 hours and temperature cycling between -40

and 155 °C. The bond withstands three reflow solder-

ing cycles without change in shear strength [28,29].

Fig. 2: Thermal image of a person with his arms up

recorded with a 16 by 16 pixel CMOS infrared sensor

array.

Fig. 3: Thermal imager with 100-pixel CMOS IR

array mounted in a ceramic leaded chip carrier; the

packaged microsystem is mounted on a printed wiring

board with microprocessor for system control; the

Fresnel lens and infrared filter on top of the CLCC

package are removed on the left thermal imager to

show the microsystem die [26].

ISBN 87-89935-50-0 3



After filter direct attachment, the microsystems

were mounted on customized PBGA packages [28].

Electrical interconnections are made with standard

wire bonding. The circuitry and the wire bonds are

protected by applying a glob-top with a dam and fill

technique. After encapsulation, solder spheres have

been attached to the bottom side of the laminated plas-

tic substrate. The top and bottom of the final PBGA

package are shown in Fig. 5.

Chemical Microsensors

Chemical sensors are used nowadays in a variety

of industrial and environmental applications, such as

on-line process monitoring in the food-industry and

personal safety by threshold limit value (TLV) moni-

toring. Commercially available desktop-size electronic

noses are based on arrays of chemical sensors utilizing

different chemically selective films for selectivity

enhancement. Sensing structures include, e.g., quartz

crystal microbalances, calorimetric sensors, and

metal-oxide sensors.

At the Physical Electronics Laboratory (PEL),

CMOS-based chemical microsensors using spray-

coated polymer films as chemically sensitive layers

are developed for the detection of volatile organics in

air [23]. Judicious choice of the chemically sensitive

polymer layers provides a trade-off between revers-

ibility of the polymer-analyte interaction and sensitiv-

ity towards certain analytes. Changes in mass,

temperature, and dielectric constant of the polymer

upon analyte absorption are sensed with resonant [30],

calorimetric [33], and capacitive [31,32] sensing struc-

tures, respectively.

All three sensor types are fabricated using the same

0.8 µm CMOS process of Austria Mikro Systeme

(AMS) and, therefore, can be combined on a single die

together with their signal conditioning circuitry.

Arrays of sensors with different operation principles

and different polymer films are used to improve the

selectivity of the chemical microsystem towards spe-

cific analytes.

Fig. 6 shows a micrograph of a chemical microsys-

tem consisting of an array of four resonant microsen-

sors. The individual resonant cantilever beams have a

size of 150 by 150 µm2 and consist of the n-well of the

CMOS process with the CMOS dielectric layers on

top [30]. The cantilever structures are released by

anisotropic etching with an electrochemical etch-stop

technique and additional reactive-ion-etching steps.

After micromachining, the cantilevers are spray-

coated with the chemically sensitive polymer films.

Implanted p-type resistors are used for electrother-

mal excitation and piezoresistive detection of trans-

verse cantilever vibrations. Four piezoresistors are

arranged in a Wheatstone bridge. An on-chip multi-

Fig. 4: Sensor die of a 100-pixel microsystem with a

silicon filter attached by diffusion bonding [28,29].

Fig. 5: Top and bottom view of a 100-pixel IR micro-

system packaged in a PBGA. The size of the package

is 10.5 by 10.5 mm2, the pitch of the 6 by 6 solder ball

array is 1.5 mm [28].

Silicon filter

Glob top

Laminated plasticsubstrate

Solder balls

Fig. 6: Resonant chemical microsystem consisting of

four cantilever beam sensors, an on-chip multiplexer,

and a low-noise differential difference amplifier [30].

Cantilever beam Low-noise amplifier

4



plexer connects the output signal of the individual

Wheatstone bridges to an on-chip low-noise fully dif-

ferential difference amplifier (DDA) [30].

The gravimetric chemical sensor is operated at its

fundamental resonance frequency using an external

feedback loop [30]. The 150 µm long cantilever cov-

ered with a 3.7 µm (poly)etherurethane (PEUT) layer

has a fundamental resonance frequency of 353 kHz in

air. The short term frequency stability of the resonance

is better than 0.1 ppm. Fig. 7 shows the measured fre-

quency shift of the PEUT-coated cantilever upon

exposure to different concentrations of toluene. In

order to test for reproducibility, the concentrations are

ramped up and down. The measurement chamber is

purged with synthetic air after every single analyte

concentration. Assuming a minimal resolvable fre-

quency shift of 1 Hz, the detection limit for toluene is

about 8 ppm. A frequency shift of 1 Hz corresponds to

an additional mass load of 5 pg.

The CMOS chemical microsystems are packaged

using flip-chip (FC) technology as shown in Fig. 8 for

the capacitive microsystem [31,34]. The capacitive

chemical microsystem consists of three (polymer-

coated) interdigitated sensing capacitors, three

(uncoated) references, a multiplexer, and a Σ∆-modu-

lator for signal read-out.

Proper design of the chip and the substrate ensures

that the polymer-coated sensing capacitors are in con-

tact with the gaseous analyte while the references and

the on-chip circuitry are sealed from the probed vol-

ume. To this end, the three sensing capacitors shown in

Fig. 8 are surrounded by a metal frame. The sensor die

is flip-chip mounted onto a chemically inert ceramic

substrate. Appropriate openings in the substrate guar-

antee the free access of the analyte to the sensing

capacitors. At the same time, the references and on-

chip circuitry are sealed from the probed volume by

the flip-chip frame surrounding the sensors. Finally,

the volume between substrate and chip is filled with an

underfill.

Fig. 8 shows the actual ceramic substrate with the

three laser-cut openings for the sensing capacitors, the

gold pads for the electrical contacts to the chip and the

gold frame sealing references and circuitry from the

probed volume. For initial tests [31,34], an under-

bump-metallization (UBM) consisting of TiW as

adhesion/barrier layer and Cu as wetting layer was

sputter deposited on the CMOS chips and structured.

Eutectic PbSn solder bumps were applied to the

ceramic substrate by screen printing. Afterwards, sub-

strate and chip are assembled using a flip-chip fine

placer and the FC interconnection is formed during a

230°C solder reflow. Finally, the underfill is applied.

Microsensors for Characterization andOptimization of Ball Bonding Processes

Wire bonding technology connects the majority of

today’s integrated circuits to the external world. It is a

flexible technique evolving rapidly to meet new

requirements.

Using thermosonic ball bonding, a gold wire is

welded to an aluminum pad using force, heat, and

ultrasonic energy. Up to now, process optimization is

achieved by time consuming off-line inspection of the

ball and wedge bond and subsequent adaptation of the

various machine parameters. The current demand for

fine pitch (< 40 µm) and low temperature (< 180 °C)

bonding processes requires even more accurate control

-250

-200

-150

-100

-50

0

50

100

0 40 80 120 160

Fre

qu

en

cy

sh

ift

[Hz]

Time [min]

40

0 p

pm

80

0 p

pm

12

00

p

pm

16

00

p

pm

40

0 p

pm

80

0 p

pm

12

00

p

pm

16

00

p

pm

Fig. 7: Output signal of PEUT coated cantilever beam

with a resonance frequency of 353 kHz exposed to dif-

ferent concentrations of toluene; the PEUT layer has a

thickness of 3.7 µm; the measurement chamber is

purged with synthetic air after each analyte concentra-

tion [30].

Fig. 8: Flip-chip mounting principle of capacitive

chemical microsystem onto ceramic substrate; the

CMOS die and the ceramic substrate are not displayed

in scale [31,34].

24 mm

4.9 mm

Opening for

microsensor

Reference Metal frame

Sensor

ISBN 87-89935-50-0 5



of the machine parameters. In addition, an understand-

ing of the physical effects leading to bond formation is

desirable.

To this end, new CMOS-based microsensors have

been developed to measure in-situ temperature and

stress during the ball bonding process [35-37]. The

sensor structures are completely formed within the

CMOS process and enable on-line characterization

and optimization of the ball bonding process. The test

chips were fabricated using a commercial 1 µm

CMOS process of EM Microelectronic-Marin SA,

Switzerland.

Temperature Microsensors

The temperature sensor consists of an aluminum

resistor of circular shape which is integrated around a

circular bonding pad with a pad opening diameter of

75 µm [35]. Figs. 9(a) and (b) show an SEM photo-

graph of a ball bond on the circular test pad and the

microsensor layout, respectively. On the test chip, four

temperature microsensors are connected in a Wheat-

stone bridge arrangement.

While the aluminum resistor is made of the first

metallization layer (metal-1) of the CMOS process,

the bonding pad itself is made of the second metalliza-

tion (metal-2). The metal-2 structure has a diameter of

120 µm and, therefore, covers the metal-1 resistor in

order to increase the heat transport between contact

zone and microsensor. An oxide layer isolates pad and

aluminum resistor.

The measurements were performed on an ESEC

gold ball bonder [35]. Test chips were attached by a

die bonder to custom design BGA (ball grid array)

strips. Electrical connections between the microsen-

sors and the BGA substrate were made directly using

the ball bonder. A specially designed downholder

(clamping plate) with contact fingers to the substrate is

used to read out the microsensor signal during the ball

bond onto the test pad.

An example of a microsensor signal during a ball

bond is shown in Fig. 10. The measured resistance

change is proportional to the temperature change dur-

ing ball bonding. After touchdown of ball and capil-

lary onto the heated chip, the temperature reaches a

minimum because the cooling rate by the capillary and

the wire is faster than the heating rate by the chip

stage. The time delay between impact and the start of

ultrasound dissipation (Fig. 10(a)) was increased to

40 ms in order to separate the thermal signals from

cooling by the capillary and ultrasonic heating.

While the ultrasound is on (Fig. 10(b)), different

phases are distinguishable. In the beginning, a mono-

tonic increase in temperature is observed. The second

phase is characterized by a decrease in slope and a

maximum. From the maximum to the end of ultrasonic

dissipation, a temperature decrease is observed. The

microsensor signal within these three phases is

strongly influenced by the machine parameters and

reveals important information about the bonding pro-

cess, such as the time needed for interconnection

growth [35].

The time average of the offset-compensated micro-

sensor signal from the beginning of the ultrasound to

the time of the maximum (see gray area in Fig. 10)

was found to be characteristic for the bond quality. It

could successfully be related to the shear strength of

the bond determined off-line using a ball shear tester

and a microscope for deformed ball diameter measure-

ment. As a result, bonding force optimization can be

Fig. 9: (a) SEM photograph of ball bond on test pad

surrounded by aluminum temperature sensor; (b) sche-

matic layout of circularly shaped aluminum microsen-

sor integrated around a test pad [35].

(a)

(b)

Test Pad

Aluminum

resistor

75 µ

m

-1.4

-1.2

-1

-0.8

-0.6

-0.4

-0.2

0

-50 -30 -10 10 30 50

Resi

stance c

hange [

%]

Time [ms]

Fig. 10: Resistance change of the microsensor during

test ball bond operation. Bonding force and chip tem-

perature were 250 mN and 106°C, respectively. (a)

and (c) are periods without ultrasonic energy. During

period (b), ultrasonic energy is applied and the bond

forms [35].

(a) (b) (c)

impact

ult

raso

und o

n

ult

raso

und o

ff

tool

lift

off

6



achieved on-line by the microsensors and does not

require off-line (destructive) inspection.

Again, a time delay of 40 ms is inserted between

ultrasonic heating and capillary lift off (Fig. 10(c)).

From the rapid increase of temperature after tool lift

off, a sub-millisecond response time of the tempera-

ture sensor can be estimated.

Stress Microsensor

Stress induced by ultrasonic dissipation during

ultrasonic ball formation is measured in-situ using

piezoresistive microsensors integrated below test

bonding pads [36]. A micrograph and schematic layout

of the integrated ultrasound stress microsensor are

shown in Figs. 11(a) and (b), respectively [36]. A p+-

diffusion as piezoresistive sensing material forms the

actual test structure. The test structure is contacted via

four bonding pads forming a Wheatstone bridge (see

Fig. 11(b)). A constant voltage is applied between the

upper left and lower right bonding pads. The signal

voltage is measured through two 25 µm thick contact

lines at the left and right sides of the structure. The

complete sensor structure is covered by an aluminum

layer in order to minimize noise and light-induced car-

rier generation. The test bonding sites are located at

the positions of the sensing contacts. While a test

bonding pad is placed on the left arm of the sensor, the

aluminum is omitted on the right arm to provide a pas-

sivated test pad for reference measurements.

The stress field generated during the ultrasonic ball

bonding process with a capillary movement parallel to

the current path of the sensing structure periodically

changes the resistances within one arm of the Wheat-

stone bridge. While the resistance in sliding direction

experiences a compressive stress, the other sees a ten-

sile stress. As the ball bond is placed directly between

two of the resistors, positive and negative stress

changes are concentrated on different resistors and a

differential signal can be measured. The Wheatstone

bridge configuration is sensitive to oscillating stress

signals but suppresses symmetrical stress and temper-

ature signals.

Similar to the temperature sensors, the stress sen-

sor dice were die-attached to custom BGA-type sub-

strates for measurement. The microsensor signals

during ball bonding on the aluminum test pad and the

passivated test site were digitally filtered at the applied

ultrasound frequency and its harmonics. The influence

of bonding force, ultrasound power, and bonding tem-

perature was studied. The microsensor signals again

reveal significant process characteristics of the bond

formation. Examples are the minimal ultrasound level

needed for bonding and the ultrasound duration

needed to start (i) scrubbing and intermetallic phase

formation and (ii) attain maximum shear strength [36].

Acknowledgments

The authors are greatly indebted to current and

former staff of the Physical Electronics Laboratory at

ETH Zurich involved in the microsensor development

presented in this work, notably Christoph Hagleitner,

Andreas Hierlemann, Shoji Kawahito (Shizuoka Uni-

versity, Japan), Nicole Kerness, Andreas Koll, Adrian

Kummer, Dirk Lange, Michael Mayer, Thomas

Müller, Ulrich Münch, Oliver Paul, Andri Schaufel-

bühl, Niklaus Schneeberger, Jürg Schwizer, and Marc

Wälti.

The excellent services of the prototype manufac-

turers Austria Mikro Systeme and EM Microelec-

tronic-Marin and the contributions of the industrial

partners ESEC and Siemens Building Technologies,

Cerberus Division are gratefully acknowledged.

This work is supported by the Körber Foundation,

Hamburg, Germany, and the Swiss Priority Program

Micro- and Nanosystems Technology (MINAST).

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(a)

(b)

Aluminum

test pad

Contact

Passivated

test pad

pads

p+-diffusion

ISBN 87-89935-50-0 7



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