Electrical Engineering 348:Electrical Engineering 348:

ELECTRONIC CIRCUITS IELECTRONIC CIRCUITS I

Electrical Engineering 348:Electrical Engineering 348:

ELECTRONIC CIRCUITS IELECTRONIC CIRCUITS I

Dr. John Choma, Jr.Professor of Electrical Engineering

University of Southern CaliforniaDepartment of Electrical Engineering–

ElectrophysicsUniversity Park; Mail Code: 0271

Los Angeles, California 90089-0271

213-740-4692 [Office]626-715-0944 [Fax]818-384-1552 [Cell]johnc@almaak.usc.edu

Spring Semester 2001

Dr. John Choma, Jr.Professor of Electrical Engineering

University of Southern CaliforniaDepartment of Electrical Engineering–

ElectrophysicsUniversity Park; Mail Code: 0271

Los Angeles, California 90089-0271

213-740-4692 [Office]626-715-0944 [Fax]818-384-1552 [Cell]johnc@almaak.usc.edu

Spring Semester 2001

EE 348 – Spring 2001

J. Choma,

Jr.Slide 2

EE 348:EE 348:Lecture Supplement Notes SN1Lecture Supplement Notes SN1

EE 348:EE 348:Lecture Supplement Notes SN1Lecture Supplement Notes SN1

Review of Basic Circuit Theory

andIntroduction To FundamentalElectronic System Concepts

01 January 2001

EE 348 – Spring 2001

J. Choma,

Jr.Slide 3

Outline Of LectureOutline Of LectureOutline Of LectureOutline Of Lecture

• Thévenin’s & Norton’s Theorems

• Basic Electronic System Concepts

• Steady State Sinusoidal Response

• Transient Response

EE 348 – Spring 2001

J. Choma,

Jr.Slide 4

Thevénin’s TheoremThevénin’s TheoremThevénin’s TheoremThevénin’s Theorem

• Concept Two Terminals Of Any Linear Network Can Be Replaced By Voltage

Source In Series With An Impedance Thévenin Voltage Is “Open Circuit” Voltage At Terminals Of Interest Thévenin Impedance Is Output Impedance At Terminals Of Interest

• Linear Load Thévenin Concept Applies To Linear Or Nonlinear Load Voltage VL Is Zero If No Independent Sources Are Embedded In The

Load

V

I

Linear

Netwo

rk Load

G e n e r a l S y s t e m

V

I

Load

T h é v e n i n M o d e l

V t h

Z t h

V

I

L i n e a r L o a d

V t h

Z t h Z l

V l

V

I

Lin

ear

Net

wor

k Load

G e n e ra l S ystem

V

I

Load

T h éve n in M o d e l

V

th

Z th

V

I

L in e ar L o a d

V

th

Z th Z l

V l

EE 348 – Spring 2001

J. Choma,

Jr.Slide 5

Thévenin Model ParametersThévenin Model ParametersThévenin Model ParametersThévenin Model Parameters

• Thévenin Voltage Zero Load Current Voc Vth

• Thévenin Impedance “Ohmmeter” Calculation

Thévenin Voltage Is Set ToZero By Nulling All IndependentSources In Linear Network

• Superposition

V o c

I o c

T h éven in M o d e l

V

th

Z th

th

xth

x V 0

VZ

I

V x I x

Im p ed a n c e C a lcu la tio n

0

Z th

I x

n mth i si fi si

i 1 i 1V AV Z I

EE 348 – Spring 2001

J. Choma,

Jr.Slide 6

Thévenin ExampleThévenin ExampleThévenin ExampleThévenin Example

• Bipolar Emitter Follower Equivalent Circuit• Load Is The Capacitor, Cl

• Calculate: Thévenin Voltage Seen By Load Thévenin Impedance Seen By Load Transfer Function, Vo(s)/Vs(s) 3–dB Bandwidth

R s

r b

r I r o

R l C l

V oV s

I

EE 348 – Spring 2001

J. Choma,

Jr.Slide 7

Thévenin Voltage And ImpedanceThévenin Voltage And ImpedanceThévenin Voltage And ImpedanceThévenin Voltage And Impedance

• ThéveninVoltage Gain

• ThéveninImpedance

R s

r b

r I r o

R l

V thV s

I

V Rth l

V R Ith l

T h éve n in Vo lta g e C a lcu la tio n

R s

r b

r I r o

R l

V x

V= 0

sI I x x

I + I x x

T h éve n in Im p ed a n ce C a lcu la tion

I x

o lthth

s s b o l

1 r RVA 1

V R r r 1 r R

x x b sth l l o

x xx

b sth

V V r r RR R R r

I I 1

r r RR

1

EE 348 – Spring 2001

J. Choma,

Jr.Slide 8

Thévenin Output ModelThévenin Output ModelThévenin Output ModelThévenin Output Model

• Gain

• Resistance

o l o lthth

s bs s b o l o l

1 r R r RVA

R r rV R r r 1 r R r R1

b sth l o

r r RR R r

1

R th

A Vth s

C l

V o

(R + r + r ) ( + 1 )s b

V s

C l

V o

r o R l

R th

EE 348 – Spring 2001

J. Choma,

Jr.Slide 9

Transfer Function (Gain)Transfer Function (Gain)Transfer Function (Gain)Transfer Function (Gain)

• Gain At Zero Frequency Is Ath

• Bandwidth Definition

• 3–dB Bandwidth (Radians/Sec)

R th

A Vth s

C l

V o

th th

b2b th l b th l

A j0 A AA j

2 1 j R C 1 R C

th lo th

s l th th l

o th

s th l1

th l

A 1 sCV s AA s

V s 1 sC R 1 sR C

V j AA j

V j 1 j R C

A j tan R C

b bth l

1; radians 454R C

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 10

Frequency and Phase ResponsesFrequency and Phase ResponsesFrequency and Phase ResponsesFrequency and Phase Responses

-24

-18

-12

-6

0

0.01 0.03 0.10 0.32 1.00 3.16 10.00

Frequency (GHz)

Ga

in (

dB

)

-96

-84

-72

-60

-48

-36

-24

-12

0

Ph

as

e A

ng

le (

De

gre

es

)

Gain

Phase

-3 dB Down

-24

-18

-12

-6

0

0.01 0.03 0.10 0.32 1.00 3.16 10.00

Frequency (GHz)

Ga

in (

dB

)

-96

-84

-72

-60

-48

-36

-24

-12

0

Ph

as

e A

ng

le (

De

gre

es

)

Gain

Phase

-3 dB Down

0.776

–45°

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 11

Input ImpedanceInput ImpedanceInput ImpedanceInput Impedance

• Very Large Zero Frequency Input Impedance

• Other Characteristics Left Half Plane Pole And Left Half Plane Zero Non-Zero High Frequency Impedance

r b

r I r o

R l C l

I

V x

I x Z (j )in

in b o lZ j0 r r 1 r R

piin in b

ziZ j Z j0 r r

:

o lxin b

x o l l

ziin in

pi

pi zio l l b

o l l

1 r RVZ j r r

I 1 j r R C

1 jZ j Z j0

1 j

1 1;

r R C r rr R C

1

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 12

Voltage Delivery To LoadVoltage Delivery To LoadVoltage Delivery To LoadVoltage Delivery To Load

• System Problem Voltage Generated By Some Linear Network Is To Be

Supplied To A Fixed Load Impedance, Zl

Because The Source Network Is Linear, Its Output Can Be Represented By A Thévenin Circuit (Vs — Zs)

Assume Thévenin Source and Load Impedances are Fixed

ls

l s

ZV V

Z Z

• Load Voltage If |Zl| << |Zs|, Much Of The Source Voltage

Is “Lost” In The Source Impedance

If |Zl| = |Zs|, 50% Of The Source Voltage Is Lost, Resulting In A factor Of Two Attenuation Or 6 dB Gain Loss.

Many Systems Are Intolerant Of Such A Loss

V

I

Z l

V s

Z s

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 13

Insertion Of Voltage BufferInsertion Of Voltage BufferInsertion Of Voltage BufferInsertion Of Voltage Buffer

V

I

Z l

V s

Z s

Vo lta g eB u ffe r

Z in

Z o u t

V i

A Vb u f i

Z o u t

V

I

Z l

V s

Z s

V i

Zin

sl

l

bufZ 0s i ZZ

V VA

V V

::

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 14

Impact Of Voltage BufferImpact Of Voltage BufferImpact Of Voltage BufferImpact Of Voltage Buffer

• Practical Buffer Zout Very Small Zin Very Large Abuf Near Unity

• Effect Of Ideal Buffer

A Vb u f i

Z o u t

V

I

Z l

V s

Z s

V i

Zin

i l inbuf

s i s l out in s

V V V Z ZA

V V V Z Z Z Z

bufs

VA 1

V

VZ l

V s

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 15

Norton’s TheoremNorton’s TheoremNorton’s TheoremNorton’s Theorem

• Concept Two Terminals Of Any Linear Network Can Be Replaced By A

Current Source In Shunt With An Impedance Norton Current Is “Short Circuit” Current At Terminals Of Interest Norton Impedance Is Output Impedance At Terminals Of Interest And

Is Identical To Thévenin Output Impedance

• Linear Load Norton Concept Applies To Linear Or Nonlinear Load Voltage VL Is Zero If No Independent Sources Are Embedded In The

Load

V

I

Lin

ear

Net

wor

k Load

G en e ra l S ystem

V

I

Load

N o rto n M o d e l

I n o

V

I

L in e a r L o a d

Z l

V l

LoadZ th I n o

Z th

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 16

Norton Model ParametersNorton Model ParametersNorton Model ParametersNorton Model Parameters• Norton Current Zero Load Voltage Isc Ino

• Norton Impedance “Ohmmeter” Calculation

Norton Current Is Set ToZero By Nulling AllIndependent Sources InLinear Network

• Superposition

no

xth

x I 0

VZ

I

n mno k sk fk sk

k 1 k 1I A I Y V

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 17

Thévenin–Norton RelationshipThévenin–Norton RelationshipThévenin–Norton RelationshipThévenin–Norton Relationship

• From Thévenin Model:

• From Norton Model:

• Thévenin–Norton Equivalence:

V

IL

inea

rN

etw

ork

Z l

G en e ra l S ystem

V

I

N o rto n M o d e l

I n o

Z th

V

I

T h éven in M o d e l

V

th

Z th

Z l Z l

lth th

sc Z 0th l th

V VI ; I I

Z Z Z

lth no

sc no Z 0th l

Z II ; I I I

Z Z

thno

th

VI

Z

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 18

Current and Voltage SourcesCurrent and Voltage SourcesCurrent and Voltage SourcesCurrent and Voltage Sources

• Ideal VoltageSource

• Ideal CurrentSource

V

I

N o rto n M o d e l

I n o Z=

th

Z l

V

I

Lin

ear

Net

wor

k

Z l

Vo lta g e S o u rc e

V

I

T h éve n in M o d e l

V

th

Z = 0th

Z l

Z = 0o u t

V

I

Lin

ear

Net

wor

k

Z l

C u rre n t S o u rce

Z = o u t

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 19

Voltage AmplifierVoltage AmplifierVoltage AmplifierVoltage Amplifier

• Ideal Properties Infinitely Large Input Impedance, Zin

Zero Output Impedance, Zout

Sufficiently Large Voltage Gain, Av, Independent Of Input Voltage, VI and Output Voltage Vo

• Circuit SchematicSymbol

V o

Volta

geA

mpl

ifie

r

Z l

V o

A Vv i

Z o u t

Z l

V

s

Z s

V i

V

s

Z s

V i

Z in

V i

V = A Vo v iA v

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 20

TransconductorTransconductorTransconductorTransconductor

• Ideal Properties Infinitely Large Input Impedance, Zin

Infinitely Large Output Impedance, Zout

Sufficiently Large Transconductance, Gm, Independent Of Input Voltage, VI and Output Voltage Vo

• Circuit SchematicSymbol

V o

Tra

nsco

ndu

ctan

ceA

mpl

ifie

r

Z l

V oG Vm i

Z l

V

s

Z s

V i

V

s

Z s

V i

Z in

I o

Zou

t

I o

V i

G m

I = G Vo m i

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 21

Current AmplifierCurrent AmplifierCurrent AmplifierCurrent Amplifier

• Ideal Properties Zero Input Impedance, Zin

Infinitely Large Output Impedance, Zout

Sufficiently Large Current Gain, Ai, Independent Of Input Voltage, VI and Output Voltage Vo

• Circuit SchematicSymbol

V o

Cur

rent

Am

plif

ier

Z l

V oA Ii i

Z lI s

V i

V i

Z in

I o

Zou

t

Z s

I i

I sZ s

I i I o

A i

I = A Io i i

I i

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 22

Transresistance AmplifierTransresistance AmplifierTransresistance AmplifierTransresistance Amplifier

• Ideal Properties Zero Input Impedance, Zin

Zero Output Impedance, Zout

Sufficiently Large transresistance, Rm, Independent Of Input Voltage, VI and Output Voltage Vo

• Circuit SchematicSymbol

V o

Tra

nsr

esis

tan

ceA

mpl

ifie

r

Z lI s

V i

V i

Z in

I o

Z s

I i

I sZ s

I i

V o

R Im i

Z o u t

Z l

V = R Io m iR m

I i

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 23

Max Voltage & Current TransferMax Voltage & Current TransferMax Voltage & Current TransferMax Voltage & Current Transfer

• VoltageTransfer

• CurrentTransfer

lo th

l th

o th l th

ZV V

Z Z

V V , if Z Z

V o

I o

Tra

nsr

esis

tan

ceor

Vol

tage

Am

plif

ier

Z l

V o

I o

V

th

Z th

Z l

Maximum Voltage Transfer Requires Very Small Zth

Maximum Current Transfer Requires Very Large Zth

V o

IT

rans

con

duct

ance

orC

urr

ent A

mpl

ifie

r

Z l

V o

Z lI n oZ th

I o

tho no

l th

o no l th

ZI I

Z Z

I I , if Z Z

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 24

Power Dissipated In The LoadPower Dissipated In The LoadPower Dissipated In The LoadPower Dissipated In The Load

• Sinusoidal Steady State

• Load Power

v (t)o

i ( t)oL

inea

rN

etw

ork

Z l

v (t)th

Z th

Z l

v (t)o

i ( t)o

v v

i i

phasorj t jo p v p o p

phasorj t jo p i p o p

v ( t ) V Cos t V Re e V V e

i ( t ) I Cos t I Re e I I e

p po o o v i v i

Tp p

o o v i orms orms f0

V Ip ( t ) v ( t )i ( t ) Cos Cos 2 t

2

V I1P p (t )dt Cos V I P

T 2

porms

porms

f v i

VV

2

II

2

P Cos

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 25

Maximum Power TransferMaximum Power TransferMaximum Power TransferMaximum Power Transfer

• Condition:

• Max Power:

v (t)th

jX th

jXl

v (t)o

i ( t)oR th

R l

Z thZ l

R e(Z )l

Im (Z )l

R l

X l

||

Z l

v

i

22 2lp l v i p lp p thp

o v i 2 2l th l th

V RI Z Cos I RV IP Cos

2 2 2 2 R R X X

th thp thv ( t ) V Cos t

l th *l th

l th

X XZ Z

R R

2 2thp thrms

omaxth th

V VP

8R 4R

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 26

Example–50 Example–50 Transmission Line Transmission LineExample–50 Example–50 Transmission Line Transmission Line

• Parameters Antenna RMS Voltage Signal Is

10 V Transmission Line Coupling To

RF Stage Behaves Electrically As A 50 Ohm Resistance

RF

(F

ron

t En

d)A

mpl

ifie

r

V i

50 W

A n ten n a

5 0 O h mTra n sm issio n L in e

• Power To RF Input Port Maximized When RF Input Impedance Is 50 Ohms

• dBm Value:

2imax

300 VP 450 pW

4(50 )

imaximax 10 3

PP ( in dBm) 10 log 63.5 dBm

1 10

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 27

Second Order Lowpass FilterSecond Order Lowpass FilterSecond Order Lowpass FilterSecond Order Lowpass Filter

• Lowpass Filter Unity Gain Structure (Gain At Zero Frequency Is One) Ideal Transconductors

• KVL(Solve For Vo/Vs)

m1 m2x o s o x o

1 2

m2 m1o o s o

2 1

g gV V V ; V V V

sC sC

g gV V V V

sC sC

g m 1g m 2

g (V V )m 1 o s

g (V V )m 1 o s

g (V V )m 2 x o

C 2C 1

g (V V )m 2 x o

g (V V )m 2 x o

V x

V o

V s

R s

V o

00

0

0

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 28

Filter Transfer FunctionFilter Transfer FunctionFilter Transfer FunctionFilter Transfer Function

• Generalization:• Parameters DC Gain = H(0) = 1

Undamped Resonant Frequency = o = (gm1gm2/C1C2)1/2

Damping Factor = = (gm2C1 / 4gm1C2)1/2

g m 1g m 2

g (V V )m 1 o s

g (V V )m 1 o s

g (V V )m 2 x o

C 2C 1

g (V V )m 2 x o

g (V V )m 2 x o

V x

V o

V s

R s

V o

00

0

0

o2

s 1 1 2

m1 m1 m2

V 1H(s )

V sC s C C1

g g g

2

2o o

H(0 )H(s )

2 s s1

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 29

Lowpass 2Lowpass 2ndnd Order Function Order FunctionLowpass 2Lowpass 2ndnd Order Function Order Function

• Poles At s = –p1 & s = –p2

• Undamped Frequency:

• Damping Factor:

P1 & P2 Real Results In >1 (Overdamping) Or = 1 (Critical Damping)

P1 & P2 Complex Requires P1 & P2 Conjugate Pairs, Whence < 1 (Underdamping)

Y (s)L in e a rS eco n d O rd er

L o w p a ss C ircu it

X (s) 1 2

2 2

1 2 1 2 o o

Y(s ) H(0 )H(s )

X(s ) s s1 1

p p

H(0 ) H(0 )H(s )

1 1 s 2 s s1 s 1p p p p

o 1 2p p

2 1

1 2

1 p p

2 p p

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 30

Lowpass – Critical DampingLowpass – Critical DampingLowpass – Critical DampingLowpass – Critical Damping

• Critical Damping = 1 p1 = p2

• Frequency Response Bandwidth Constraint

Bandwidth

2

1 2 o o

Y(s ) H(0 ) H(0 )H(s )

X(s ) s s 2 s s1 1 1p p

2 2 2

o o o o

H(0 ) H(0 ) H(0 )H(s ) H( j )

2s s s j1 1 1

|H(0)|

|H(j)| in dB

-3 dB

B

Slope =–40 db/dec

2o

H(0 ) H(0 )H( jB )

21 jB

1 / 2oB 2 1

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 31

Lowpass – OverdampingLowpass – OverdampingLowpass – OverdampingLowpass – Overdamping

• Overdamping > 1 p1 < p2

Poles Are Real Numbers Dominant Pole System Implies p1 << p2

• Dominant Pole Bandwidth Transfer Function Approximation

Bandwidth Approximation Gain-Bandwidth Product

2

1 2 o o

Y(s ) H(0 ) H(0 )H(s )

X(s ) s s 2 s s1 1 1p p

2

11 2 1 2 1 2

Y(s ) H(0 ) H(0 ) H(0 )H(s )

sX(s ) s s 1 1 s 11 1 1 s pp p p p p p

1 21

1 2

1 2

1 p pB p

1 1 p pp p

1GBP H(0 ) B H(0 ) p

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 32

Lowpass Frequency ResponseLowpass Frequency ResponseLowpass Frequency ResponseLowpass Frequency Response

-45

-30

-15

0

0.1 0.3 1.0 3.2 10.0

Normalized Frequency ( /p 1 )

No

rma

lize

d G

ain

(d

B)

p 2 /p 1 = 5

3

1.5

1

-45

-30

-15

0

0.1 0.3 1.0 3.2 10.0

Normalized Frequency ( /p 1 )

No

rma

lize

d G

ain

(d

B)

p 2 /p 1 = 5

3

1.5

1

3-dB Down

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 33

Lowpass Phase ResponseLowpass Phase ResponseLowpass Phase ResponseLowpass Phase Response

-180

-135

-90

-45

0

0.1 0.3 1.0 3.2 10.0

Normalized Frequency ( /p 1 )

Ph

as

e A

ng

le (

de

g) p 2 /p 1 = 5

3

1.5

1

-180

-135

-90

-45

0

0.1 0.3 1.0 3.2 10.0

Normalized Frequency ( /p 1 )

Ph

as

e A

ng

le (

de

g) p 2 /p 1 = 5

3

1.5

1

1 1

1 2

d ( )( ) tan tan ; DELAY

p p d

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 34

Lowpass Step ResponseLowpass Step ResponseLowpass Step ResponseLowpass Step Response

• Input Is Unit Step [X(s) = 1/s]

• Overdamped ( > 1)

• Critical Damping ( = 1 o = p1 = p2)

2

1 2 o o

H(0 )X(s ) H(0 )Y(s )

s s 2 s s1 1 s 1p p

1 2

2 1 2 1 2 1

1 2

p t p t2 1

1 2 2 1

p p p p p p1Y(s ) H(0 )

s s p s p

p py(t ) H(0 ) 1 e e , t 0

p p p p

1p t1

1211

1 p 1Y(s ) H(0 ) ; y( t ) H(0 ) 1 1 p t e , t 0

s s ps p

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 35

Real Pole Step Response PlotsReal Pole Step Response PlotsReal Pole Step Response PlotsReal Pole Step Response Plots

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

0 1 2 3 4 5 6

Normalized Time (p 1 t)

No

rmal

ized

Res

po

nse

p 2 /p 1 = 5

3

1.5

1

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

0 1 2 3 4 5 6

Normalized Time (p 1 t)

No

rmal

ized

Res

po

nse

p 2 /p 1 = 5

3

1.5

1

95% Line

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 36

Lowpass – UnderdampingLowpass – UnderdampingLowpass – UnderdampingLowpass – Underdamping

• Overdamping < 1 p1 = p2* = oe j

• Circuit Bandwidth Proportional To o Equal To o For = 0.707

• Frequency Response Peaking |H(j)| Not Monotone Decreasing Frequency Function If < 0.707 Non-Zero Frequency Associated With Maximal |H(j)|

2 2

o o o o

Y(s ) H(0 ) H(0 )H(s ) ; H( j )

X(s ) 2 s s 21 1 j

2p o

p p2

d H( j )0 @ 1 2

d1

H( j ) M2 1

0

0.2

0.4

0.6

0.8

0 1.25 2.5 3.75 5 6.25 7.5 8.75 10

Excess Peaking (dB)

Da

mp

ing

Fa

cto

r

0

0.2

0.4

0.6

0.8

0 1.25 2.5 3.75 5 6.25 7.5 8.75 10

Excess Peaking (dB)

Da

mp

ing

Fa

cto

r

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 37

Underdamped Frequency ResponseUnderdamped Frequency ResponseUnderdamped Frequency ResponseUnderdamped Frequency Response

-42

-36

-30

-24

-18

-12

-6

0

6

12

18

0.1 0.2 0.3 0.4 0.6 1.0 1.6 2.5 4.0 6.3 10.0

Normalized Frequency (f/f o )

No

rma

lize

d G

ain

(d

B)

= 0.10.3

0.707

1.0

-42

-36

-30

-24

-18

-12

-6

0

6

12

18

0.1 0.2 0.3 0.4 0.6 1.0 1.6 2.5 4.0 6.3 10.0

Normalized Frequency (f/f o )

No

rma

lize

d G

ain

(d

B)

= 0.10.3

0.707

1.0

3-dB Line

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 38

Underdamped Phase ResponseUnderdamped Phase ResponseUnderdamped Phase ResponseUnderdamped Phase Response

-180

-160

-140

-120

-100

-80

-60

-40

-20

0

0.1 0.3 1.0 3.2 10.0

Normalized Frequency (f/f o )

Ph

as

e A

ng

le (

de

g)

= 0.1

0.3

0.707

1.0

-180

-160

-140

-120

-100

-80

-60

-40

-20

0

0.1 0.3 1.0 3.2 10.0

Normalized Frequency (f/f o )

Ph

as

e A

ng

le (

de

g)

= 0.1

0.3

0.707

1.0

o12

o

2( ) tan

1

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 39

Delay ResponseDelay ResponseDelay ResponseDelay Response

• Steady State Sinusoidal Response

• If Phase Angle Is Linear With Frequency

Constant Time Shift, Independent Of Signal Frequency No Phase Angle Is Ever Perfectly Linear Over Entire Passband

• Envelope Delay

1 o

2 2o

o o

Y( j ) H(0 ) 2H( j ) ; ( ) tan

X( j ) 121 j

p p p px( t ) X Cos t; y( t ) Y Cos t ( ) ; Y H( j ) X

d p d( ) T y( t ) Y Cos t T

2o

d 2 2 4o o o

1d ( ) 2T ( )

d 1 2 2 1

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 40

Underdamped Delay ResponseUnderdamped Delay ResponseUnderdamped Delay ResponseUnderdamped Delay Response

0

1

2

3

4

5

6

7

8

9

10

0.1 0.2 0.3 0.4 0.6 1.0 1.6 2.5 4.0 6.3 10.0

Normalized Frequency (f/f o )

No

rma

lize

d D

ela

y (

oT

d)

= 0.1

0.3

0.7

1.0

0

1

2

3

4

5

6

7

8

9

10

0.1 0.2 0.3 0.4 0.6 1.0 1.6 2.5 4.0 6.3 10.0

Normalized Frequency (f/f o )

No

rma

lize

d D

ela

y (

oT

d)

= 0.1

0.3

0.7

1.0

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 41

Underdamped Step AnalysisUnderdamped Step AnalysisUnderdamped Step AnalysisUnderdamped Step Analysis

• Input Is Unit Step [X(s) = 1/s]

• Underdamped ( < 1)

• Characteristics Damped Oscillations Oscillation For Zero Damping ( = 0) Undamped Frequency Is Oscillatory Frequency For Zero

Damping

2 2

o o o o

H(0 )X(s ) H(0 )Y(s )

2 s s 2 s s1 s 1

ot 2 1o

2

H(0 )y( t ) H(0 ) e Sin 1 t Cos ; t 0

1

EE 348 – Spring 2001

J. Choma,

Jr.

Slide 42

Underdamped Step ResponseUnderdamped Step ResponseUnderdamped Step ResponseUnderdamped Step Response

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Normalized Time (o t)

No

rma

lize

d S

tep

Re

sp

on

se

= 0.1

0.3

0.707

1.0

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Normalized Time (o t)

No

rma

lize

d S

tep

Re

sp

on

se

= 0.1

0.3

0.707

1.0