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1
EKT 356
MICROWAVE COMMUNICATIONS
CHAPTER 6:
MICROWAVE AMPLIFIERS
2
INTRODUCTION
Most RF and microwave amplifiers today used transistor devices such as Si or SiGeBJTs, GaAs HBTs, GaAs or InP FETs, or GaAs HEMTs.
Microwave transistor amplifiers are rugged, low cost, reliable and can be easily integrated in both hybrid an monolithic integrated circuitry.
3
General Amplifier Block Diagram
( ) ( ) ( ) ( ) ...33
221 TOHtvatvatvatv iiio +++=
Input and output voltage relation of the amplifier
can be modeled simply as:
Vcc
PLPin
The active
component
vi(t)
vs(t)
vo(t)
DC supply
ZL
Vs
Zs AmplifierInput
Matching
Network
Output
Matching
Network
ii(t)
io(t)
4
Amplifier Classification
Amplifier can be categorized in 2 manners.
According to signal level:
Small-signal Amplifier.
Power/Large-signal Amplifier.
According to D.C. biasing scheme of the active component:
Class A.
Class B.
Class AB.
Class C.
There are also other classes, such as Class D (D stands for
digital), Class E and Class F. These all uses the transistor/FET as
a switch.
There are also other classes, such as Class D (D stands for
digital), Class E and Class F. These all uses the transistor/FET as
a switch.
Our approach in this chapter
5
Small-Signal Versus Large-Signal Operation
ZL
Vs
Zs
Sinusoidal waveform
Usually non-sinusoidal waveform
Large-signal: ( ) ( ) ( ) ( ) ...2
32
21 TOHtvatvatvatv iiio +++=
Nonlinear
Small-signal: ( ) ( )tvatv io 1≅Linear
vo(t)
vi(t)
6
Small-Signal Amplifier (SSA)
All amplifiers are inherently nonlinear.
However when the input signal is small, the input and output relationship of the amplifier is approximately linear.
This linear relationship applies also to current and power.
An amplifier that fulfills these conditions: (1) small-signal operation (2) linear, is called Small-Signal Amplifier (SSA). SSA will be our focus.
If a SSA amplifier contains BJT and FET, these components can bereplaced by their respective small-signal model, for instance the hybrid-Pi model for BJT.
( ) ( ) ( ) ( ) ( )tvaTOHtvatvatvatv iiiio 13
32
21 ... ≅+++=
When vi(t)→0 (< 2.6mV) ( ) ( )tvatv io 1≅ (1.1)
Linear relation
7
Example 1.1 - An RF Amplifier Schematic (1)
ZL
Vs
Zs AmplifierInput
Matching
Network
Output
Matching
Network
DC supply
L
L3
R=
L=100.0 nH
L
L2
R=
L=100.0 nH
R
RD1
R=100 Ohm
C
CD1
C=0.1 uF
C
CD2
C=100 pF
Port
VCC
Num=3
L
L4
R=
L=12.0 nH
C
C2
C=0.68 pF
C
Cc1
C=100.0 pF
R
RB2
R=1.5 kOhm
R
RB1
R=1 kOhm
L
LC
R=
L=100.0 nH
R
RC
R=470 Ohm
Port
Input
Num=1
Port
Output
Num=2L
L1
R=
L=4.7 nH
C
C1
C=3.3 pF
C
Cc2
C=100.0 pF
pb_phl_BFR92A_19921214
Q1
RF power flow
8
Typical RF Amplifier Characteristics
To determine the performance of an amplifier, the following characteristics are typically observed.
1. Power Gain.
2. Bandwidth (operating frequency range).
3. Noise Figure.
4. Phase response.
5. Gain compression.
6. Dynamic range.
7. Harmonic distortion.
8. Intermodulation distortion.
9. Third order intercept point (TOI).
Important to small-signal
amplifier
Important parameters of
large-signal amplifier
(Related to Linearity)
9
Power Gain
For amplifiers functioning at RF and microwave frequencies, usually of interest is the input and output power relation.
The ratio of output power over input power is called the Power Gain (G), usually expressed in dB.
There are a number of definition for power gain as we will see shortly.
Furthermore G is a function of frequency and the input signal level.
dB log10PowerInput
PowerOutput 10
=GPower Gain (1.2)
10
Why Power Gain for RF and Microwave Circuits? (1)
Power gain is preferred for high frequency amplifiers as the impedance encountered is usually low (due to presence of parasitic capacitance).
For instance if the amplifier is required to drive 50Ω load the voltage across the load may be small, although the corresponding currentmay be large (there is current gain).
For amplifiers functioning at lower frequency (such as IF frequency), it is the voltage gain that is of interest, since impedance encountered is usually higher (less parasitic).
For instance if the output of IF amplifier drives the demodulator circuits, which are usually digital systems, the impedance looking into the digital system is high and large voltage can developed across it. Thus working with voltage gain is more convenient.
Power = Voltage x Current
11
Why Power Gain for RF and Microwave Circuits? (2)
Instead on focusing on voltage or current gain, RF engineers focus on power gain.
By working with power gain, the RF designer is free from the constraint of system impedance. For instance in the simple receiver block diagram below, each block contribute some power gain. A large voltage signal can be obtained from the output of the final block by attaching a high impedance load to it’s output.
LO
IF Amp.BPF
LNABPF
RF Portion
(900 MHz)
IF Portion
(45 MHz)
RF signal
power
1 µW
15 µW
IF signalpower
75 µW
7.5 mW
400Ω
t
v(t) 4.90 V
R
VaverageP
2
2
=
12
Harmonic Distortion (1)
ZL
Vs
Zs
When the input driving signal issmall, the amplifier is linear. Harmonic components are almost non-existent.
Small-signal
operation
region
Pout
Pin
13
Harmonic Distortion (2)
ZL
Vs
Zs
When the input driving signal istoo large, the amplifier becomesnonlinear. Harmonics areintroduced at the output.
Harmonics generation reduces the gain
of the amplifier, as some of the output
power at the fundamental frequency is
shifted to higher harmonics. This result in
gain compression seen earlier!
Harmonics generation reduces the gain
of the amplifier, as some of the output
power at the fundamental frequency is
shifted to higher harmonics. This result in
gain compression seen earlier!
ff1
f
harmonics
f1 2f1 3f1 4f10
Pout
Pin
14
Power Gain, Dynamic Range and Gain Compression
Dynamic range (DR)
1dB compression
Point (Pin_1dB)
Saturation
Device
Burn
out
Ideal amplifier
1dBGain compression
occurs here
Noise Floor
-70 -60 -50 -40 -30 -20 -10 0 10
Pin
(dBm)20
Pout
(dBm)
-20
-10
0
10
20
30
-30
-40
-50
-60
Power gain Gp =
Pout(dBm) - Pin(dBm)
= -30-(-43) = 13dB
Linear RegionLinear Region
Nonlinear Region
Nonlinear Region
Pin Pout
Input and output at same frequency
15
Bandwidth
Power gain G versus frequency for small-signal amplifier.
f / Hz0
G/dB
3 dB
Bandwidth
Po dBm
Pi dBmPo dBm
Pi dBm
16
Noise Figure (F)
Vs
• The amplifier also introduces noise into the output inaddition to the noise from the environment.
• Assuming small-signal operation.
Noise Figure (F)= SNRin/SNRout
• Since SNRin is always larger
than SNRout, F > 1 for an
amplifier which contribute noise.
SNR:
Signal to Noise
Ratio
SNR:
Signal to Noise
Ratio
Smaller SNRin
Larger SNRout
Zs
ZL
17
Power Gain Definition
From the power components, 3 types of power gain can be defined.
GP, GA and GT can be expressed as the S-parameters of the amplifier and the reflection coefficients of the source and load networks. Refer to Appendix 1 for the derivation.
As
LT
As
AoA
in
Lp
P
PG
P
PG
P
PG
==
==
==
powerInput Available
load todeliveredPower Gain Transducer
powerInput Available
Power load AvailableGain Power Available
Amp. power toInput
load todeliveredPower Gain Power
The effective power gain
(2.1a)
(2.1b)
(2.1c)
18
Naming Convention
ZLVs
Zs Amplifier
2 - port Network
Γin Γout
Source
NetworkLoad
Network
ΓsΓL
2221
1211
ss
ss
In the spirit of high-
frequency circuit design,
where frequency response
of amplifier is characterized
by S-parameters and
reflection coefficient is
used extensively
instead of impedance,
power gain can be expressed
in terms of these parameters.
In the spirit of high-
frequency circuit design,
where frequency response
of amplifier is characterized
by S-parameters and
reflection coefficient is
used extensively
instead of impedance,
power gain can be expressed
in terms of these parameters.
19
TWO-PORT POWER GAIN
Figure 6.1: A two port network with general source and load impedance.
20
TWO-PORT POWER GAINPower Gain = G = PL / Pin is the ratio of power dissipated in the load ZL to
the power delivered to the input of the two-port network. This gain is
independent of Zs although some active circuits are strongly dependent on
ZS.
Available Gain = GA = Pavn / Pavs is the ratio of the power available from
the two-port network to the power available from the source. This assumes
conjugate matching in both the source and the load, and depends on ZS but
not ZL.
Transducer Power Gain = GT = PL / Pavs is the ratio of the power delivered
to the load to the power available from the source. This depends on both ZS
and ZL.
If the input and output are both conjugately matched to the two-port, then
the gain is maximized and G = GA = GT
21
TWO-PORT POWER GAIN
−+++−
−+++−
Γ+=+=
Γ+=+=
2221212221212
2121112121111
VSVSVSVSV
VSVSVSVSV
L
L
0
0
22
211211
1
1
1 ZZ
ZZ
S
SSS
V
V
in
in
L
Lin
+
−=
Γ−
Γ+==Γ
+
−
From the definition of S parameters:
[6.1a]
[6.1b]
Eliminating V2- from [6.1a]:
[6.2]
0
0
11
211222
2
2
1 ZZ
ZZ
S
SSS
V
V
out
out
S
Sout
+
−=
Γ−
Γ+==Γ
+
−
[6.3]
22
TWO-PORT POWER GAIN
in
inin ZZ
Γ−
Γ+=
1
10
( )( )inS
SSVV
ΓΓ−
Γ−=+
1
1
21
By voltage division:
( )in
inS
inS VVV
ZZ
ZVV Γ+=+=
+= +−+ 11111
Using:
Solving for V1+:
[6.4]
[6.5]
[6.6]
23
TWO-PORT POWER GAIN
( ) ( )2
2
2
0
2
22
1
0
11
1
81
2
1in
inS
SS
ininZ
VV
ZP Γ−
ΓΓ−
Γ−=Γ−= +
( )
( )22
22
222
21
0
2
2
22
22
21
0
2
1
11
11
8
1
1
2
inSL
SLS
L
L
L
S
S
Z
V
S
S
Z
VP
ΓΓ−Γ−
Γ−Γ−=
Γ−
Γ−=
+
( )2
0
2
21
2LL
Z
VP Γ−=
−
The average power delivered to the network:
The power delivered to the load is:
[6.7]
[6.8]
[6.9]
24
TWO-PORT POWER GAIN
( )( ) 2
22
2
22
21
11
1
Lin
L
in
LP
S
S
P
PGG
Γ−Γ−
Γ−===
( )2
2
0
2
1
1
8S
Ss
inavsZ
VPP
Sin Γ−
Γ−== ∗Γ=Γ
( )∗
∗
Γ=Γ
∗Γ=ΓΓΓ−Γ−
Γ−Γ−==
outL
outL
inSout
Souts
Lavn
S
S
Z
VPP
22
22
222
21
0
2
11
11
8
The power gain can be expressed as:
The available power from the source:
The available power from the network:
[6.10]
[6.11]
[6.12]
25
TWO-PORT POWER GAIN
( )22
11
22
21
0
2
11
1
8outS
Ss
avn
S
S
Z
VP
Γ−Γ−
Γ−=
( )( ) 2
11
2
22
21
11
1
Sout
S
avs
avnA
S
S
P
PG
Γ−Γ−
Γ−==
( )( )22
22
222
21
11
11
inSL
LS
avs
LT
S
S
P
PG
ΓΓ−Γ−
Γ−Γ−==
The power available from the network:
The available power gain:
The transducer power gain:
[6.13]
[6.14]
[6.15]
26
Summary of Important Power Gain Expressions
and the Gain Dependency Diagram
( )( )22
22
22
21
11
1
inL
L
P
s
sG
Γ−Γ−
Γ−=
( )( )22
11
2
21
2
11
1
outs
s
A
s
sG
Γ−Γ−
Γ−=
( ) ( )22
22
22
21
2
11
11
sinL
sL
T
s
sG
ΓΓ−Γ−
Γ−Γ−=
Note:
All GT, GP, GA, Γ1 and Γ2
depends on the S-
parameters.
(2.2a)
(2.2c)
(2.2d)
(2.2e)
Γs ΓL
Γin Γout
GA GP
GT
2221
1211
ss
ss
The Gain Dependency Diagram
0
0
22
211211
1
1
1 ZZ
ZZ
S
SSS
V
V
in
in
L
Lin
+
−=
Γ−
Γ+==Γ
+
−
0
0
11
211222
2
2
1 ZZ
ZZ
S
SSS
V
V
out
out
S
Sout
+
−=
Γ−
Γ+==Γ
+
−
(2.2b)
27
TWO-PORT POWER GAIN
2
21SGT =
A special case of the transducer power gain occurs when both input and
output are matched for zero reflection (in contrast to conjugate
matching).
Another special case is the unilateral transducer power gain, GTU where
S12=0 (or is negligibly small). This nonreciprocal characteristic is
common to many practical amplifier circuits. Γin = S11 when S12 = 0, so
the unilateral transducer gain is:
( )( )2
22
2
11
222
21
11
11
LS
LS
TU
SS
SG
Γ−Γ−
Γ−Γ−=
[6.16]
[6.17]
28
TWO-PORT POWER GAIN
Figure 6.2: The general transistor amplifier circuit.
29
TWO-PORT POWER GAIN
2
22
2
2
210
2
2
1
1
1
1
L
L
L
Sin
S
S
SG
SG
G
Γ−
Γ−=
=
ΓΓ−
Γ−=
The separate effective gain factors:
[6.18a]
[6.18b]
[6.18c]
30
TWO-PORT POWER GAINIf the transistor is unilateral, the unilateral transducer gain reduces
to GTU = GSG0GL , where:
2
22
2
2
210
2
11
2
1
1
1
1
L
L
L
S
S
S
SG
SG
SG
Γ−
Γ−=
=
Γ−
Γ−=
[6.19c]
[6.19b]
[6.19a]
31
Example 1 – Familiarization with the Gain Expressions
An RF amplifier has the following S-parameters at fo: s11=0.3<-70o, s21=3.5<85o, s12=0.2<-10o, s22=0.4<-45o. The system is shown below. Assuming reference impedance (used for measuring the S-
parameters) Zo=50Ω, find:
(a) GT, GA, GP.
(b) PL, PA, Pinc.
Amplifier
2221
1211
ss
ssZL=73Ω
40Ω
5<0o
32
STABILITY
In the circuit of Figure 6.2, oscillation is possible if either the input or
output port impedance has the negative real part; this would imply that
|Γin|>1 or |Γout|>1.
Γin and Γout depends on the source and load matching networks, the
stability of the amplifier depends on ΓS and ΓL as presented by matching
networks.
Unconditionally stable: The network is unconditionally stable if |Γin| < 1
and |Γout| < 1 for all passive source and load impedance (ex; |ΓS| < 1 and
|Γ| < 1).
Conditionally stable: The network is conditionally stable if |Γin| < 1 and
|Γout| < 1 only for a certain range of passive source and load impedance.
This case also referred as potentially unstable.
The stability condition of an amplifier circuit is usually frequency
dependent.
33
STABILITY CIRCLES
11 22
211211 <
Γ−
Γ+=Γ
L
Lin
S
SSS
11
11
2112
22<
Γ−
Γ+=Γ
S
S
out
S
SSS
The condition that must be satisfied by ΓS and ΓL if the amplifier
is to be unconditionally stable:
[6.20a]
[6.20b]
The determinant of the scattering matrix:
21122211 SSSS −=∆ [6.21]
34
STABILITY CIRCLES
( )
22
22
2112
22
22
1122
∆−=
∆−
∆−=
∗∗
S
SSR
S
SSC
L
L
( )
22
11
2112
22
11
2211
∆−=
∆−
∆−=
∗∗
S
SSR
S
SSC
S
S
The output stability circles:
The input stability circles:
[6.22a]
[6.22b]
[6.23a]
[6.23b]
35
STABILITY CIRCLES
Figure 6.3: Output stability circles for conditionally stable device.
(a) |S11| < 1 (b) |S11| > 1
36
STABILITY CIRCLESIf the device is unconditionally stable, the stability circles must be
completely outside (or totally enclose) the Smith chart.
11
11
22
11
<→→>−
<→→>−
SRC
SRC
SS
LL[6.24a]
[6.24b]
37
STABILITY TEST
12
1
2112
22
22
2
11>
∆+−−=
SS
SSK
121122211 <−=∆ SSSS
Rollet’s condition:
the auxiliary condition:
11
21121122
2
11>
+∆−
−=
∗SSSS
Sµ
the μ test:
[6.25]
[6.26]
[6.27]
38
Example 2
The S parameters for the HP HFET-102 GaAs FET at 2 GHz with a
bias voltage of Vgs = 0 are given as follow (Z0 = 50 Ohm):
S11 = 0.894 < -60.6
S21 = 3.122 < 123.6
S12 = 0.020 < 62.4
S22 = 0.781 < -27.6
Determine the stability of this transistor using the K-∆ test and the μ
test, and plot the stability circles on the Smith Chart
39
SINGLE STAGE TRANSISTOR AMPLIFIER
DESIGN
∗
∗
Γ=Γ
Γ=Γ
Lout
Sin
2
22
2
2
2121
1
1
1max
L
L
S
T
SSG
Γ−
Γ−
Γ−=
Maximum power transfer from the input matching network to the
transistor and the maximum power transfer from the transistor to the
output matching network will occur when:
Then, assuming lossless matching sections, these conditions will
maximize the overall transducer gain:
[6.28a]
[6.28b]
[6.29]
40
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
In the general case with a bilateral transistor, Γin is affected by
Γout, and vice versa, so that the input and output sections must be
matched simultaneously.
S
SL
L
LS
S
SSS
S
SSS
Γ−
Γ+=Γ
Γ−
Γ+=Γ
∗
∗
11
211222
22
211211
1
1
[6.30a]
[6.30b]
41
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
2
2
2
2
22
1
2
1
2
11
2
4
2
4
C
CBB
C
CBB
L
S
−±=Γ
−±=Γ
The solution is:
[6.31a]
[6.31b]
42
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
∗
∗
∆−=
∆−=
∆−−+=
∆−−+=
11222
22111
22
11
2
222
22
22
2
111
1
1
SSC
SSC
SSB
SSB
The variables are defined as:
[6.32a]
[6.32b]
[6.32c]
[6.32d]
43
SINGLE STAGE TRANSISTOR
AMPLIFIER DESIGN
2
22
2
212
11 1
1
1
1max
SS
SGTU
−−=
( )12
12
21
max−−= KK
S
SGT
12
21
S
SGmsg =
When S12 = 0, it shows that ΓS = S11* and ΓL = S22*, and the maximum
transducer gain for unilateral case:
The maximum stable gain with K = 1:
[6.33]
[6.34]
[6.35]
When the transistor is unconditionally stable, K > 1, and the max
transducer power gain can be simply re-written as:
44
Example 3
Design an amplifier for a maximum gain at 4.0 GHz. Calculate the
overall transducer gain, GT, and the maximum overall transducer gain
GTmax. The S parameters for the GaAs FET at 4 GHz given as follow
(Z0 = 50 Ohm):
S11 = 0.72 < -116o
S21 = 2.60 < 76o
S12 = 0.03 < 57o
S22 = 0.73 < -68o
45
UNILATERAL FORM
22 )1(
1
)1(
1
UG
G
UTU
T
−<<
+
• In many practical cases |S12| is small enough to be ignored, the device
then can be assumed to be unilateral, which greatly simplifies design
procedure
• Error in the transducer gain caused by approximating |S12| as zero is
given by the ratio GT/GTU, and be bounded by:
Where U is defined as the unilateral figure of merit
)1)(1(2
22
2
11
22112112
SS
SSSSU
−−=
46
Example 4
An FET is biased for minimum noise figure, and has the following S
parameters at 4 GHz:
S11 = 0.60 < -60o
S21 = 1.90 < 81o
S12 = 0.05 < 26o
S22 = 0.50 < -60o
For design purposes, assume the device is unilateral and calculate the
max error in GT resulting from this assumption.
47
CONSTANT GAIN CIRCLES
• In many cases it is desirable to design for less than the max obtainable gain, to improve bandwidth or to obtain a specific value for an amplifier gain.
• Mismatches are purposely introduced to reduce the overall gain• Procedure is facilitated by plotting constant gain circles on the Smith Chart
• Represents loci of ΓS and ΓL, that give fixed values of GS and GL.
• To simplify the discussion, we will only treat the case of a unilateral device
48
CONSTANT GAIN CIRCLES
2
11
2
1
1
S
S
S
SG
Γ−
Γ−=
2
22
2
1
1
L
L
L
SG
Γ−
Γ−=
2
111
1max
SG
S
−=
The expression for the GS and GL for the unilateral case is given by:
These gains are maximized when ΓS = S11* and ΓL = S22* :
2
221
1max
SG
L
−=
49
CONSTANT GAIN CIRCLES
)1(1
1 2
112
11
2
max
SSG
Gg
S
S
S
S
S−
Γ−
Γ−==
Now we define normalized gain factors gS and gL as;
Thus we have that: 0 ≤ gS ≤ 1, and 0 ≤ gL ≤ 1. A fixed value of gS and gL
represents circles in the ΓS and ΓL planes.
)1(1
1 2
222
22
2
max
SSG
Gg
L
L
L
L
L−
Γ−
Γ−==
50
CONSTANT GAIN CIRCLES
( )
( )( ) 2
11
2
11
2
11
11
11
11
11
Sg
SgR
Sg
SgC
S
S
S
S
SS
−−
−−=
−−=
∗
( )
( )( )
2
22
2
22
2
22
22
11
11
11
Sg
SgR
Sg
SgC
L
L
L
L
LL
−−
−−=
−−=
∗
Input constant gain circles:
Output constant gain circles:
[6.37a]
[6.37b]
[6.38a]
[6.38b]
51
Example 5Design an amplifier to have a gain of 11 dB at 4 GHz. Plot constant gain circles for GS = 2 dB and 3 dB; and GL = 0 dB and 1 dB. The FET has the following S parameters (Z0 = 50 Ω):
S11 = 0.75 < -120o
S21 = 2.50 < 80o
S12 = 0.00 < 0o
S22 = 0.60 < -85o
52
LOW NOISE AMPLIFIER DESIGNIn receiver applications especially, it is often required to have a preamplifier with as low a noise figure as possible since, the first stage of a receiver front end has the dominant effect on the noise performance of the overall system.
Generally it is not possible to obtain both minimum noise figure and maximum gain for an amplifier, so some sort of compromise must be made. This can be done by using constant gain circles and circles of constant noise figure to select a usable trade of between noise figure and gain.
2
min optS
S
N YYG
RFF −+= [6.39]
53
LOW NOISE AMPLIFIER DESIGN
2
0
min 14
opt
N ZR
FFN Γ−
−=
( )1
1
1
2
+
Γ−+=
+
Γ=
N
NNR
NC
opt
F
opt
F
For a fixed noise figure, F, the noise figure parameter, N, is given as:
The circles of constant noise figure:
[6.40]
[6.41a]
[6.41b]
54
Example 6An GaAs FET amplifier is biased for minimum noise figure and has
the following S-parameters (Z0 = 50 Ω):
S11 = 0.75 < -120
S21 = 2.50 < 80
S12 = 0.00 < 0
S22 = 0.60 < -85
Γopt = 0.62 < 100
Fmin = 1.6 dB
RN = 20 Ω
For design purposes, assume the unilateral. Then design an amplifier
having 2.0 dB noise figure with the max gain that is compatible with
this noise figure.