ee201l homework # 6 instructor: g. puvvada...3/21/06. 16. c copyright 2006 gandhi puvvada #1 #2

3/21/06 EE201L Homework #6 1 / 16 C Copyright 2006 Gandhi Puvvada

1. Refer to the design of the microprogrammed control unit for the change dispenser discussed in your class notes

Assume that the change to be dispensed is $0-87¢. For this value of change, find (and state) the sequence of control memory addresses generated to dispense the change. Start with the zero address.(Hint: Address sequence is same as the step sequence that can be obtained by processing the algorithm given in the control sequence with a starting value of X=87.)

_________________________________________________________________________

_________________________________________________________________________

_________________________________________________________________________

_________________________________________________________________________

_________________________________________________________________________

2. For simplicity, we ignored nickels in the change dispenser control unit. Now, we wish to take into consideration nickels also (along with quarters, dimes, and cents).

2.1 Find the size of the Control Memory ROM you require.

Size of Control Memory ROM:_______________________

Number of address lines going to this ROM:________________

Number of data lines coming out of this ROM:______________

2.2 Find the sizes of the following three fields.

Condition Select: _________________________________

Branch Address: _________________________________

Control Signals: _________________________________

EE201l Homework # 6 Instructor: G. Puvvada

Microprogrammed Control Unit Design


3. Design a two-bit up/down counter using the microprogrammed control unit method. Given a control input called UP/DOWN, you are required to produce the counter’s output in seven-segment code (SS code) suitable for your Digilab FPGA DIO1 board. Please refer to your lab manual and see the Flash animation at http://www-classes.usc.edu/engr/ee-s/201/seven_segment_display.swf

UP/DOWN = "1", Counter increments (goes up) with each clock pulse, for example{0, 1, 2, 3, 0, 1, 2, ....}; The SS code (abcdefg) output will be: {0000001, 1001111, 0010010, 0000110, 0000001, 1001111, 0010010, ......}

UP/DOWN = "0", Counter decrements (goes down) in this manner {0, 3, 2, 1, 0, 3, 2, ...}; The SS code (abcdefg) output will be: {0000001, 0000110, 0010010, 1001111, 0000001, 0000110, 0010010, ......}

Initially, the microprogram counter is reset to zero and the up-down counter output shall be 0000001 corresponding to zero display on the SS display.

The control sequence below is suggested. Some steps/details are missing. You must fill them up before proceeding further.

Step 0 Output Count 0 (0000001) If UP/DOWN = 0 --> Go to step 3Step 1 Output Count 1 (1001111) If UP/DOWN = 0 --> Go to step 0Step 2 Output Count 2 ( )- If _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _Step 3 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

Assume there exist only two situations, depending upon the single CONDITION SELECT Bit(in the condition select field of the micro-instruction):

CONDITION SELECT Bit = 0 -->No BranchCONDITION SELECT Bit = 1 -->Branch if UP/DOWN = 0

Complete the design below, by interconnecting the components and filling in the bits in the ROM.

ControlMemeory

I0

I1 s

Y

/RESETClk

LOAD /CLR

LOA

D

Vcc

UP

DOWNUP/DOWN

SS Code

Step 3Step 2Step 1Step 000 0 0 100

Output fieldBACS

a b c d e f g

a b c d e f gB1 B0CS0

b

a

c

d

e

f

g

Common anode7-seg. display


4. Microcoded control unit design:Consider the following state diagram with four states, STEP0, STEP1, STEP2, STEP3. Four output lights (one for each state) L0, L1, L2, L3 should be controlled such that L0 is ON (L0 = 1) when the machine is in STEP0 and so on.

Complete the following design of a microcoded control unit to serve the above requirements.

4.1 Find the depth of the control store:4.1.1Number of steps in the control sequence: ___________4.1.2Number of location in the control store ___________

(u_Program Memory)4.1.3Number of address bits required to address this memory: ______________

4.2 Find the width of the control store:4.2.1Control field size (number of bits): ____________4.2.2Branch address field size (number of bits): ____________4.2.3Condition select field size (number of bits): ____________

Conditions Condition select bitsNo Branch 00Branch if X = 1 01Branch if Y = 1 10Unconditional branch 11

4.3 Complete the schematic below and fill-in the control store with appropriate microcode. Fill-in "d" for don’t care.

S T E P0

L 0 = 1

S T E P1

L 1 = 1

S T E P2

L 2 = 1

S T E P3

L 3 = 1

X = 1

X = 1

X = 0 Y = 0

O n c e i t c o m e s t o s t e p 3 ,i t r e m a i n s t h e r e .

Y = 1

1

X = 0

I n c r e m e n tC l k

L O A D

/ R E S E T

u P C

?

A d d r e s s

0 0

0 1 1 0 1 1

{

S 1 S 0 A 1 A 0 L 0 L 1 L 2 L 3

C o n d i t i o nS e l e c t

B r a n c hA d d r e s s

O U T P U T S

C M

2

I 0

I 1

Y

I 2

I 3 S 1S 0


5. One-Hot method of designing the change dispenserLet us revisit the Change Dispensing Machine disussed in the class notes. One deviation from the class notes: here, we use three comparators ostensibly to speed up the dispensing process. The block diagram for the datapath unit (DPU) and the Control Unit (CU) are shown above, together with a State Diagram.

I1 I0x_mux_sel

Subtractor

x-mux

I0 I1 I2 S1

S0} Const.

Select

Comp Comp Comp

25 C 10 C 1 C

25 C 10 C 1 C

X >= 25 X >= 10 X >= 1

Clock /Reset GO

Control Unit

x_load

x_mux_sel}

x_m

inus

_con

st Const.

Rel_25c Rel_10c Rel_1c

Change

Const.Select

2

Y

Y

x_loadx-reg

S1 S0

S1S0


Suggested State Diagram

Write down the next state equations.

INITIAL State DIN = QIN* =

COMPARE State DC = QC* =

RELEASE_25 State D25 = Q25* =



DONE State DD = QD* =

Compare X with constantssimultaneously

Release QuarterX <= X - 25

Const. Sel = 00x_mux_sel = 1

x_load = 1

Release DimeX <= X - 10


x_load = 1

Release CentX <= X - 1


x_load = 1

DONE(Wait for GO)

InitializeX <= change

x_mux_sel = 0x_load = 1

INITIAL

COMPARE

RELEASE_25

RE

LE

ASE

_10

RE

LE

ASE

_1

DO

NE

(X >= 25)

(X>=25)(X

>=10)

unconditional

(X>=25)(X>=10)(X>=1)

~GO

GO

(X>=25)(X>=10)(X>=1)

~RESET


5.1 Mr. Bruin made an observation that the COMPARE state is reached unconditionally from all other states (INITIAL, RELEASE_25, RELEASE_10, RELEASE_1) except from the DONE state . So he simplified the next state logic as shown below. Miss Bruin corrected his design by replacing DD with QD. What do you say?

5.2 Note that the state flip_flop for QC in the above question is positive edge-triggered. So, we infer that the state machine changes state on the positive edge of the clock. So an output signal such as Rel_25 or x_load will go active from a positive edge of the clock to another positive edge of the clock.

COMPARE

Now consider the X register triggered by x_load control signal. It is a negative edge triggered register. Assume that the x_load signal is glitch free. Your choice is: Choice-A / Choice-B

Choice-A: We should either change the x-register to a positive edge triggered register to matchwith the positive edge triggered state machine or change the state memory flip-flops to negative edge triggered flip-flops to match with the X register.

Choice-B: We do not have to change anything. We need to load the X register with x_minus_constant at the end of the clock (state) as we need to allow time for the subtractor to producex_minus_constant. The x_load is a positive going pulse. It is high during the RELEASE_25state. It has a negative edge at the end of the pulse. So the negative edge of the x-loadtriggers the X register at the right time.

5.3 Complete the truth table for the OFL (output function logic) for generating outputs in different states. Please write a "1" or a "0" or a "d" ("d" for "don't care") in each of the squares below.

Symbolicname of the

state

CURRENT STATE COIN RELEASES X-MUXSEL

CONSTANT SELX-

LOAD DONEQIN QC Q25 Q10 Q1 QD Rel_25 Rel_10 Rel_1 S1 S0

INITIAL 1

COMPUTE

RELEASE_25

RELEASE_10

RELEASE_1

DONE

D QCLK

PRE

CLR

QCDC

/RESET

VCC

CLK

DD


5.4 For a particular amount of change dispensed using the above state machine designed by you, the waveforms are captured on a logic analyzer. The waveforms for the state flip-flops are recorded below completely. Other waveforms are drawn partly. It is difficult to draw the waveforms to show exact delays of the state flip-flops, the X register, and the constant comparator. Assume that the clock period is of 10 ns and the state flip-flop outputs change in 1ns after the positive edge of the clock. Also assume that the subtractor and the comparator take about 5ns. Also for the sake of drawing these waveforms, assume that the don’t cares (d’s) in the table in 5.3 above are all replaced with zeros (0’s). Complete all waveforms. Try to shows delays so as to indicate the cause and effect relation.

CLOCK

GO

Q10

QCOMPARE

Q25

Q1

QDONE

X >= 25

X >= 10

X >= 1

QIN

const_sel

x_mux_sel

x_load

00

x_minus_const

X

Gandhi

Also for the sake of drawing these waveforms, assume that the don’t cares (d’s) in the table in 5.3 above are all replaced with zeros (0’s).


6. Analyze the following predesigned microprogrammed control unit.

6.1 Complete the state diagram using the symbolic state names W, X, Y, and Z for the four micro-instructions in the microprogram memory. In each state, show the output as "LIGHT ON" or "LIGHT OFF" as appropriate.

6.2 For the above control unit, the following patters of RESET, a, b and c inputs are applied. Draw the waveforms of the address outputs A0(LSB), A1(MSB) of the uPC (microprogram counter) and the overall output L of the control unit.

ZLIGHT

YLIGHT

XLIGHT

WLIGHT

I0

I1

Y

I2

I3 S1

S0

Active HighSynchronous

LOAD

uPC

a

b

1

c

mux

B1 B0

Clock

MSB LSB

RESET

A1 A0

Two-bitaddress

CM

STATE WSTATE XSTATE YSTATE Z

VccL

WAVEFORM

WAVEFORM

330OHM

B1 B0

D DQ Q

ConditionSelect

BranchAddress

Output

0 0 0 0 01 1 1 1 11 0 0 0 00 1 0 1 1

Address

0 0

0 1 1 0 1 1

CLOCK

RESET

a

b

c

A0

(LSB)

A1

(MSB)

LH

L

H

L

H

L

Note: this is the signal L(not the actual light)


7. Microprogrammed Control Unit:Please refer to the "detour" sign controller you designed using one-hot-method in your lab. Redesign it using uPC method.

Complete the sequence of control steps below and complete the design. Note that "No BRANCH: can be replaced by an "UNCONDITIONAL BRANCH TO THE NEXT STEP".

Step 0 All lights off. If L/R is 1, go to step 4.Step 1 G1 lights on. go to step 2.Step 2Step 3Step 4 G2 lights on. Go to step 5.Step 5Step 6 G2, G1, GL lights on. Go to step 0.

Number of total steps: _______________Nearest power of 2 (which is equal or just greater than the number of steps): _______________Number of locations in the control memory:_______________Number of address bits:____________Number of outputs needed to control the four groups of lights: ______________ Branch address field width:_______________Number of conditions: ______________(count L/R = 1 as one condition and unconditional branch as another condition) Condition select field width:____________Total width of the microinstruction:__________Size of the control memory: _________________

I0

I1

Vcc

LEFT

RIGHT

CLOCKLOAD

/RESET

s

y

L/Rsignal

CONDITIONSELECT MUX.

uPC

Address0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1

Step0123456

CM

GL G1 G2 GR

{

?


8. State machine design:

You may have seen touch-sensitive table lamps in illumination supplies stores such as Lamps + Plus. These lamps usually have three states, OFF, DIM, and BRIGHT. They have two filaments in the lamp. Filament F1 only lights up in DIM mode. Both filaments, F1 and F2, light up in BRIGHT mode. The lamps go through the three states as per the state diagram #1 below. The input T stands for TOUCH sensor signal.

There are also another kind of lamps which are clap-sensitive. These require two consecutive claps (with about one second gap) to change brightness. A single clap (without the second clap) is considered as some spurious sound and should not cause the light to change its brightness. The state diagram #2 applies to such a design. The input C stands for clap sensor signal. Assume that the state machine is driven by a slow 1 cycle/sec clock. Complete the missing state transition conditions.

8.1 Design a state machine for the clap-sensitive lamp using one-hot method based on the state diagram #2. Produce two outputs called F1 and F2 to control the two filaments.

OFF DIM BRIGHTT T

T

T T T~Reset

#1

#2

OFF DIM BRIGHT

OFF-C DIM-C BRIGHT-CCC

C

C

C

CC

~Reset

Q

QSET

CLR

DQDIM_C

Sys_Clk

Q

QSET

CLR

DQDIM

Sys_ClkQ

QSET

CLR

DQOFF

Sys_Clk

Q

QSET

CLR

DQOFF_C

Sys_ClkQ

QSET

CLR

DQBRIGHT_C

Sys_Clk

Q

QSET

CLR

DQBRIGHT

Sys_Clk

F2

F1


8.2 Complete the state diagram below for a new touch-and-clap sensitive lamp. If a touch and a clap occur at the same time, then the lamp should take action based on touch (ignoring the clap) as touch is a more positive (confirming) action.

8.3 The previous state diagram #2 is redrawn below, with two additional dummy states D_OFF1 and D_OFF2 to facilitate implementation of a microprogrammed control unit. Note that, the state machine moves from D_OFF1 to D_OFF2 if there is no clap. Similarly it moves from D_OFF2 to OFF if there is no clap.

8.4 The number of locations in the micro-program memory =___________________

The number of address lines going into the memory = ______________________

The width of the branch address field = ________________bits

Two filaments F1 and F2 are to be controlled by the machine.

The width of the output control signal field = ______________bits.

The condition select mux has to select between conditions C and C as branch conditions.

OFF DIM BRIGHT

OFF-C DIM-CBRIGHT

-C

T

T.C

~ResetT + C

#3

OFF DIM BRIGHT

OFF-C DIM-C BRIGHT-CCC

C CC

C

C

CC

C C

C

~Reset

D_OFF1D_OFF2

CC

C

C

1

02

3

4

5

67

#4


The condition select mux is a ______________(2-to-1 / 3-to-1 / 4-to-1) mux and has _________(1

/ 2 / 3) select lines.

The width of the condition select filed is ________________(1 / 2 / 3) bit(s).

Total width of the microprogram memory is ________bits.

The size of the microprogram memory is _______________

8.5 Complete the design of the microprogram control unit below. Connect the missing lines and fill-up the bits (contents) of the microprogram memeory.

8.6 Show how you can replace the above conditionselect mux (reproduced on the side) by using an XOR or an XNOR gate (two or three input). Label the inputs of the gate.

9. In your previous homework, you have designed a state machine for a temperature control using one hot method. Now we will implement the design using micro-programmed control unit.

The heater consists of two heating coils HC1 and HC2. It has three temperature sensors (switches) which produce three digital outputs N, L, and VL.

I0

I1

CLOCK

LOAD /RESET

s

y

Condition selectmux

CM

C

C

D D D

Q Q QuPC

A0A1A2

B0B1B2

CS0 B2 B1 B0 F1 F2

COND.-SEL.

FIELD

Branch ADDR.FIELD

CONTROLFIELD

Address0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1

OFF

OFF_CDIMDIM_CBRIGHTBRIGHT_CD_OFF1D_OFF2

CS0 B2 B1 B0 F1 F2

I0

I1 s

y

Condition selectmux

C

C

CS0

LOAD LOAD


N = 1 ==> Temperature is NORMAL (or above normal)>750 FL = 1 ==> Temperature is LOW (below normal) <700 FVL = 1==> Temperature is VERY LOW <650 F

Obviously when VL is true (VL = 1), then L is also true (L = 1). Similarly when N is true (N = 1), both L and VL are false (L = VL = 0). It is possible that all three outputs read zero for example if the temperature is 720 F.

If the temperature falls below the LOW mark (L = 1), the heating coil-1 (HC1) is switched on (HC1 = 1). If heating coil # 1 could not hold or raise the temperature and the temperature further falls to VERY LOW mark (VL = 1), the heating coil2 (HC2) is also switched on (HC2 = 1).Once any heating coil is switched on, it is only shut off when the temperature builds up to the NORMAL level.

The state diagram is drawn below.

State I is the INITIAL state in which both coils are off (HC1, HC2 = 0, 0).State SH is the SINGLE-HEATER state in which only HC1 is on (HC1, HC2 = 1, 0).State TH is the TWO-HEATER state in which both heaters are on (HC1, HC2 = 1, 1).

9.1 To make it convenient to this implementation, an extra state or step called SH_TEMP (Single Heater Temp) is introduced as shown in the following incomplete state diagram. We come into SP_TEMP from SP and continue to run the single heater (HC1) while deciding whether we should be going to state I (Initial) or state TH (TWO HEATERS).

IHC1, HC2 = 0,0

THHC1, HC2 = 1,1

SHHC1, HC2= 1,0

N

L

N

VL

~Reset

N

N VL

L


Complete the state diagram by writing the missing state transitions for the four state transition arrows marked with the question mark (?).

9.2 Find the following data related to this design. Refer to the incomplete design on the next page.

Number of states (or steps) in the above state machine (or algorithm):_____________Number of locations in the microprogram ROM:______________________________Number of address input pins needed on the ROM to allow us to address

any location (execute any step) in the ROM:___________________________Size of the micro-program counter (uPC): _______________________bitsSize of the branch address: ____________________________ bits Hence branch address field is _________________bits wide.

Based on the number of control signals to be generated (HC1 and HC2), we need a control filed of __________bits wide.

Are there any unconditional branches in the above state diagrams?YES / NOSo do we need a logic-1 standing in front of the condition select mux

to effect any such unconditional branches?YES / NO

IHC1, HC2 = 0,0

THHC1, HC2 = 1,1

SHHC1, HC2= 1,0

L

N~Reset

SH_TEMPHC1, HC2= 1,0

VL N N

0

1

2

3?

?

?

?


Complete the following list of the conditional branches together with the associated conditions

Set of different conditions governing the above conditional branches:_________________Based on the above, what size condition-select mux do we need? _____________________How many condition select bits? _____________________________________________Size of condition-select field in the control word _________________________________

Width of the ROM = width of the condition-select field + width of the branch-address field + width of the control field = __________________________________

9.3 Complete the design. Fill-in the bits in the uPROG ROM.

Conditional branch Condition associated

(1) I --> I (Step 0 to Step 0) L

(2)

(3)

(4)

CLOCK

LOAD /RESET

Condition selectmux

CM

D D

Q Q

uPC

A0A1

CS1 CS0 B1 B0 HC1 HC2

Cond. -Sel.Field

BranchAddr. Field

ControlField

A1 A0

0 00 11 01 1

I

SHSH_TEMPTH

I0

I1

Y

I2

I3 S1

S0

mux

L

N

N VL

N


9.4 Complete the waveform below. Here we are asking you to draw(a) the waveforms for QI, QSH, QSH_TEMP, QTH, (four one-hot flip-flops for the four states)

if the state machine was implemented using one-hot state assignment method, (b) the symbolic state waveform for (state, uPC), if the state machine was implemented

using the microprogrammed control unit method (c) the waveforms for HC1 and HC2 heating coils operation.

9.4.1 The waveforms you drew above for the heating coils, HC1 and HC2, are good for

(a) one-hot implementation of the state machine only

(b) micro-programmed CU implementation of the state machine only

(c) both one-hot and micro-programmed CU implementations.

CLOCK

RESET

N

L

VL

State

QI

I

QSH

QSH_TEMP

QTH

HC1

HC2

State, uPC I, 00

ee201l homework # 6 instructor: g. puvvada...3/21/06. 16. c copyright 2006 gandhi puvvada #1 #2

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