e-docking schematics document -...
TRANSCRIPT
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Cover Sheet
1 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Cover Sheet
1 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Cover Sheet
1 29Friday, April 18, 2008
Compal Electronics, Inc.
E-Docking (For APR)
PCB P/N: TBD
BOM NO:
E-Docking Schematics Document
2008-04-18
COMPAL P/N :PCB NO :
COMPAL CONFIDENTIALMODEL NAME :
E-APR
LA-3954P
TBD
TBD
DELL CONFIDENTIAL/PROPRIETARY
REV : 0.4 (DELL: X03)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Part Number Description
DA40000930L PCB LA-3954P REV0.3 MB
MB PCBPart Number Description
DA40000930L PCB LA-3954P REV0.3 MB
MB PCB
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2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Block Diagram
2 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Block Diagram
2 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Block Diagram
2 29Friday, April 18, 2008
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Display Port #1
E Docking Connector
Display Port #2
Display Port w/buffer
DVI
Display Port w/buffer
DVI
VGA VGA
SMBUS#1
USB 2.0 HUB
USB 2.0 HUBUSB (2)
USB 2.0(6) User Ports
Monitor Standinterface
P -ESATASATA
SMBUS
LPC
Dock Audio Intf.
LOM
PS2 (x2)
Power
LPT/RS232
Display Port/DVI -VSw/ port sel
Display Port/DVI -VSw/ port sel
Dock AudioInterface
MIC In
Audio Conns
RJ45
PS2 (x2)
Power
LIOSMSC 47N237
Mic Detect
TI SN75DP122
SMSC USB2513
SMSC USB2513
TI SN75DP122
Page 7
Page 5
Page 6
Page 5
HCP Detect
Page 13
Page 13
Page 13
Page 14
Page 14
Page 14
Page 8
Page 8
Page 9,10,11
Page 10
Page 12
SMBUS#1
Page 15
Adapters
HDMI
Page 16
Page 16
Page 11
Page 9
Page TBD
SMBUS
Compal confidentialModel : E-Docking
Block Diagram
DELL CONFIDENTIAL/PROPRIETARY
PS8121E Repeater
PS8121E Repeater
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3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMBus Block Diagram
3 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMBus Block Diagram
3 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMBus Block Diagram
3 29Friday, April 18, 2008
Compal Electronics, Inc.
USB_HUB1_RST#
2N7002
2N7002
48 (0100 1000)
Port 1/2/3USB2513
2.2K
+3.3V_SUS
2.2K
Port 4/5/6
2N7002
2N7002
AudioSSM2603
USB2513
2.2K
+3.3V_SUS
2.2K
2.2K
+3.3V_RUN
2.2K
SMSC 47N237
DOCK_SMB_DATDOCK_SMB_CLK
DOCK_SMB_ALERT#
10K
+3.3V_ALW
34/35 (0011-010X)
58/59 (0101-100x)
58/59 (0101-100x)
10K
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
2N7002
2N7002
USB_HUB2_RST#
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5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power Rail Block Diagram
4 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power Rail Block Diagram
4 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power Rail Block Diagram
4 29Friday, April 18, 2008
Compal Electronics, Inc.
+3.3V_SUS
DK
_SU
SO
N
DockingADAPTER +PWR_SRC
MAX8778ETJ+3V_ALW2NB_DET#
+15V_ALW+5V_ALW
+PWR_SRC
NB
_DE
T#
+5V_ALW +3.3V_ALW
NB
_DE
T#
+5V_RUN +3.3V_RUN
DK
_RU
NO
N
DK
_RU
NO
N
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BREATH_PWR_MS_LED#
DOCKED_MS_LED#DOCKED_LED_1#
DOCK_AC_OFF
HOT_UNDOCK#
TRCT2_3_DOCKTRCT0_1_DOCK
HOT_UNDOCK#
MS_ENABLE#DOCK_PWR_BTN#
DOCK_DET_2
DOCK_PWR_BTN#
DOCKED_LED_1#
DOCK_PWR_BTN#
DOCK_DET_1
BREATH_PWR_LED#
DOCK_DET_1
HOT_UNDOCK#
MS_ENABLE#
MS_ENABLE#
BREATH_PWR_LED_1#
DOCKED_MS_LED#BREATH_PWR_MS_LED#
DOCKED_LED#
BREATH_PWR_LED# BREATH_PWR_LED_1#
NB_DET#DOCK_DET_2
+5V_ALW_MS
+DOCK_PWR_BAR
+5V_ALW
+DOCK_PWR_BAR
+DOCK_PWR_BAR
+5V_ALW
+DOCK_PWR_BAR
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+5V_ALW
HOT_UNDOCK#<6>DOCK_SMB_CLK<6,8,16>DOCK_SMB_DAT<6,8,16>
DAT_MSE<9>
DOCK_SMB_ALERT#<6>DOCK_PS_ID<18>
CLK_MSE<9>
DAI_BCLK<15>DAI_LRCK<15>
DAI_DI<15>DAI_DO<15>
DAI_12MHZ<15>
D_LAD1<6>D_LAD0<6>
D_LAD2<6>D_LAD3<6>
DP_A_CA_DET1<13>
D_LFRAME#<6>D_CLKRUN#<6>
D_SERIRQ<6>
CLK_PCI_DOCK<6>
DP_A_L1+<13>DP_A_L1-<13>
DP_A_L2+<13>DP_A_L2-<13>
DP_A_L3+<13>DP_A_L3-<13>
DP_A_AUX+<13>DP_A_AUX-<13>
DP_A_HP<13>
DP_A_L0+<13>DP_A_L0-<13>
DOCK_LOM_SPD10LED_GRN#<11>
VGA_HS<12>VGA_VS<12>
VGA_DDC_DAT <7,12>VGA_DDC_CLK <7,12>
VGA_B<12>
VGA_G<12>
VGA_R<12>
DOCK_AC_OFF <18>
USB_A_+ <8>
USB_B_+ <8>
DAT_KBD <9>CLK_KBD <9>
DOCK_LOM_TRD3- <11>DOCK_LOM_TRD3+ <11>
DOCK_LOM_TRD1- <11>DOCK_LOM_TRD1+ <11>
DP_B_L1+ <14>
DP_B_L2+ <14>
DP_B_L3+ <14>
DP_B_AUX+ <14>
DP_B_HP <14>
DP_B_L0+ <14>
DP_B_CA_DET1 <14>
DP_B_L1- <14>
DP_B_L2- <14>
DP_B_L3- <14>
DP_B_AUX- <14>
DP_B_L0- <14>
DOCK_LOM_SPD100LED_ORG# <11>
ACAV_DOCK_SRC# <18>
DOCK_LOM_TRD2- <11>DOCK_LOM_TRD2+ <11>
TRCT2_3_DOCK <11>TRCT0_1_DOCK <11>
DOCK_LOM_TRD0+ <11>DOCK_LOM_TRD0- <11>
USB_A_- <8>
USB_B_- <8>
DOCK_DCIN_IS+ <18>DOCK_DCIN_IS- <18>
DOCK_LOM_ACTLED_YEL# <11>
D_DLDRQ1#<6>
DOCK_PWR_BTN#
SATA_SBTX_DRX_P <10>SATA_SBTX_DRX_N <10>
SATA_SBRX_DTX_P <10>SATA_SBRX_DTX_N <10>
DOCK_PWR_BTN#
DOCKED_LED#<6>
+NBDOCK_DC_IN_SS<18>
DOCK_POR_RST# <19>
DOCK_DET_1 <18>
NB_DET# <18>
D_LAD[0..3]<6>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Docking Connector
5 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Docking Connector
5 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Docking Connector
5 29Friday, April 18, 2008
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
RESV_011RESV_010
RESV_021RESV_020
Close to connector
Monitor Stand
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SLICE_CONN_LOOP#SLICE_BAT_PRES#
Add net at 12/27.
C20
20.
1U_0
603_
50V4
Z~D
@C
202
0.1U
_060
3_50
V4Z~
D@
1
2
G
DS
Q62N7002W-7-F_SOT323-3~D
G
DS
Q62N7002W-7-F_SOT323-3~D
2
13
R25310K_0402_5%~DR25310K_0402_5%~D
12
C15
80.
1U_0
603_
50V4
Z~D
C15
80.
1U_0
603_
50V4
Z~D 1
2
R23
810
0K_0
402_
5%~D
@R
238
100K
_040
2_5%
~D@
12
U40
SN74AHC1G32DCKR_SC70-5~D
U40
SN74AHC1G32DCKR_SC70-5~D
INB2
INA1 O 4
P5
G3
C20
710
0P_0
402_
50V8
J~D
C20
710
0P_0
402_
50V8
J~D 1
2 C16
110
0P_0
402_
50V8
J~D
C16
110
0P_0
402_
50V8
J~D 1
2
R23
910
0K_0
402_
5%~D
@R
239
100K
_040
2_5%
~D@
12
G
DS
Q72N7002W-7-F_SOT323-3~D
G
DS
Q72N7002W-7-F_SOT323-3~D
2
13
C15
90.
1U_0
603_
50V4
Z~D
C15
90.
1U_0
603_
50V4
Z~D 1
2 C21
90.
1U_0
603_
50V4
Z~D
C21
90.
1U_0
603_
50V4
Z~D 1
2 C20
810
0P_0
402_
50V8
J~D
C20
810
0P_0
402_
50V8
J~D 1
2
R2970_0402_5%~DR2970_0402_5%~D1 2
C20
60.
1U_0
603_
50V4
Z~D
C20
60.
1U_0
603_
50V4
Z~D 1
2C20
50.
1U_0
603_
50V4
Z~D
C20
50.
1U_0
603_
50V4
Z~D 1
2
C203
0.1U_0402_16V4Z~D
C203
0.1U_0402_16V4Z~D
12
C204
0.1U_0402_16V4Z~D
C204
0.1U_0402_16V4Z~D
12
JMS1
MOLEX_53398-0719
JMS1
MOLEX_53398-0719
11223344
Shield8Shield9
556677
C21
80.
1U_0
603_
50V4
Z~D
C21
80.
1U_0
603_
50V4
Z~D 1
2
JP2
MOLEX_48227-0611
JP2
MOLEX_48227-0611
112233445566Shield7Shield8
C22
010
0P_0
402_
50V8
J~D
C22
010
0P_0
402_
50V8
J~D 1
2C16
010
0P_0
402_
50V8
J~D
C16
010
0P_0
402_
50V8
J~D 1
2
U39
SN74AHC1G32DCKR_SC70-5~D
U39
SN74AHC1G32DCKR_SC70-5~D
INB2
INA1 O 4
P5
G3
D10
RB500V-40 TE-17_SOD323-2~D
D10
RB500V-40 TE-17_SOD323-2~D
2 1
JAE_WD2M144WB1
JP1
JAE_WD2M144WB1
JP1
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151535355555757595961616363656567676969717173737575777779798181838385858787898991919393959597979999101101103103105105107107109109111111113113115115117117119119121121123123125125127127129129131131133133135135137137
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 5254 5456 5658 5860 6062 6264 6466 6668 6870 7072 7274 7476 7678 7880 8082 8284 8486 8688 8890 9092 9294 9496 9698 98
100 100102 102104 104106 106108 108110 110112 112114 114116 116118 118120 120122 122124 124126 126128 128130 130132 132134 134136 136138 138
PWR1145PWR2146 PWR3 150
PWR3 151
Shield_G1153Shield_G2154Shield_G3155Shield_G4156 Shield_G7 159
Shield_G8 160
139139 140 140141141 142 142143143 144 144
PWR2147
PWR3 149
Shield_G5 157Shield_G6 158
PWR2148 PWR4 152
Shield_G9161Shield_G10162 Shield_G11 163
Shield_G12 164
G
D S
Q252N7002W-7-F_SOT323-3~D@
G
D S
Q252N7002W-7-F_SOT323-3~D@
2
1 3
C22
110
0P_0
402_
50V8
J~D
C22
110
0P_0
402_
50V8
J~D 1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DK_SUSON
DOCKED_LED#
AUX_ON
DK_RUNON
DOCK_ID1DOCK_ID0
DTYPE0DTYPE1
DOCK_ID2
ACAV_IN_DOCK DTYPE2
HP_SHTDN#
AUX_ON
TXD1
USB_HUB1_RST#
RTS1#
USB_HUB2_RST#
DTR1#
DK_RUNON
DK_SUSON
LPCPD#
RXD1
LPCPD#
SIO_RESET#
D_LAD1
TXD1
INIT#
D_LAD2
AFD#
D_LAD3
DOCK_SMB_ALERT#
HP_DET
STRB#
DCD1#
SLCT_IN#
SIO_XTAL1
RI1#
MIC_DET
DTR1#
HP_SHTDN#
HOT_UNDOCK#
RTS1#
SIO_XTAL2
DSR1#
CTS1#
D_LFRAME#
D_DLDRQ1#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
DOCK_SIO_ALERT#
SMB_DATDOCK_SMB_DAT
DOCK_SMB_CLK
SIO_XTAL2
SMB_CLK
DOCKED_LED#
DPB_LPDPB_PRIDPA_LPDPA_PRI
SMB_CLK
D_LAD0D_LAD1D_LAD2D_LAD3
CLK_PCI_DOCK
SMB_DAT
DOCK_SIO_ALERT#
CLK_PCI_DOCK
SLCT
BUSYPE
ACK#ERROR#
SIO_XTAL1
HOT_UNDOCK#
D_CLKRUN#D_SERIRQ
PD0
SIO_RESET#
PD1PD2PD3PD4PD5PD6
VTT_PWRGD
PD7
D_LFRAME#
D_LAD0
LPCPD#
DOCK_ID0DOCK_ID1DOCK_ID2DTYPE0DTYPE1DTYPE2
SIO_RESET#SIO_RESET#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+VTR1
+VTR1 +VTR2 +VTR3+VR_CAP
+VTR2
+VTR3
+3.3V_RUN
+3.3V_ALW+VTR
+VTR
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
+3.3V_ALW
+VR_CAP
AUX_ON<17>
HOT_UNDOCK#<5>
PS_ID_DISABLE#<18>
PD[0..7] <7>
INIT# <7>SLCT_IN# <7>
AFD# <7>STRB# <7>
D_LAD[0..3]<5>
D_LFRAME#<5>
D_CLKRUN#<5>
D_SERIRQ<5>
RTS1# <7>
DTR1# <7>
DOCK_SMB_CLK<5,8,16>
DOCK_SMB_DAT<5,8,16>
SLCT <7>PE <7>BUSY <7>ACK# <7>ERROR# <7>
TXD1 <7>RXD1 <7>
DSR1# <7>
CTS1# <7>
RI1# <7>DCD1# <7>
HP_DET<16>
MIC_DET<16> VTT_PWRGD <19>
DK_SUSON <17>DK_RUNON <7,17>USB_HUB1_RST# <8>USB_HUB2_RST# <8>
DOCKED_LED#<5>
D_DLDRQ1#<5>
CLK_PCI_DOCK<5>
DOCK_SMB_ALERT#<5>
DPB_LP <14>DPB_PRI <14>DPA_LP <13>DPA_PRI <13>HP_SHTDN#<15>
ACAV_IN_DOCK<18>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMSC 47N237
6 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMSC 47N237
6 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMSC 47N237
6 29Friday, April 18, 2008
Compal Electronics, Inc.
X00
*
ID2 ID1 ID0GP31GP32GP33
Dock ID
0 0 0X01 0
00
001
11 0 0
01
X02X03A00A01
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
E-APR *ID2 ID1 ID0
GP34GP35GP36
Dock Type ID
0 00 01
1E-LIO
0100 1000
note: R60 and C29 are placed near U1 chip
1
1
1
R180 10K_0402_5%~DR180 10K_0402_5%~D12
R1510_0402_5%~DR1510_0402_5%~D1 2
R1540_0402_5%~D@R1540_0402_5%~D@
12
R17 10K_0402_5%~DR17 10K_0402_5%~D12
R228 100K_0402_1%~D@R228 100K_0402_1%~D@1 2
R230 100K_0402_1%~D@R230 100K_0402_1%~D@1 2
R2 100K_0402_1%~DR2 100K_0402_1%~D1 2
C18
80.
1U_0
402_
16V4
Z~D
C18
80.
1U_0
402_
16V4
Z~D 1
2
R55
47K_
0402
_1%
~DR
5547
K_04
02_1
%~D
12
C15
60.
1U_0
402_
16V4
Z~D
C15
60.
1U_0
402_
16V4
Z~D 1
2
R242 100K_0402_1%~DR242 100K_0402_1%~D1 2
C230.1U_0402_16V4Z~D
C230.1U_0402_16V4Z~D
1
2
R31 33_0402_5%~DR31 33_0402_5%~D1 2
R181 10K_0402_5%~DR181 10K_0402_5%~D12
R35 33_0402_5%~DR35 33_0402_5%~D1 2
R184 10K_0402_5%~DR184 10K_0402_5%~D12
R3 100K_0402_1%~DR3 100K_0402_1%~D1 2
R40 33_0402_5%~DR40 33_0402_5%~D1 2
C15
30.
1U_0
402_
16V4
Z~D
C15
30.
1U_0
402_
16V4
Z~D 1
2
G
D S
Q32N7002W-7-F_SOT323-3~DG
D S
Q32N7002W-7-F_SOT323-3~D2
1 3
R183 10K_0402_5%~DR183 10K_0402_5%~D12
R5 100K_0402_1%~DR5 100K_0402_1%~D1 2
R21 33_0402_5%~DR21 33_0402_5%~D1 2
C15
44.
7U_0
603_
6.3V
6K~D
@C
154
4.7U
_060
3_6.
3V6K
~D@
1
2R8 100K_0402_1%~D@R8 100K_0402_1%~D@1 2
R15 10K_0402_5%~DR15 10K_0402_5%~D12
R23
110
K_04
02_5
%~D
@
R23
110
K_04
02_5
%~D
@
12
R53
47K_
0402
_1%
~D
@
R53
47K_
0402
_1%
~D
@
12
R7 100K_0402_1%~D@R7 100K_0402_1%~D@1 2
R44
47K_
0402
_1%
~DR
4447
K_04
02_1
%~D
12
C165 0.1U_0402_16V4Z~DC165 0.1U_0402_16V4Z~D12
R1490_0402_5%~DR1490_0402_5%~D1 2
R23
647
K_04
02_1
%~D
@R
236
47K_
0402
_1%
~D@
12
R52
47K_
0402
_1%
~D@
R52
47K_
0402
_1%
~D@
12
R185 10K_0402_5%~DR185 10K_0402_5%~D12
R6 100K_0402_1%~DR6 100K_0402_1%~D1 2
R241 100K_0402_1%~DR241 100K_0402_1%~D1 2
R45
47K_
0402
_1%
~DR
4547
K_04
02_1
%~D
12
R20 33_0402_5%~DR20 33_0402_5%~D1 2
R32 33_0402_5%~DR32 33_0402_5%~D1 2
R1560_0402_5%~DR1560_0402_5%~D
12
R18 10K_0402_5%~DR18 10K_0402_5%~D12
R1520_0402_5%~D@R1520_0402_5%~D@
12
R2691M_0402_5%~D
@R2691M_0402_5%~D
@
1 2
R37 33_0402_5%~DR37 33_0402_5%~D1 2
R10 100K_0402_1%~DR10 100K_0402_1%~D1 2
R38 10K_0402_5%~DR38 10K_0402_5%~D12
C210.1U_0402_16V4Z~D
C210.1U_0402_16V4Z~D
1
2
C15
70.
1U_0
402_
16V4
Z~D
C15
70.
1U_0
402_
16V4
Z~D 1
2
C2812P_0402_50V8J~DC2812P_0402_50V8J~D
R6033_0402_5%~D
R6033_0402_5%~D
12
R178 10K_0402_5%~DR178 10K_0402_5%~D12
R179 10K_0402_5%~DR179 10K_0402_5%~D12
C240.1U_0402_16V4Z~D
C240.1U_0402_16V4Z~D
1
2
R410_0402_5%~D
R410_0402_5%~D1 2
R51
47K_
0402
_1%
~DR
5147
K_04
02_1
%~D
12
C15
50.
1U_0
402_
16V4
Z~D
C15
50.
1U_0
402_
16V4
Z~D 1
2
Y1
24MHZ_12PF_1BX24000CE1B~D
Y1
24MHZ_12PF_1BX24000CE1B~D12
R19 10K_0402_5%~DR19 10K_0402_5%~D12
R23
747
K_04
02_1
%~D
R23
747
K_04
02_1
%~D
12
R9 100K_0402_1%~D@R9 100K_0402_1%~D@1 2
R240 10K_0402_5%~DR240 10K_0402_5%~D12
G
D S
Q12N7002W-7-F_SOT323-3~D
G
D S
Q12N7002W-7-F_SOT323-3~D
2
1 3
R46
47K_
0402
_1%
~D@
R46
47K_
0402
_1%
~D@
12
R30 33_0402_5%~DR30 33_0402_5%~D1 2R27
10K_
0402
_5%
~DR
2710
K_04
02_5
%~D
12
R36 33_0402_5%~DR36 33_0402_5%~D1 2
R227 47K_0402_5%~DR227 47K_0402_5%~D12
C2510U_0805_10V4Z~DC2510U_0805_10V4Z~D
1
2
R54
47K_
0402
_1%
~D@
R54
47K_
0402
_1%
~D@
12
R42
47K_
0402
_1%
~D
@
R42
47K_
0402
_1%
~D
@
12
R43
47K_
0402
_1%
~DR
4347
K_04
02_1
%~D
12
R39 33_0402_5%~DR39 33_0402_5%~D1 2
R1530_0402_5%~DR1530_0402_5%~D1 2
R182 10K_0402_5%~DR182 10K_0402_5%~D12
R229 100K_0402_1%~D@R229 100K_0402_1%~D@1 2
R33 33_0402_5%~DR33 33_0402_5%~D1 2
C2715P_0402_50V8J~D
C2715P_0402_50V8J~D
R1902.7K_0402_5%~DR1902.7K_0402_5%~D
12
C2910P_0402_50V8J~D
C2910P_0402_50V8J~D
1
2
R17710K_0402_5%~DR17710K_0402_5%~D
12
R1550_0402_5%~DR1550_0402_5%~D1 2
R4 100K_0402_1%~DR4 100K_0402_1%~D1 2
R28
10K_
0402
_5%
~DR
2810
K_04
02_5
%~D
12
R1500_0402_5%~D@R1500_0402_5%~D@
12
C220.1U_0402_16V4Z~D
C220.1U_0402_16V4Z~D
1
2
R34 33_0402_5%~DR34 33_0402_5%~D1 2
GPIO PORT
SERIAL PORTPARALLEL PORT
SMBU
SLP
C &
GPIO
POWER
CLK
U1
LPC47N237-MT_TQFP100~D
GPIO PORT
SERIAL PORTPARALLEL PORT
SMBU
SLP
C &
GPIO
POWER
CLK
U1
LPC47N237-MT_TQFP100~D
VCC
13
VTR 1VTR 18VTR 32VTR 63
SDAT3SCLK9SDAT_12SCLK_18SDAT_24SCLK_210SMB_A05nSMBINT6
GPIO30 11GPIO31 33GPIO32 34GPIO33 35GPIO34 36GPIO35 37GPIO36 38GPIO37 12GPIO50 92GPIO51 94GPIO52 95GPIO53 96GPIO54 97GPIO55 98GPIO56 99GPIO57 100
GPIO1015GPIO1149GPIO1250GPIO1351GPIO1452GPIO1554GPIO1655GPIO1716GPIO2057GPIO2158GPIO2259GPIO2314GPIO2440GPIO2541GPIO2642GPIO2743
LGP4444LGP4545LGP4646SYSOPT/LGP4747
nLFRAME#24nLDRQ#25nPCIRST#26nLPCPD#27nCLKRUN#28
SER_IRQ30
PD0 68PD1 69PD2 70PD3 71PD4 72PD5 73PD6 74PD7 75
nIO_PME#17
LAD020LAD121LAD222LAD323
VSS
7VS
S19
VSS
31VS
S39
VSS
56VS
S60
VSS
76
VCC
48VC
C53
VCC
65VC
C93
PCICLK29
24MHZ_OUT64
XTAL161XTAL262
RXD 84
nDSR# 86nRTS# 87nCTS# 88nDTR# 89
nRI# 90nDCD# 91
TXD 85
nINIT# 66nSLCTIN# 67
SLCT 77PE 78
BUSY 79nACK# 80
nERROR# 81nALF# 82
nSTROBE# 83
R650_0402_5%~DR650_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STRB#
PD2
PD3
PD1
PD0
PD7
PD5
SLCT
PE
PD4
PD6
ACK#
BUSY
STRB#
PEBUSYACK#
SLCT
INIT#ERROR#
SLCT_IN#
AFD#
SLCT_IN#
AFD#
ERROR#
INIT#
PD0
PD3
PD1PD2
PD7PD6PD5PD4
RED
GREEN
BLUE
TXD1#
RXD1#
DCD1
CTS1
DSR1
RTS1
RI13243V+
3243V-
RI1RXD1#
DTR1RTS1TXD1#
DCD1
CTS1DSR1
3243C1-
3243C1+
3243C2+
3243C2-TXD1RTS1#
DCD1#DTR1#
RXD1CTS1#DSR1#
RI1#
+CRT_VCC
JVGA_HS
JVGA_VS
VGA_DDC_CLK
VGA_DDC_DAT
DTR1
+5V_RUN
+LPT5V
+LPT5V
+LPT5V
+LPT5V
+LPT5V
+5V_RUN
+3.3V_RUN
STRB#<6>
PD[0..7] <6>
DSR1#<6>
DTR1#<6>
TXD1<6>RTS1#<6>
DCD1#<6>
RXD1<6>CTS1#<6>
DK_RUNON<6,17>
RI1#<6>
PD0<6>
PD1<6>
PD2<6>
PD3<6>
PD4<6>
PD5<6>
PD6<6>
PD7<6>
ACK#<6>
BUSY<6>
PE<6>
SLCT<6>
AFD#<6>
ERROR#<6>
INIT#<6>
SLCT_IN#<6>
RED<12>
GREEN<12>
BLUE<12>+CRT_VCC<12>
JVGA_HS<12>
JVGA_VS<12>
VGA_DDC_CLK<5,12>
VGA_DDC_DAT<5,12>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
LPT and RS232
7 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
LPT and RS232
7 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
LPT and RS232
7 29Friday, April 18, 2008
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C36
270P
_040
2_50
V7K~
DC
3627
0P_0
402_
50V7
K~D
1
2
C35 0.47U_0402_10V4Z~DC35 0.47U_0402_10V4Z~D1 2
R671K_0402_5%~DR671K_0402_5%~D
12
C267 270P_0402_50V7K~DC267 270P_0402_50V7K~D1 2
C273 270P_0402_50V7K~DC273 270P_0402_50V7K~D1 2
C265 270P_0402_50V7K~DC265 270P_0402_50V7K~D1 2
C39
270P
_040
2_50
V7K~
DC
3927
0P_0
402_
50V7
K~D
1
2
C340.47U_0402_10V4Z~D
C340.47U_0402_10V4Z~D
1 2
C274 270P_0402_50V7K~DC274 270P_0402_50V7K~D1 2
C264 270P_0402_50V7K~DC264 270P_0402_50V7K~D1 2
C259 270P_0402_50V7K~DC259 270P_0402_50V7K~D1 2
C43
270P
_040
2_50
V7K~
DC
4327
0P_0
402_
50V7
K~D
1
2
Serial
VGA
JP5
TYCO_2-1734198-1
Serial
VGA
JP5
TYCO_2-1734198-1
111
62
1273
13
48
14
515
50
51
9
16171819202122232425262728293031323334353637383940
414243444546474849
52
53
10
C263 270P_0402_50V7K~DC263 270P_0402_50V7K~D1 2
RP2
4.7K_1206_8P4R_5%~D
RP2
4.7K_1206_8P4R_5%~D
1 82 73 64 5
C269 270P_0402_50V7K~DC269 270P_0402_50V7K~D1 2
C261 270P_0402_50V7K~DC261 270P_0402_50V7K~D1 2
D1
RB751V_SOD323-2~D
D1
RB751V_SOD323-2~D
2 1
RP4
4.7K_1206_8P4R_5%~D
RP4
4.7K_1206_8P4R_5%~D
1 82 73 64 5
C310.1U_0402_16V4Z~DC310.1U_0402_16V4Z~D
1
2
C266 270P_0402_50V7K~DC266 270P_0402_50V7K~D1 2
RP3
4.7K_1206_8P4R_5%~D
RP3
4.7K_1206_8P4R_5%~D
1 82 73 64 5
C38
270P
_040
2_50
V7K~
DC
3827
0P_0
402_
50V7
K~D
1
2
C272 270P_0402_50V7K~DC272 270P_0402_50V7K~D1 2
C41
270P
_040
2_50
V7K~
DC
4127
0P_0
402_
50V7
K~D
1
2
C271 270P_0402_50V7K~DC271 270P_0402_50V7K~D1 2
C262 270P_0402_50V7K~DC262 270P_0402_50V7K~D1 2
C33 0.1U_0402_16V4Z~DC33 0.1U_0402_16V4Z~D1 2
C37
270P
_040
2_50
V7K~
DC
3727
0P_0
402_
50V7
K~D
1
2
C260 270P_0402_50V7K~DC260 270P_0402_50V7K~D1 2
RP1
4.7K_1206_8P4R_5%~D
RP1
4.7K_1206_8P4R_5%~D
1 82 73 64 5
C320.47U_0402_10V4Z~D
C320.47U_0402_10V4Z~D
1 2
U2
MAX3243ECUI+T_TSSOP28~D
U2
MAX3243ECUI+T_TSSOP28~D
V- 3
VCC
26
FORCEOFF#22
C1+28V+ 27
C1-24C2+1
C2-2
FORCEON23GND 25
T1OUT 9T2OUT 10T3OUT 11
R1IN 4R2IN 5R3IN 6R4IN 7R5IN 8
T1IN14T2IN13T3IN12R1OUT19R2OUT18R3OUT17R4OUT16R5OUT15R2OUTB20
INVALID# 21
C42
270P
_040
2_50
V7K~
DC
4227
0P_0
402_
50V7
K~D
1
2
C270 270P_0402_50V7K~DC270 270P_0402_50V7K~D1 2
C40
270P
_040
2_50
V7K~
DC
4027
0P_0
402_
50V7
K~D
1
2
C30270P_0402_50V7K~DC30270P_0402_50V7K~D
1
2
C268 270P_0402_50V7K~DC268 270P_0402_50V7K~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCFG_SEL1
S_USB_OC2#
S_USB_OC3#
S_USB2_EN
S_USB3_EN
S_USB_OC1#S_USB1_EN
FX_SMB_CLKDOCK_SMB_CLK
FX_SMB_DATDOCK_SMB_DAT
FX1_SMB_CLKFX1_SMB_DAT
USB_HUB2_RST#
S_USB_OC2#
S_USB_OC1#
S_USB2_EN
S_USB1_EN
SCFG_SEL1
+VDD18PLL_2
+VDD18PLL_1
FX_SMB_DATFX_SMB_CLK
S_XTAL1
S_XTAL2
S_XTAL1
S_XTAL2
+VDD18_2
S_USBP1+S_USBP1-
S_USBP2-S_USBP2+
USB_HUB1_RST#
S_USBP3-S_USBP3+
S_USB_OC5#
S_USB_OC4#
FX_SMB_CLKFX_SMB_DAT
S_USBP5+S_USBP5-
S_USBP4+S_USBP4-
S_USBP6+S_USBP6-
S_USB_OC5#S_USB5_EN
S_USB_OC6#S_USB6_EN
S_USB_OC4#S_USB4_EN
USB_HUB2_RST#
USB_HUB1_RST#
P_XTAL1
P_XTAL2
P_XTAL1
P_XTAL2
FX2_SMB_CLKFX2_SMB_DAT
S_USB5_EN
S_USB4_EN
+VDD18_1
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3VDDA_USB1+3.3V_SUS
+3.3VDDA_USB1+3.3V_SUS +3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3VDDA_USB2+3.3V_SUS +3.3V_SUS
+3.3V_SUS
+3.3VDDA_USB2+3.3V_SUS
+3.3V_SUS
+3.3V_SUS +3.3V_SUS
+3.3V_SUS +3.3V_SUS
S_USB3_EN <9>S_USB_OC3# <9>
USB_HUB1_RST#<6>
S_USB_OC6# <10>
USB_HUB2_RST#<6>
S_USBP1+ <9>S_USBP1- <9>
S_USBP2+ <9>S_USBP2- <9>
S_USBP3- <9>S_USBP3+ <9>
USB_A_+<5>USB_A_-<5>
S_USBP6- <10>S_USBP6+ <10>
S_USBP5- <11>S_USBP5+ <11>
S_USBP4- <11>S_USBP4+ <11>
USB_B_+<5>USB_B_-<5>
DOCK_SMB_CLK<5,6,16>
DOCK_SMB_DAT<5,6,16>
S_USB6_EN <10>
S_USB_OC12# <9>
S_USB12_EN <9>
S_USB_OC45# <11>
S_USB45_EN <11>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMSC USB2513
8 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMSC USB2513
8 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
SMSC USB2513
8 29Friday, April 18, 2008
Compal Electronics, Inc.
00
011 1
*
CFG_SEL1 CFG_SEL0
SMBUS or EEPROM INTERFACE BEHAVIOR
01
Pin24Pin25Internal Default Configuration
SMBus slave address 58 (0101100x)
2-Wire I2C EEPROMS are support
Bus Power Operation / LED Mode = USB
00
011 1
*
CFG_SEL1 CFG_SEL0
SMBUS or EEPROM INTERFACE BEHAVIOR
01
Pin24Pin25Internal Default Configuration
SMBus slave address 58 (0101100x)
2-Wire I2C EEPROMS are support
Bus Power Operation / LED Mode = USB
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C63
15P_
0402
_50V
8J~D
C63
15P_
0402
_50V
8J~D
C50
18P_
0402
_50V
8J~D
C50
18P_
0402
_50V
8J~D 1
2
R2980_0402_5%~DR2980_0402_5%~D
1 2
U3
USB2513-AEZG_QFN36_6X6~D
U3
USB2513-AEZG_QFN36_6X6~D
USBDN1_DM 1USBDN1_DP 2
USBDN2_DM 3USBDN2_DP 4
VD
DA
335
USBDN3_DM 6USBDN3_DP 7
NC 8NC 9
VD
DA
3310
TEST11
PRTPWR1 12OCS1_N 13
VDD18 14
VDD
33C
R15
PRTPWR2 16OCS2_N 17
PRTPWR3 18OCS3_N 19
NC 20NC 21
SDA/SMBDATA/NON_REM122
VD
D33
23
SCL/SMBCLK/CFG_SEL024
HS_IND/CFG_SEL125
RESET_N26
VBUS_DET27
SUSP_IND/LOCAL_PWR/NON_REM028
VD
DA
3329
USBUP_DM30 USBUP_DP31
XTAL232
XTAL1/CLKIN33
VDD18PLL 34
RBIAS35
VDD
33PL
L36
Thermal Slug(VSS) 37
Y224MHZ_12PF_1BX24000CE1B~D
Y224MHZ_12PF_1BX24000CE1B~D
12
C19
21U
_060
3_10
V6K~
DC
192
1U_0
603_
10V6
K~D 1
2C58
10U_0805_10V4Z~DC58
10U_0805_10V4Z~D
1
2
R771M_0402_5%~D
R771M_0402_5%~D1 2
C51
15P_
0402
_50V
8J~D
C51
15P_
0402
_50V
8J~D
R780_0402_5%~D
R780_0402_5%~D1 2
C59
0.1U
_040
2_16
V4Z~
DC
590.
1U_0
402_
16V4
Z~D
1
2
C62
18P_
0402
_50V
8J~D
C62
18P_
0402
_50V
8J~D
1
2
C48
0.1U
_040
2_16
V4Z~
DC
480.
1U_0
402_
16V4
Z~D
1
2
C53
1U_0
603_
10V6
K~D
C53
1U_0
603_
10V6
K~D 1
2
R3000_0402_5%~D@R3000_0402_5%~D@
1 2
R84
100K
_040
2_5%
~DR
8410
0K_0
402_
5%~D 1
2
R2990_0402_5%~D@R2990_0402_5%~D@
1 2
R21647K_0402_5%~D
@R21647K_0402_5%~D
@
12
G
D S
Q22N7002W-7-F_SOT323-3~D
G
D S
Q22N7002W-7-F_SOT323-3~D
2
1 3
C65
1U_0
603_
10V6
K~D
C65
1U_0
603_
10V6
K~D 1
2
C19
01U
_060
3_10
V6K~
DC
190
1U_0
603_
10V6
K~D
1
2
R2224.7K_0402_5%~DR2224.7K_0402_5%~D
12
R75
100K
_040
2_5%
~DR
7510
0K_0
402_
5%~D 1
2
C44
0.1U
_040
2_16
V4Z~
DC
440.
1U_0
402_
16V4
Z~D
1
2
G
D S
Q42N7002W-7-F_SOT323-3~D
G
D S
Q42N7002W-7-F_SOT323-3~D
2
1 3
R1660_0402_5%~DR1660_0402_5%~D1 2
C18
00.
1U_0
402_
16V4
Z~D
C18
00.
1U_0
402_
16V4
Z~D
1
2
R3010_0402_5%~DR3010_0402_5%~D
1 2
U5
USB2513-AEZG_QFN36_6X6~D
U5
USB2513-AEZG_QFN36_6X6~D
USBDN1_DM 1USBDN1_DP 2
USBDN2_DM 3USBDN2_DP 4
VD
DA
335
USBDN3_DM 6USBDN3_DP 7
NC 8NC 9
VD
DA
3310
TEST11
PRTPWR1 12OCS1_N 13
VDD18 14
VDD
33C
R15
PRTPWR2 16OCS2_N 17
PRTPWR3 18OCS3_N 19
NC 20NC 21
SDA/SMBDATA/NON_REM122
VD
D33
23
SCL/SMBCLK/CFG_SEL024
HS_IND/CFG_SEL125
RESET_N26
VBUS_DET27
SUSP_IND/LOCAL_PWR/NON_REM028
VD
DA
3329
USBUP_DM30 USBUP_DP31
XTAL232
XTAL1/CLKIN33
VDD18PLL 34
RBIAS35
VDD
33PL
L36
Thermal Slug(VSS) 37
R2660_0402_5%~D@R2660_0402_5%~D@
1 2
R701K_0402_5%~DR701K_0402_5%~D
1 2
R1670_0402_5%~DR1670_0402_5%~D
1 2
C60
0.1U
_040
2_16
V4Z~
DC
600.
1U_0
402_
16V4
Z~D
1
2
R690_0402_5%~D
R690_0402_5%~D1 2
C810.1U_0402_16V4Z~DC810.1U_0402_16V4Z~D
1
2
C57
0.1U
_040
2_16
V4Z~
DC
570.
1U_0
402_
16V4
Z~D
1
2
R7410K_0402_5%~DR7410K_0402_5%~D
1 2
C52
0.1U
_040
2_10
V6K~
DC
520.
1U_0
402_
10V6
K~D 1
2
Y324MHZ_12PF_1BX24000CE1B~D
Y324MHZ_12PF_1BX24000CE1B~D
12C
490.
1U_0
402_
16V4
Z~D
C49
0.1U
_040
2_16
V4Z~
D
1
2C18
41U
_060
3_10
V6K~
DC
184
1U_0
603_
10V6
K~D 1
2
C61
0.1U
_040
2_16
V4Z~
DC
610.
1U_0
402_
16V4
Z~D
1
2
L1BLM18PG181SN1_0603~D
L1BLM18PG181SN1_0603~D
1 2
R76
12K_
0402
_1%
~DR
7612
K_04
02_1
%~D 1
2
R1630_0402_5%~DR1630_0402_5%~D
1 2
C45
0.1U
_040
2_16
V4Z~
DC
450.
1U_0
402_
16V4
Z~D
1
2
R85
12K_
0402
_1%
~DR
8512
K_04
02_1
%~D 1
2
R2214.7K_0402_5%~DR2214.7K_0402_5%~D
12
R822.2K_0402_5%~D
R822.2K_0402_5%~D
12
R801K_0402_5%~DR801K_0402_5%~D
1 2C
194
1U_0
603_
10V6
K~D
C19
41U
_060
3_10
V6K~
D 1
2
R681M_0402_5%~DR681M_0402_5%~D
1 2
C47
0.1U
_040
2_16
V4Z~
DC
470.
1U_0
402_
16V4
Z~D
1
2
R722.2K_0402_5%~D
@ R722.2K_0402_5%~D
@
12
R812.2K_0402_5%~D
R812.2K_0402_5%~D
12
C55
1U_0
603_
10V6
K~D
C55
1U_0
603_
10V6
K~D 1
2
C19
11U
_060
3_10
V6K~
DC
191
1U_0
603_
10V6
K~D 1
2
L2BLM18PG181SN1_0603~D
L2BLM18PG181SN1_0603~D
1 2
C67
1U_0
603_
10V6
K~D
C67
1U_0
603_
10V6
K~D 1
2
R21547K_0402_5%~D
@R21547K_0402_5%~D
@
12
C54
0.1U
_040
2_16
V4Z~
DC
540.
1U_0
402_
16V4
Z~D 1
2
C18
10.
1U_0
402_
16V4
Z~D
C18
10.
1U_0
402_
16V4
Z~D
1
2
C56
0.1U
_040
2_16
V4Z~
DC
560.
1U_0
402_
16V4
Z~D 1
2
R2630_0402_5%~DR2630_0402_5%~D
1 2
C66
0.1U
_040
2_16
V4Z~
DC
660.
1U_0
402_
16V4
Z~D 1
2
R660_0402_5%~DR660_0402_5%~D1 2
C750.1U_0402_16V4Z~DC750.1U_0402_16V4Z~D
1
2
C4610U_0805_10V4Z~D
C4610U_0805_10V4Z~D
1
2
R2640_0402_5%~DR2640_0402_5%~D
1 2
C18
91U
_060
3_10
V6K~
DC
189
1U_0
603_
10V6
K~D 1
2
C19
31U
_060
3_10
V6K~
DC
193
1U_0
603_
10V6
K~D 1
2
R2650_0402_5%~D@R2650_0402_5%~D@
1 2
R8310K_0402_5%~DR8310K_0402_5%~D
1 2
C64
0.1U
_040
2_10
V6K~
DC
640.
1U_0
402_
10V6
K~D 1
2
R1620_0402_5%~DR1620_0402_5%~D1 2
R732.2K_0402_5%~D
@R732.2K_0402_5%~D
@
12
C18
51U
_060
3_10
V6K~
DC
185
1U_0
603_
10V6
K~D 1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
S_USB_OC12#
USBP1_D-
USBP2_D+
USBP2_D-
+5V_RUN_PS2_A +5V_RUN_PS2
DAT_MSE_1
CLK_MSE_1
CLK_KBD_1DAT_KBD_1
USBP3_D+USBP3_D-
USBP2_D+USBP2_D-
USBP1_D-USBP1_D+
S_USB_OC3#USBP3_D-
USBP3_D+ USBP3_D-USBP3_D+
USBP1_D-
USBP1_D+ USBP2_D+
USBP2_D-
USBP1_D+
+USB_A_PWR+5V_ALW
+USB_A_PWR
+5V_RUN
+5V_RUN
+USB_A_PWR
+USB_B_PWR
+USB_B_PWR
+5V_ALW
+USB_B_PWR
+USB_B_PWR
+USB_A_PWR
S_USB_OC12# <8>
S_USB12_EN<8>
S_USBP2+<8>
S_USBP2-<8>
CLK_MSE<5>
DAT_MSE<5>
CLK_KBD<5>
DAT_KBD<5>
S_USBP3+<8>
S_USBP3-<8>
S_USB3_EN<8>
S_USB_OC3# <8>
S_USBP1-<8>
S_USBP1+<8>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
USB Port x3 and PS2x2
9 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
USB Port x3 and PS2x2
9 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
USB Port x3 and PS2x2
9 29Friday, April 18, 2008
Compal Electronics, Inc.
Short mode
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PS2 Connector
Need close JUSB1.
Short mode
2008.03.12 modify
+
C68
150U
_D_6
.3VM
_R18
M~D
+
C68
150U
_D_6
.3VM
_R18
M~D
1
2
R89 0_0402_5%~DR89 0_0402_5%~D12
C93
270P
_040
2_50
V7K~
DC
9327
0P_0
402_
50V7
K~D1
2
R10
710
K_04
02_5
%~D
@
R10
710
K_04
02_5
%~D
@
12
L12BLM18AG601SN1D_0603~DL12BLM18AG601SN1D_0603~D
1 2
L5 DLW21SN900SQ2_0805~D@L5 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
R91 0_0402_5%~DR91 0_0402_5%~D12
R88 0_0402_5%~DR88 0_0402_5%~D12
FUSE1L0603
@FUSE1L0603
@
1 2
U37
TPS2066ADR_SO8~D
U37
TPS2066ADR_SO8~D
GND1IN2EN13EN24 OC2# 5OUT2 6OUT1 7OC1# 8
C95
270P
_040
2_50
V7K~
DC
9527
0P_0
402_
50V7
K~D1
2
R86 0_0402_5%~DR86 0_0402_5%~D12
C77
0.1U
_040
2_16
V4Z~
D
@
C77
0.1U
_040
2_16
V4Z~
D
@
1
2
U7
TPS2066ADR_SO8~D
U7
TPS2066ADR_SO8~D
GND1IN2EN13EN24 OC2# 5OUT2 6OUT1 7OC1# 8
C92
10U
_080
5_10
V4Z~
DC
9210
U_0
805_
10V4
Z~D
1
2
C76
10U
_120
6_16
V4Z~
DC
7610
U_1
206_
16V4
Z~D
1
2
L9BLM21PG600SN1D_0805~DL9BLM21PG600SN1D_0805~D1 2
C69
0.1U
_040
2_16
V4Z~
DC
690.
1U_0
402_
16V4
Z~D
1
2
+
C73
150U
_D_6
.3VM
_R18
M~D
+
C73
150U
_D_6
.3VM
_R18
M~D
1
2
R87 0_0402_5%~DR87 0_0402_5%~D12
MOUSE GREEN
KEYBOARDPURPLE
JPS1
TYCO_1734336-6
MOUSE GREEN
KEYBOARDPURPLE
JPS1
TYCO_1734336-6
351
62
4
81210
911
7 13141516
D25
PRTR5V0U2X_SOT143-4~D
@D25
PRTR5V0U2X_SOT143-4~D
@
GND1
IO12
VCC 4
IO2 3
R10
510
K_04
02_5
%~D
@
R10
510
K_04
02_5
%~D
@
12 L10
BLM18AG601SN1D_0603~DL10BLM18AG601SN1D_0603~D
1 2
L3 DLW21SN900SQ2_0805~D@L3 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
R10
810
K_04
02_5
%~D
@
R10
810
K_04
02_5
%~D
@
12
PJP8PAD-OPEN 4x4m
PJP8PAD-OPEN 4x4m
12
PJP10PAD-OPEN 4x4m
PJP10PAD-OPEN 4x4m
12
L13BLM18AG601SN1D_0603~DL13BLM18AG601SN1D_0603~D
1 2
C96
270P
_040
2_50
V7K~
DC
9627
0P_0
402_
50V7
K~D1
2
R10
610
K_04
02_5
%~D
@
R10
610
K_04
02_5
%~D
@
12
C72
10U
_120
6_16
V4Z~
DC
7210
U_1
206_
16V4
Z~D
1
2
U10
IP4220CZ6_SO6~D
@U10
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
L11BLM18AG601SN1D_0603~DL11BLM18AG601SN1D_0603~D
1 2
R90 0_0402_5%~DR90 0_0402_5%~D12
L4 DLW21SN900SQ2_0805~D@L4 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2USB
PORT1
PORT2
PORT3
JUSB1
FOX_UB11123-M4-4F
USB
PORT1
PORT2
PORT3
JUSB1
FOX_UB11123-M4-4F
VBUS1D-2D+3GND4
VBUS5D-6D+7GND8
VBUS9D-10D+11GND12
SHLD113SHLD214SHLD315SHLD416
C94
270P
_040
2_50
V7K~
DC
9427
0P_0
402_
50V7
K~D1
2
C21
30.
1U_0
402_
16V4
Z~D
C21
30.
1U_0
402_
16V4
Z~D
1
2
C74
0.1U
_040
2_16
V4Z~
DC
740.
1U_0
402_
16V4
Z~D
1
2
F13A_6VDC_2920SMD300F13A_6VDC_2920SMD300
21
C71
0.1U
_040
2_16
V4Z~
D
@
C71
0.1U
_040
2_16
V4Z~
D
@
1
2
FUSE3L0603
@FUSE3L0603
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP6_D+ USBP6_D- USBP6_D-USBP6_D+
SATA_SBTX_C_DRX_P
ESATA_DET
S_USB_OC6#
S_USB6_EN_1
USBP6_D+
USBP6_D-
SATA_SBRX_C_DTX_N_1
SATA_SBRX_C_DTX_P_1
SATA_SBTX_C_DRX_P_1
SATA_SBTX_C_DRX_N_1
SATA_SBRX_P
SATA_SBRX_N
SATA_SBTX_P
SATA_SBTX_N
SATA_SBTX_C_DRX_N
SATA_SBRX_DTX_P
SATA_SBRX_DTX_N
ESATA_DET
SATA_SBTX_DRX_P
SATA_SBTX_DRX_N
SATA_SBRX_C_DTX_N_1
SATA_SBRX_C_DTX_P_1
SATA_SBTX_DRX_P
SATA_SBTX_DRX_N
SATA_SBRX_DTX_N
SATA_SBRX_DTX_P
S_USB6_EN_1S_USB6_EN
SATA_SBRX_C_DTX_N
SATA_SBTX_C_DRX_N
SATA_SBRX_C_DTX_P_1
SATA_SBRX_C_DTX_N_1
SATA_SBRX_C_DTX_P
SATA_SBTX_C_DRX_P
SATA_SBTX_C_DRX_N_1
SATA_SBTX_C_DRX_P_1
+USB_D_PWR
+USB_D_PWR
+5V_ALW
+USB_D_PWR
+USB_D_PWR
+3.3V_RUN +1.8V_RUN
+1.8V_RUN +1.8V_RUN
+5V_ALW
+1.8V_RUN
+5V_ALW
+5V_ALW
S_USBP6-<8>
S_USBP6+<8>S_USB_OC6# <8>
SATA_SBRX_DTX_N<5>
SATA_SBRX_DTX_P<5>S_USB6_EN<8>
SATA_SBTX_DRX_P<5>
SATA_SBTX_DRX_N<5>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
E-SATA+USB Port x1
10 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
E-SATA+USB Port x1
10 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
E-SATA+USB Port x1
10 29Friday, April 18, 2008
Compal Electronics, Inc.
Benson0912: If populate R287~290 and R293~R296, the U42,R262, R267, R268 ,U43, C239, C241 is no-stuff and C244,C245 will change to 0ohm.
Short mode
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Need close JESATA.
Bill0703: Please place under U42. (co-layout..)
Need close U42 pin 6, 19.
R2930_0402_5%~D@R2930_0402_5%~D@1 2
G
D
S
Q52N7002W-7-F_SOT323-3~DG
D
S
Q52N7002W-7-F_SOT323-3~D
2
13
FUSE9L0603
@FUSE9L0603
@
1 2
R2900_0402_5%~D@R2900_0402_5%~D@1 2
R267 1K_0402_5%~DR267 1K_0402_5%~D1 2
R18710K_0402_5%~DR18710K_0402_5%~D
12
R2960_0402_5%~D@R2960_0402_5%~D@1 2
R262 10K_0402_5%~DR262 10K_0402_5%~D1 2
U43
NCP1117ST18T3G_SOT223-3~D
U43
NCP1117ST18T3G_SOT223-3~D
ADJ/
GN
D1
OUT 2IN3 R2890_0402_5%~D@R2890_0402_5%~D@1 2
C84 0.01U_0402_16V7K~DC84 0.01U_0402_16V7K~D12
R18810K_0402_5%~DR18810K_0402_5%~D
12
R308470_0402_5%~DR308470_0402_5%~D
U33
TPS2066ADR_SO8~D
U33
TPS2066ADR_SO8~D
GND1IN2EN13EN24 OC2# 5OUT2 6OUT1 7OC1# 8
C19
70.
1U_0
402_
16V4
Z~D
@
C19
70.
1U_0
402_
16V4
Z~D
@
1
2
C25
60.
1U_0
402_
16V4
Z~D
C25
60.
1U_0
402_
16V4
Z~D
1
2
USB
ESATA
JESATA
TYCO_1909573-3
USB
ESATA
JESATA
TYCO_1909573-3
VBUS1D-2D+3GND4
GND5T+6T-7GND8R-9R+10GND11
SHLD112SHLD213SHLD314SHLD415
C25
40.
1U_0
402_
16V4
Z~D
C25
40.
1U_0
402_
16V4
Z~D
1
2
R302 0_0402_5%~DR302 0_0402_5%~D12
C83 0.01U_0402_16V7K~DC83 0.01U_0402_16V7K~D12
C25
30.
1U_0
402_
16V4
Z~D
C25
30.
1U_0
402_
16V4
Z~D
1
2
C245 0.01U_0402_16V7K~DC245 0.01U_0402_16V7K~D12
C244 0.01U_0402_16V7K~DC244 0.01U_0402_16V7K~D12
R268 1K_0402_5%~DR268 1K_0402_5%~D1 2
+
C25
515
0U_D
_6.3
VM_R
18M
~D
+
C25
515
0U_D
_6.3
VM_R
18M
~D
1
2
U41
SN74AHC1G32DCKR_SC70-5~D
U41
SN74AHC1G32DCKR_SC70-5~D
INB2
INA1O 4
P5
G3
R2940_0402_5%~D@R2940_0402_5%~D@1 2
C23
80.
1U_0
402_
16V4
Z~D
@
C23
80.
1U_0
402_
16V4
Z~D
@
1
2
D34
PRTR5V0U2X_SOT143-4~D
@D34
PRTR5V0U2X_SOT143-4~D
@
GND1
IO12
VCC 4
IO2 3
R2880_0402_5%~D@R2880_0402_5%~D@1 2
C211
0.1U_0402_16V4Z~D
C211
0.1U_0402_16V4Z~D
12
R303 0_0402_5%~DR303 0_0402_5%~D12
R2870_0402_5%~D@R2870_0402_5%~D@1 2
R2950_0402_5%~D@R2950_0402_5%~D@1 2
C24
110
U_0
805_
6.3V
6M~D
C24
110
U_0
805_
6.3V
6M~D
1
2
C24
00.
1U_0
402_
16V4
Z~D
@
C24
00.
1U_0
402_
16V4
Z~D
@
1
2
PJP7PAD-OPEN 4x4m
PJP7PAD-OPEN 4x4m
12
U42
PI2EQX3211BHE_SSOP20~D
U42
PI2EQX3211BHE_SSOP20~D
EQA1
VDD2
AI+3
AI-4
GND 5
VDD6
BO+7
BO-8
GND 9
EQB10
VDD11
GND 12
BI- 13
BI+ 14
VDD15
GND 16
AO- 17
AO+ 18
VDD19
EN 20
L33 DLW21SN900SQ2_0805~D@L33 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C23
910
U_0
805_
6.3V
6M~D
C23
910
U_0
805_
6.3V
6M~D
1
2
C19
810
U_1
206_
16V4
Z~D
C19
810
U_1
206_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_LOM_TRD3+
S_USB_OC45#
DOCK_LED_100#
DOCK_LED_10#
DOCK_LAN_ACTLED_YEL# LED_1000_YEL_R#
LED_10_GRN_R#
LED_100_ORG_R#
DOCK_LOM_TRD3-
TRCT0_1_2_3
DOCK_LOM_TRD0-
DOCK_LOM_TRD1-
DOCK_LOM_TRD1+
DOCK_LOM_TRD0+
USBP4_D+
USBP4_D-
USBP5_D+
USBP5_D-
USBP4_D-USBP4_D+
TRCT0_1_2_3
USBP4_D-
USBP4_D+ USBP5_D+
USBP5_D-
USBP5_D+USBP5_D-
LED_10_GRN_R#
LED_1000_YEL_R#
LED_100_ORG_R#
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
+USB_C_PWR
+5V_ALW
+3.3V_LAN
+USB_C_PWR
+USB_C_PWR
+USB_C_PWR
DOCK_LOM_TRD3+<5>
S_USB_OC45# <8>
S_USB45_EN<8>
DOCK_LOM_TRD3-<5>
DOCK_LOM_TRD0+<5>
S_USBP5+<8>
S_USBP5-<8>
S_USBP4+<8>
S_USBP4-<8>
TRCT0_1_DOCK<5>
DOCK_LOM_ACTLED_YEL#<5>
DOCK_LOM_SPD100LED_ORG#<5>
DOCK_LOM_SPD10LED_GRN#<5>DOCK_LOM_TRD0-<5>
DOCK_LOM_TRD1-<5>
DOCK_LOM_TRD1+<5>
TRCT2_3_DOCK<5>
DOCK_LOM_TRD2+<5>
DOCK_LOM_TRD2-<5>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
RJ45+USB Portx2
11 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
RJ45+USB Portx2
11 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
RJ45+USB Portx2
11 29Friday, April 18, 2008
Compal Electronics, Inc.
Short mode
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to JP3 connector
Need close JP3.
DELL CONFIDENTIAL/PROPRIETARY
Modify symbol at 12/19
JP3
TYCO_1840015-1
JP3
TYCO_1840015-1
MD1+2
VCC6
MD1-3
MD2+4
MD2-5
MD3+7LED1_YELLOW- 11
LED1_YELLOW+ 12
LED2_ORANGE- 15
LED2_GREEN- 13
MD3-8
MD4+9
MD4-10
CH_GND1
VBUS0 16D0- 17D0+ 18
GND 19
SHLD124SHLD225SHLD326SHLD427
LED2_+ 14
VBUS1 20D1- 21D1+ 22
GND 23
U45
TPS2066ADR_SO8~D
U45
TPS2066ADR_SO8~D
GND1IN2EN13EN24 OC2# 5OUT2 6OUT1 7OC1# 8
L35 DLW21SN900SQ2_0805~D@L35 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C79
0.1U
_040
2_16
V4Z~
DC
790.
1U_0
402_
16V4
Z~D
1
2
C25
810
U_1
206_
16V4
Z~D
C25
810
U_1
206_
16V4
Z~D
1
2
R102
150_0402_5%~D
R102
150_0402_5%~D
1 2
U44
IP4220CZ6_SO6~D
@U44
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
+
C78
150U
_D_6
.3VM
_R18
M~D
+
C78
150U
_D_6
.3VM
_R18
M~D
1
2
L34 DLW21SN900SQ2_0805~D@L34 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
R104
150_0402_5%~D
R104
150_0402_5%~D
1 2
L310_0603_5%~DL310_0603_5%~D1 2
R306 0_0402_5%~DR306 0_0402_5%~D12
C25
70.
1U_0
402_
16V4
Z~D
@
C25
70.
1U_0
402_
16V4
Z~D
@
1
2
C20
90.
01U
_040
2_16
V7K~
D
@
C20
90.
01U
_040
2_16
V7K~
D
@
1
2
R305 0_0402_5%~DR305 0_0402_5%~D12
PJP11PAD-OPEN 4x4m
PJP11PAD-OPEN 4x4m
12
R307 0_0402_5%~DR307 0_0402_5%~D12
R304 0_0402_5%~DR304 0_0402_5%~D12
R103
150_0402_5%~D
R103
150_0402_5%~D
1 2
FUSE10L0603
@FUSE10L0603
@
1 2
C21
00.
01U
_040
2_16
V7K~
D
@
C21
00.
01U
_040
2_16
V7K~
D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSYNC_BUF_1
HSYNC_BUF_1
VGA_DDC_DAT
VGA_DDC_CLK
+CRT_VCC
JVGA_HS
RED
GREEN
JVGA_VS
+CR
TVC
C
HSYNC_BUF
VSYNC_BUF
BLUE
VGA_B
VGA_G
VGA_R
HSYNC_BUFVGA_HS HSYNC_L
VSYNC_LVGA_VS VSYNC_BUF
+5V_SYNC
+5V_RUN
+CRT_VCC
+5V_SYNC
+5V_RUN
+5V_RUN
+5V_SYNC
VGA_VS<5>
VGA_HS<5>
VGA_B<5>
VGA_G<5>
VGA_R<5>
VGA_DDC_CLK<5,7>
VGA_DDC_DAT<5,7>
RED <7>
VGA_DDC_DAT <5,7>GREEN <7>
JVGA_HS <7>BLUE <7>+CRT_VCC <7>JVGA_VS <7>
VGA_DDC_CLK <5,7>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
CRT
12 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
CRT
12 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
CRT
12 29Friday, April 18, 2008
Compal Electronics, Inc.
K1 A2
A1 K2
DA204U
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
D3DA204U_SOT323-3~D@D3DA204U_SOT323-3~D@
2 31
L14BK1608HS220T_0603~D
L14BK1608HS220T_0603~D
1 2
L1868NH_LQW18AN68NJ00D_5%_0603
L1868NH_LQW18AN68NJ00D_5%_0603
1 2
R27
215
0_04
02_1
%~D
R27
215
0_04
02_1
%~D
12
D6RB500V-40 TE-17_SOD323-2~DD6RB500V-40 TE-17_SOD323-2~D
21
R10
90_
1206
_5%
~DR
109
0_12
06_5
%~D 1
2
U13
74AHCT1G125GW_SOT353-5~D
U13
74AHCT1G125GW_SOT353-5~D
A2 Y 4
P5
G3
OE#
1
L16BK1608HS220T_0603~D
L16BK1608HS220T_0603~D
1 2
F41.
1A_6
V_18
12L1
10PR
~D
@
F41.
1A_6
V_18
12L1
10PR
~D
@
12
R27
015
0_04
02_1
%~D
R27
015
0_04
02_1
%~D
12
R273 10_0402_5%~DR273 10_0402_5%~D1 2
C10
610
P_04
02_5
0V8J
~DC
106
10P_
0402
_50V
8J~D 1
2
C10
0
2.2P
_040
2_50
V8C
~D
C10
0
2.2P
_040
2_50
V8C
~D
1
2 C10
1
2.2P
_040
2_50
V8C
~D
C10
1
2.2P
_040
2_50
V8C
~D
1
2
C10
422
P_04
02_5
0V8J
~D
@
C10
422
P_04
02_5
0V8J
~D
@
1
2
C10
2
2.2P
_040
2_50
V8C
~D
C10
2
2.2P
_040
2_50
V8C
~D
1
2
C98
2.2P
_040
2_50
V8C
~D
C98
2.2P
_040
2_50
V8C
~D
1
2
R11
01K
_040
2_5%
~D@
R11
01K
_040
2_5%
~D@
12
D2
RB5
00V-
40 T
E-17
_SO
D32
3-2~
DD
2R
B500
V-40
TE-
17_S
OD
323-
2~D
21
C99
2.2P
_040
2_50
V8C
~D
C99
2.2P
_040
2_50
V8C
~D
1
2 C10
30.
01U
_040
2_16
V7K~
DC
103
0.01
U_0
402_
16V7
K~D
1
2
R29
12.
2K_0
402_
5%~D
R29
12.
2K_0
402_
5%~D 1
2
R274 10_0402_5%~DR274 10_0402_5%~D1 2
R24
30_
1206
_5%
~D@
R24
30_
1206
_5%
~D@
12
U14
74AHCT1G125GW_SOT353-5~D
U14
74AHCT1G125GW_SOT353-5~D
A2 Y 4
P5
G3
OE#
1
C10
522
P_04
02_5
0V8J
~D
@
C10
522
P_04
02_5
0V8J
~D
@
1
2
D5DA204U_SOT323-3~D@D5DA204U_SOT323-3~D@
2 31
L15BK1608HS220T_0603~D
L15BK1608HS220T_0603~D
1 2
R114 39_0402_5%~DR114 39_0402_5%~D1 2
C10
710
P_04
02_5
0V8J
~DC
107
10P_
0402
_50V
8J~D 1
2
D4DA204U_SOT323-3~D@D4DA204U_SOT323-3~D@
2 31
R27
115
0_04
02_1
%~D
R27
115
0_04
02_1
%~D
12
R116 39_0402_5%~DR116 39_0402_5%~D1 2
R11
11K
_040
2_5%
~D@
R11
11K
_040
2_5%
~D@
12
R29
22.
2K_0
402_
5%~D
R29
22.
2K_0
402_
5%~D 1
2
L1768NH_LQW18AN68NJ00D_5%_0603
L1768NH_LQW18AN68NJ00D_5%_0603
1 2
C97
2.2P
_040
2_50
V8C
~D
C97
2.2P
_040
2_50
V8C
~D
1
2
R113
1K_0402_5%~D
R113
1K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPA_DOCK_AUX
DPA_DOCK_AUX#
DPA_DOCK_LANE3#_C
DPA_DOCK_LANE2#_C
DPA_DOCK_LANE2_C
DPA_DOCK_LANE3_C
DPA_DOCK_LANE0_C
DPA_DOCK_LANE0#_CDPA_DOCK_LANE1_C
DPA_DOCK_LANE1#_C
DPA_DOCK_HPD
DPA_DOCK_CA_DET
DPA_PRI
DPA_DOCK_HPD
DPA_LP
DP_A_HP
DPA_DOCK_LANE0_C
DPA_DOCK_LANE0#_C
DPA_DOCK_LANE0_C
DPA_DOCK_LANE0#_C
DPA_DOCK_LANE1_C
DPA_DOCK_LANE1#_C
DPA_DOCK_LANE1_C
DPA_DOCK_LANE1#_C
DPA_DOCK_LANE2_C
DPA_DOCK_LANE2#_C
DPA_DOCK_LANE2_C
DPA_DOCK_LANE2#_C
DPA_DOCK_LANE3_C
DPA_DOCK_LANE3#_C
DPA_DOCK_LANE3_C
DPA_DOCK_LANE3#_C
DPA_DOCK_CA_DET
DPA_DOCK_AUX
DPA_DOCK_AUX#
DPA_DOCK_CA_DET
DPA_DOCK_AUX
DPA_DOCK_AUX#
DP_A_L3-DP_A_L3+
DP_A_L2+
DP_A_L1+
DP_A_L0+DP_A_L0-
DP_A_L1-
DP_A_L2-
DP_A_AUX+DP_A_AUX-
DP_A_HPDP_A_CA_DET1
DPA_LP
DPA_DOCK_AUXDPA_DOCK_AUX#
DPA_DVI_LANE2DPA_DVI_LANE2#
DPA_DVI_LANE1DPA_DVI_LANE1#
DPA_DVI_CLKDPA_DVI_CLK#
DPA_DVI_LANE0#DPA_DVI_LANE0
DPA_DVI_SDATDPA_DVI_SCLK
DPA_DVI_DETECT
DPB_DVI_CLKDPB_DVI_CLK#
DPB_DVI_DETECT
DPB_DVI_LANE1
DPB_DVI_LANE2DPB_DVI_LANE2#
DPB_DVI_SDAT
DPB_DVI_LANE1#
DPB_DVI_LANE0#DPB_DVI_LANE0
DPB_DVI_SCLK
DPA_DVI_CLK
DPA_DVI_DETECT
DPA_DVI_SCLKDPA_DVI_SDAT
DPA_DVI_LANE2DPA_DVI_LANE2#
DPA_DVI_LANE1DPA_DVI_LANE1#
DPA_DVI_LANE0DPA_DVI_LANE0#
DPA_DVI_CLK#
DPA_DOCK_AUX#
DPA_DOCK_AUX
DPA_DOCK_AUX#
DPA_DOCK_AUX
+3.3
V_R
UN
_AR
DPA_DOCK_LANE0_CDPA_DOCK_LANE0#_C
DPA_DOCK_LANE1_CDPA_DOCK_LANE1#_C
DPA_DOCK_LANE2_CDPA_DOCK_LANE2#_C
DPA_DOCK_LANE3_CDPA_DOCK_LANE3#_C
DPA_DOCK_LANE3
DPA_DOCK_LANE2
DPA_DOCK_LANE1DPA_DOCK_LANE1#DPA_DOCK_LANE1#
DPA_DOCK_LANE0DPA_DOCK_LANE0#DPA_DOCK_LANE0#
DPA_DOCK_LANE3#DPA_DOCK_LANE3#
DPA_DOCK_LANE2#DPA_DOCK_LANE2#
DPA_DOCK_RP1_LANE0DPA_DOCK_RP1_LANE0#
DPA_DOCK_RP1_LANE1DPA_DOCK_RP1_LANE1#
DPA_DOCK_RP1_LANE2DPA_DOCK_RP1_LANE2#
DPA_DOCK_RP1_LANE3DPA_DOCK_RP1_LANE3#
DPA_DOCK_RP_LANE0DPA_DOCK_RP_LANE0#
DPA_DOCK_RP_LANE1DPA_DOCK_RP_LANE1#
DPA_DOCK_RP_LANE2DPA_DOCK_RP_LANE2#
DPA_DOCK_RP_LANE3DPA_DOCK_RP_LANE3#
PS_MODE
DPA_DOCK_HPD
DPA_DOCK_CA_DETPS_CEXT
PS_REXT
PS_REXT
PS_CEXT
PS_MODE
PS_PC0PS_PC1
PS_PC0PS_PC1
PS_I2C_CTL_EN#
PS_I2C_CTL_EN#
DPA_DOCK_RP1_LANE0#DPA_DOCK_RP1_LANE0
DPA_DOCK_RP1_LANE1
DPA_DOCK_RP1_LANE2
DPA_DOCK_RP1_LANE3
DPA_DOCK_RP1_LANE1#
DPA_DOCK_RP1_LANE2#
DPA_DOCK_RP1_LANE3#
DPA_DOCK_CA_DET
DP_A_CA_DET1
DP_HPD1_SINK
DDCBUF1_EN#
DDCBUF1_EN#
DP_HPD1_SINK
DPA_DOCK_HPD DPA_DOCK_HPD_1
DPA_DOCK_AUXDPA_DOCK_AUX#
DPA_DOCK_RP_AUXDPA_DOCK_RP_AUX#DPA_DOCK_RP_AUX#
+3.3V_RUN_DPA
+5V_RUN_DPA
+3.3V_RUN_DPA
+5V_RUN_DPA+3.3V_RUN_DPA +5V_RUN+3.3V_RUN
+3.3V_RUN_DPA
+DPA_VCC
+3.3V_RUN_DPA
+5V_RUN_DPB+5V_RUN_DPA
+3.3V_RUN_DPA
+3.3V_RUN_DPA
+3.3V_RUN_DPA
+3.3V_RUN_DPA+3.3V_RUN_DPA
+3.3V_RUN_DPA
DPA_PRI<6>DPA_LP<6>
DP_A_L0+<5>DP_A_L0-<5>
DP_A_L1-<5>DP_A_L1+<5>
DP_A_L2+<5>DP_A_L2-<5>
DP_A_L3+<5>DP_A_L3-<5>
DP_A_AUX+<5>DP_A_AUX-<5>
DP_A_HP<5>
DPB_DVI_CLK# <14>DPB_DVI_CLK <14>
DPB_DVI_LANE1 <14>
DPB_DVI_LANE2 <14>DPB_DVI_LANE2# <14>
DPB_DVI_DETECT <14>
DPB_DVI_SDAT <14>
DPB_DVI_LANE1# <14>
DPB_DVI_LANE0# <14>DPB_DVI_LANE0 <14>
DPB_DVI_SCLK <14>
DP_A_CA_DET1<5>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Port A DP/DVI
13 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Port A DP/DVI
13 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Port A DP/DVI
13 29Friday, April 18, 2008
Compal Electronics, Inc.
Display port Connector
Place close to JDP1 connector140mA 35mA
Close U15Close U15
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close JDP1
R312100K_0402_5%~D
R312100K_0402_5%~D
1 2
C223 0.1U_0402_10V7K~DC223 0.1U_0402_10V7K~D1 2
C291 0.1U_0402_10V7K~DC291 0.1U_0402_10V7K~D1 2
R200 100K_0402_5%~DR200 100K_0402_5%~D1 2
U46
PS8121EQFN48G_QFN48_7X7~D
U46
PS8121EQFN48G_QFN48_7X7~D
NC1
CFG22
PC03PC14 GND 5REXT6
HPD 7
SCL/AUX+8SDA/AUX-9
CEXT10
VCC 11
GND 12
OUT4n 13OUT4p 14
VCC 15
OUT3n 16OUT3p 17
GND 18
OUT2n 19OUT2p 20
VCC 21
OUT1n 22OUT1p 23
GND 24
OE#25
I2C_CTL_EN#26
CA_DET27
SDAZ28 SCLZ29
HPD_SINK30
GND 31
DDCBUF_EN#32
VCC 33
CFG134 CFG035
MODE36
GND 37
IN1p38IN1n39
VCC 40IN2p41IN2n42
GND 43
IN3p44IN3n45
VCC 46
IN4p47IN4n48
VSS 49
R19
910
0K_0
402_
5%~D
R19
910
0K_0
402_
5%~D 1
2
C16
80.
1U_0
402_
16V4
Z~D
C16
80.
1U_0
402_
16V4
Z~D 1
2
R211 4.7K_0402_5%~DR211 4.7K_0402_5%~D
R24
40_
1206
_5%
~DR
244
0_12
06_5
%~D
12
R311100K_0402_5%~D
@R311100K_0402_5%~D
@ 1 2
R249 0_0402_5%~DR249 0_0402_5%~D1 2
C224 0.1U_0402_10V7K~DC224 0.1U_0402_10V7K~D1 2C290 0.1U_0402_10V7K~DC290 0.1U_0402_10V7K~D1 2
R27
510
0K_0
402_
5%~D
R27
510
0K_0
402_
5%~D 1
2
JP4
TYCO_1775729-1
JP4
TYCO_1775729-1
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 40
C18
20.
033U
_040
2_16
V7K~
D
@
C18
20.
033U
_040
2_16
V7K~
D
@1
2
C275 2.2U_0603_10V6K~DC275 2.2U_0603_10V6K~D
C227 0.1U_0402_10V7K~DC227 0.1U_0402_10V7K~D1 2
C16
90.
1U_0
402_
16V4
Z~D
C16
90.
1U_0
402_
16V4
Z~D 1
2
R328 4.7K_0402_5%~DR328 4.7K_0402_5%~D
R323 100K_0402_5%~DR323 100K_0402_5%~D1 2
R20
14.
7K_0
402_
1%~D
R20
14.
7K_0
402_
1%~D 1
2
R322 100K_0402_5%~DR322 100K_0402_5%~D1 2
C243 0.1U_0402_10V7K~DC243 0.1U_0402_10V7K~D1 2
JDP1
MOLEX_47272-0026
JDP1
MOLEX_47272-0026
DP_PWR20RTN19HP_DET18AUX_CH-17GND16AUX_CH+15GND14CA_DET13LAN3-12LAN3_shield11LAN3+10LAN2-9LAN2_shield8LAN2+7LAN1-6LAN1_shield5LAN1+4LAN0-3LAN0_shield2LAN0+1
GND 24GND 23GND 22GND 21
C17
30.
1U_0
402_
16V4
Z~D
C17
30.
1U_0
402_
16V4
Z~D 1
2
C251 0.1U_0402_10V7K~DC251 0.1U_0402_10V7K~D1 2
C19
60.
1U_0
402_
16V4
Z~D
C19
60.
1U_0
402_
16V4
Z~D 1
2
R11
91M
_040
2_5%
~DR
119
1M_0
402_
5%~D
12
C10
80.
01U
_040
2_16
V7K~
DC
108
0.01
U_0
402_
16V7
K~D
1
2
8
D28
RCLAMP0524P.TCT~D
@
8
D28
RCLAMP0524P.TCT~D
@
4
5
1
6
2
7
3
10
9
R309100K_0402_5%~D
R309100K_0402_5%~D
1 2
C252 0.1U_0402_10V7K~DC252 0.1U_0402_10V7K~D1 2
C20
00.
1U_0
402_
16V4
Z~D
C20
00.
1U_0
402_
16V4
Z~D 1
2
R27
610
0K_0
402_
5%~D
@
R27
610
0K_0
402_
5%~D
@
12
C277 0.1U_0402_10V7K~DC277 0.1U_0402_10V7K~D1 2
R27
810
0K_0
402_
5%~D
@
R27
810
0K_0
402_
5%~D
@ 12
R27
710
0K_0
402_
5%~D
@
R27
710
0K_0
402_
5%~D
@ 12
R317 500_0402_1%R317 500_0402_1%
R2030_0603_5%~DR2030_0603_5%~D1 2
C278 0.1U_0402_10V7K~DC278 0.1U_0402_10V7K~D1 2
R20
23.
48K_
0402
_1%
~DR
202
3.48
K_04
02_1
%~D 1
2
C229 0.1U_0402_10V7K~DC229 0.1U_0402_10V7K~D1 2
R248 0_0402_5%~DR248 0_0402_5%~D1 2
C279 0.1U_0402_10V7K~DC279 0.1U_0402_10V7K~D1 2
C225 0.1U_0402_10V7K~DC225 0.1U_0402_10V7K~D1 2
F23A
_6VD
C_2
920S
MD
300
F23A
_6VD
C_2
920S
MD
300
21
R32
0
4.7K
_040
2_5%
~D
@
R32
0
4.7K
_040
2_5%
~D
@
R11
70_
1206
_5%
~D
@
R11
70_
1206
_5%
~D
@
12
C17
10.
1U_0
402_
16V4
Z~D
C17
10.
1U_0
402_
16V4
Z~D 1
2
C280 0.1U_0402_10V7K~DC280 0.1U_0402_10V7K~D1 2
C222 0.1U_0402_10V7K~DC222 0.1U_0402_10V7K~D1 2
8
D30
RCLAMP0524P.TCT~D
@
8
D30
RCLAMP0524P.TCT~D
@
4
5
1
6
2
7
3
10
9
R31
8
4.7K
_040
2_5%
~D
@
R31
8
4.7K
_040
2_5%
~D
@
L290_0402_5%~D
L290_0402_5%~D1 2
R319 100K_0402_5%~DR319 100K_0402_5%~D1 2
C12
810
U_0
805_
10V4
Z~D
C12
810
U_0
805_
10V4
Z~D
1
2
D7
SDM
10U
45-7
_SO
D52
3-2~
D
@
D7
SDM
10U
45-7
_SO
D52
3-2~
D
@
21
R310100K_0402_5%~D
@R310100K_0402_5%~D
@ 1 2
C228 0.1U_0402_10V7K~DC228 0.1U_0402_10V7K~D1 2
8
D29
RCLAMP0524P.TCT~D
@
8
D29
RCLAMP0524P.TCT~D
@
4
5
1
6
2
7
3
10
9
R2040_0603_5%~DR2040_0603_5%~D1 2
C17
00.
1U_0
402_
16V4
Z~D
C17
00.
1U_0
402_
16V4
Z~D 1
2
U15
SN75DP122_QFN56~D
U15
SN75DP122_QFN56~D
DPVadj1
VDD2
ML_IN0 (p)3ML_IN0 (n)4
GND 5
ML_IN1(p)6ML_IN1(n)7
VDD8
ML_IN2(p)9ML_IN2(n)10
GND 11
ML_IN3(p)12ML_IN3(n)13
VCC14
TMDS_SINK_CLK(n) 15
VCC17
TMDS_SINK0(n) 18TMDS_SINK0(p) 19
GND 20
TMDS_SINK1(n) 21TMDS_SINK1(p) 22
VCC23
I2C_SCL 29I2C_SDA 28
VSadj26GND 27
LP30
GND 31
TMDS_HPD_SINK 32
Priority33
VDD34
AUX(n)_I2C_SDA35 AUX(p)_I2C_SCL36
DP_SINK3(p) 47DP_SINK3(n) 46
VDD54
DP_SINK2(p) 50DP_SINK2(n) 49
GND 51
DP_SINK1(p) 53DP_SINK1(n) 52
VDD48
DP_SINK0(p) 56DP_SINK0(n) 55
AUX_SINK(p) 45
GND 44
AUX_SINK(n) 43
GND 42
CAD_SINK 41DP_HPD_SINK 40
TMDS_SINK2(p) 25TMDS_SINK2(n) 24
HPD37
Thermal57
TMDS_SINK_CLK(p) 16
VDD*138
CAD39
R23
25.
1M_0
402_
5%~D
R23
25.
1M_0
402_
5%~D 1
2
C281 0.1U_0402_10V7K~DC281 0.1U_0402_10V7K~D1 2
R247 0_0402_5%~DR247 0_0402_5%~D1 2
C17
20.
1U_0
402_
16V4
Z~D
C17
20.
1U_0
402_
16V4
Z~D 1
2
C226 0.1U_0402_10V7K~DC226 0.1U_0402_10V7K~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DP_B_L3-DP_B_L3+
DP_B_L2+
DP_B_L1+
DP_B_L0+DP_B_L0-
DP_B_L1-
DP_B_L2-
DP_B_AUX+DP_B_AUX-
DPB_DOCK_CA_DET
DPB_DOCK_LANE0_C
DPB_DOCK_LANE1#_C
DPB_DOCK_LANE0#_CDPB_DOCK_LANE1_C
DPB_DVI_DETECT
DPB_DOCK_LANE2_C
DPB_DOCK_LANE2#_CDPB_DOCK_LANE3_C
+3.3
V_R
UN
_BR
DPB_DOCK_LANE3#_C
DP_B_HP
DPB_LP
DPB_DOCK_CA_DET
DPB_DOCK_AUXDPB_DOCK_AUX#
DPB_DVI_LANE2DPB_DVI_LANE2#
DPB_DVI_LANE1DPB_DVI_LANE1#
DPB_DVI_LANE0DPB_DVI_LANE0#
DPB_DVI_CLKDPB_DVI_CLK#
DPB_DOCK_LANE0_C
DPB_DOCK_LANE0#_C
DPB_DVI_DETECT
DPB_DOCK_LANE0_C
DPB_DOCK_LANE0#_C
DPB_DOCK_LANE1_C
DPB_DOCK_LANE1#_C
DPB_DOCK_LANE1_C
DPB_DOCK_LANE1#_C
DPB_DOCK_LANE2_C
DPB_DOCK_LANE2#_C
DPB_DOCK_LANE2_C
DPB_DOCK_LANE2#_C
DPB_DOCK_LANE3_C
DPB_DOCK_LANE3#_C
DPB_DOCK_LANE3_C
DPB_DOCK_LANE3#_C
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPB_DOCK_CA_DET
DP_B_HP
DPB_DOCK_AUX#
DPB_DOCK_AUX
DPB_DOCK_CA_DET
DPB_DVI_SDATDPB_DVI_SCLK
DP_B_CA_DET1
DPB_PRIDPB_LP
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPB_DOCK_AUX
DPB_DOCK_AUX#
PS1_PC1
PS1_CEXT
PS1_MODE
PS1_REXT
PS1_CEXT
PS1_I2C_CTL_EN#
PS1_PC0
PS1_REXTPS1_PC1
PS1_I2C_CTL_EN#
DPB_DOCK_RP_LANE0DPB_DOCK_RP_LANE0#
DPB_DOCK_RP_LANE1DPB_DOCK_RP_LANE1#
DPB_DOCK_RP_LANE2DPB_DOCK_RP_LANE2#
DPB_DOCK_RP_LANE3DPB_DOCK_RP_LANE3#
DPB_DOCK_CA_DET
PS1_MODE
PS1_PC0
DPB_DOCK_LANE3
DPB_DOCK_LANE2DPB_DOCK_LANE2#
DPB_DOCK_LANE1#
DPB_DOCK_LANE0#DPB_DOCK_LANE0_CDPB_DOCK_LANE0#_C
DPB_DOCK_LANE1_CDPB_DOCK_LANE1#_C
DPB_DOCK_LANE2_CDPB_DOCK_LANE2#_C
DPB_DOCK_LANE3_CDPB_DOCK_LANE3#_C
DPB_DOCK_RP1_LANE0DPB_DOCK_RP1_LANE0#
DPB_DOCK_RP1_LANE1DPB_DOCK_RP1_LANE1#
DPB_DOCK_RP1_LANE2DPB_DOCK_RP1_LANE2#
DPB_DOCK_RP1_LANE3DPB_DOCK_RP1_LANE3#
DPB_DOCK_RP1_LANE3#
DPB_DOCK_RP1_LANE2#
DPB_DOCK_RP1_LANE0#DPB_DOCK_RP1_LANE0
DPB_DOCK_RP1_LANE1DPB_DOCK_RP1_LANE1#
DPB_DOCK_RP1_LANE2
DPB_DOCK_RP1_LANE3
DPB_DOCK_LANE1
DPB_DOCK_LANE3#
DPB_DOCK_LANE0
DP_B_CA_DET1
DDCBUF2_EN#
DDCBUF2_EN#
DPB_DOCK_RP_AUXDPB_DOCK_RP_AUX#
DPB_DOCK_HPDDPB_DOCK_HPD
DPB_DOCK_HPD
DP_HPD2_SINK
DP_HPD2_SINK
DPB_DOCK_HPD DPB_DOCK_HPD_1DPB_DOCK_AUX#
DPB_DOCK_AUX
DPB_DOCK_AUXDPB_DOCK_AUX# DPB_DOCK_RP_AUX#
+3.3V_RUN_DPB
+5V_RUN_DPB+3.3V_RUN_DPB
+5V_RUN+3.3V_RUN
+5V_RUN_DPB
+3.3V_RUN_DPB
+3.3V_RUN_DPB
+DPB_VCC
+3.3V_RUN_DPB
+3.3V_RUN_DPB
+3.3V_RUN_DPB
+3.3V_RUN_DPB
+3.3V_RUN_DPB
+3.3V_RUN_DPB
+3.3V_RUN_DPB
DP_B_AUX+<5>DP_B_AUX-<5>
DPB_PRI<6>DPB_LP<6>
DPB_DVI_LANE0 <13>DPB_DVI_LANE0# <13>
DPB_DVI_SCLK <13>DPB_DVI_SDAT <13>
DPB_DVI_LANE1 <13>DPB_DVI_LANE1# <13>
DPB_DVI_LANE2 <13>DPB_DVI_LANE2# <13>
DPB_DVI_CLK <13>DPB_DVI_CLK# <13>
DP_B_HP<5>
DPB_DVI_DETECT <13>
DP_B_L0+<5>DP_B_L0-<5>
DP_B_L1-<5>DP_B_L1+<5>
DP_B_L2+<5>DP_B_L2-<5>
DP_B_L3+<5>DP_B_L3-<5>
DP_B_CA_DET1<5>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Port B DP/DVI
14 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Port B DP/DVI
14 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Port B DP/DVI
14 29Friday, April 18, 2008
Compal Electronics, Inc.
Place close to JDP2 connector
Display port Connector
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
140mA 35mA
Close U16 Close U16
Close JDP2
C20
10.
1U_0
402_
16V4
Z~D
C20
10.
1U_0
402_
16V4
Z~D 1
2
C282 0.1U_0402_10V7K~DC282 0.1U_0402_10V7K~D1 2
C232 0.1U_0402_10V7K~DC232 0.1U_0402_10V7K~D1 2
U47
PS8121EQFN48G_QFN48_7X7~D
U47
PS8121EQFN48G_QFN48_7X7~D
NC1
CFG22
PC03PC14 GND 5REXT6
HPD 7
SCL/AUX+8SDA/AUX-9
CEXT10
VCC 11
GND 12
OUT4n 13OUT4p 14
VCC 15
OUT3n 16OUT3p 17
GND 18
OUT2n 19OUT2p 20
VCC 21
OUT1n 22OUT1p 23
GND 24
OE#25
I2C_CTL_EN#26
CA_DET27
SDAZ28 SCLZ29
HPD_SINK30
GND 31
DDCBUF_EN#32
VCC 33
CFG134 CFG035
MODE36
GND 37
IN1p38IN1n39
VCC 40IN2p41IN2n42
GND 43
IN3p44IN3n45
VCC 46
IN4p47IN4n48
VSS 49
R250 0_0402_5%~DR250 0_0402_5%~D1 2
C276 2.2U_0603_10V6K~DC276 2.2U_0603_10V6K~D
R2090_0603_5%~DR2090_0603_5%~D1 2
C237 0.1U_0402_10V7K~DC237 0.1U_0402_10V7K~D1 2
C17
70.
1U_0
402_
16V4
Z~D
C17
70.
1U_0
402_
16V4
Z~D 1
2
R33
4
4.7K
_040
2_5%
~D
@
R33
4
4.7K
_040
2_5%
~D
@
R325 100K_0402_5%~DR325 100K_0402_5%~D1 2
C13
310
U_0
805_
10V4
Z~D
C13
310
U_0
805_
10V4
Z~D
1
2
R20
510
0K_0
402_
5%~D
R20
510
0K_0
402_
5%~D 1
2
C234 0.1U_0402_10V7K~DC234 0.1U_0402_10V7K~D1 2
JDP2
MOLEX_47272-0026
JDP2
MOLEX_47272-0026
DP_PWR20RTN19HP_DET18AUX_CH-17GND16AUX_CH+15GND14CA_DET13LAN3-12LAN3_shield11LAN3+10LAN2-9LAN2_shield8LAN2+7LAN1-6LAN1_shield5LAN1+4LAN0-3LAN0_shield2LAN0+1
GND 24GND 23GND 22GND 21
R329 4.7K_0402_5%~DR329 4.7K_0402_5%~D
U16
SN75DP122_QFN56~D
U16
SN75DP122_QFN56~D
DPVadj1
VDD2
ML_IN0 (p)3ML_IN0 (n)4
GND 5
ML_IN1(p)6ML_IN1(n)7
VDD8
ML_IN2(p)9ML_IN2(n)10
GND 11
ML_IN3(p)12ML_IN3(n)13
VCC14
TMDS_SINK_CLK(n) 15
VCC17
TMDS_SINK0(n) 18TMDS_SINK0(p) 19
GND 20
TMDS_SINK1(n) 21TMDS_SINK1(p) 22
VCC23
I2C_SCL 29I2C_SDA 28
VSadj26GND 27
LP30
GND 31
TMDS_HPD_SINK 32
Priority33
VDD34
AUX(n)_I2C_SDA35 AUX(p)_I2C_SCL36
DP_SINK3(p) 47DP_SINK3(n) 46
VDD54
DP_SINK2(p) 50DP_SINK2(n) 49
GND 51
DP_SINK1(p) 53DP_SINK1(n) 52
VDD48
DP_SINK0(p) 56DP_SINK0(n) 55
AUX_SINK(p) 45
GND 44
AUX_SINK(n) 43
GND 42
CAD_SINK 41DP_HPD_SINK 40
TMDS_SINK2(p) 25TMDS_SINK2(n) 24
HPD37
Thermal57
TMDS_SINK_CLK(p) 16
VDD*138
CAD39
R226 4.7K_0402_5%~DR226 4.7K_0402_5%~D
C293 0.1U_0402_10V7K~DC293 0.1U_0402_10V7K~D1 2
C289 0.1U_0402_10V7K~DC289 0.1U_0402_10V7K~D1 2R321 100K_0402_5%~DR321 100K_0402_5%~D
1 2
C287 0.1U_0402_10V7K~DC287 0.1U_0402_10V7K~D1 2
L300_0402_5%~D
L300_0402_5%~D1 2
R20
83.
48K_
0402
_1%
~DR
208
3.48
K_04
02_1
%~D 1
2
R315100K_0402_5%~D
@R315100K_0402_5%~D
@ 1 2
C285 0.1U_0402_10V7K~DC285 0.1U_0402_10V7K~D1 2
R313100K_0402_5%~D
R313100K_0402_5%~D
1 2
C283 0.1U_0402_10V7K~DC283 0.1U_0402_10V7K~D1 2
8
D33
RCLAMP0524P.TCT~D
@
8
D33
RCLAMP0524P.TCT~D
@
4
5
1
6
2
7
3
10
9
C235 0.1U_0402_10V7K~DC235 0.1U_0402_10V7K~D1 2
R12
61M
_040
2_5%
~DR
126
1M_0
402_
5%~D
12
C17
80.
1U_0
402_
16V4
Z~D
C17
80.
1U_0
402_
16V4
Z~D 1
2
C18
30.
033U
_040
2_16
V7K~
D
@
C18
30.
033U
_040
2_16
V7K~
D
@1
2
C17
60.
1U_0
402_
16V4
Z~D
C17
60.
1U_0
402_
16V4
Z~D 1
2
C230 0.1U_0402_10V7K~DC230 0.1U_0402_10V7K~D1 2R206 100K_0402_5%~DR206 100K_0402_5%~D1 2
C17
40.
1U_0
402_
16V4
Z~D
C17
40.
1U_0
402_
16V4
Z~D 1
2
C11
70.
01U
_040
2_16
V7K~
DC
117
0.01
U_0
402_
16V7
K~D
1
2
C17
90.
1U_0
402_
16V4
Z~D
C17
90.
1U_0
402_
16V4
Z~D 1
2
C233 0.1U_0402_10V7K~DC233 0.1U_0402_10V7K~D1 2
R28
010
0K_0
402_
5%~D
@
R28
010
0K_0
402_
5%~D
@ 12
R24
50_
1206
_5%
~DR
245
0_12
06_5
%~D
12
R27
910
0K_0
402_
5%~D
@
R27
910
0K_0
402_
5%~D
@
12
R2100_0603_5%~DR2100_0603_5%~D1 2
R324 100K_0402_5%~DR324 100K_0402_5%~D1 2
R33
0
4.7K
_040
2_5%
~D
@
R33
0
4.7K
_040
2_5%
~D
@
D9
SDM
10U
45-7
_SO
D52
3-2~
D
@
D9
SDM
10U
45-7
_SO
D52
3-2~
D
@
21
F33A
_6VD
C_2
920S
MD
300
F33A
_6VD
C_2
920S
MD
300
21
8
D31
RCLAMP0524P.TCT~D
@
8
D31
RCLAMP0524P.TCT~D
@
4
5
1
6
2
7
3
10
9
R331 500_0402_1%R331 500_0402_1%
C231 0.1U_0402_10V7K~DC231 0.1U_0402_10V7K~D1 2
R28
210
0K_0
402_
5%~D
@
R28
210
0K_0
402_
5%~D
@ 12
C17
50.
1U_0
402_
16V4
Z~D
C17
50.
1U_0
402_
16V4
Z~D 1
2
R252 0_0402_5%~DR252 0_0402_5%~D1 2
8
D32
RCLAMP0524P.TCT~D
@
8
D32
RCLAMP0524P.TCT~D
@
4
5
1
6
2
7
3
10
9
R12
40_
1206
_5%
~D@
R12
40_
1206
_5%
~D@
12
R314100K_0402_5%~D
@R314100K_0402_5%~D
@ 1 2
C292 0.1U_0402_10V7K~DC292 0.1U_0402_10V7K~D1 2
C288 0.1U_0402_10V7K~DC288 0.1U_0402_10V7K~D1 2
R251 0_0402_5%~DR251 0_0402_5%~D1 2
C21
40.
1U_0
402_
16V4
Z~D
C21
40.
1U_0
402_
16V4
Z~D 1
2
R316100K_0402_5%~D
R316100K_0402_5%~D
1 2
R20
74.
7K_0
402_
1%~D
R20
74.
7K_0
402_
1%~D 1
2
C286 0.1U_0402_10V7K~DC286 0.1U_0402_10V7K~D1 2
C236 0.1U_0402_10V7K~DC236 0.1U_0402_10V7K~D1 2
R23
35.
1M_0
402_
5%~D
R23
35.
1M_0
402_
5%~D 1
2
C284 0.1U_0402_10V7K~DC284 0.1U_0402_10V7K~D1 2
R28
110
0K_0
402_
5%~D
R28
110
0K_0
402_
5%~D 1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
I2S_LRCLK
I2S_BCLK_1
I2S_DO
DAI_LRCKDAI_DO
I2S_LRCLK
DAI_BCLK
DAI_12MHZ
DAI_12MHZ I2S_12MHZ_1
I2S_12MHZ
FX3_SMB_DATFX3_SMB_CLK
I2S_DII2S_DO
I2S_BCLKDOCK_MICINMICBIAS
I2S_LRCLK
DAI_BCLK
DAI_LRCK
I2S_DI
DAI_DO
I2S_BCLK
I2S_12MHZ
AUD_DOCK_HP_OUT_LAUD_DOCK_HP_OUT_R
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN+3.3V_RUN +3.3V_AVDD
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_DCVDD
+3.3V_AVDD
+3.3V_AVDD
AUD_DOCK_HP_OUT_L <16>
DOCK_MICIN<16>MICBIAS<16>
DAI_DO<5>
DAI_LRCK<5>
DAI_DI <5>
DAI_12MHZ<5>
DAI_BCLK<5>
FX3_SMB_CLK<16>FX3_SMB_DAT<16>
HP_SHTDN#<6>
AUD_DOCK_HP_OUT_R <16>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Audio DAC
15 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Audio DAC
15 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Audio DAC
15 29Friday, April 18, 2008
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Modify by ADI 2008.03.15
2008.3.10 Modify.We will create this part.
C19
5
10P_
0402
_50V
8J~D
C19
5
10P_
0402
_50V
8J~D
1
2
C12
70.
1U_0
402_
16V7
K~D
C12
70.
1U_0
402_
16V7
K~D
1
2
D8
PRTR5V0U2X_SOT143-4~D
@D8
PRTR5V0U2X_SOT143-4~D
@
GND1
IO12
VCC 4
IO2 3
C18
6
330P
_040
2_50
V7K~
D
@
C18
6
330P
_040
2_50
V7K~
D
@1
2
U38F
SN74LVC14APWR_TSSOP14
U38F
SN74LVC14APWR_TSSOP14
O 12I13
P14
G7
R79
33_0402_5%~D
R79
33_0402_5%~D1 2
C199
10P_0402_50V8J~D
C199
10P_0402_50V8J~D
1 2
U38A
SN74LVC14APWR_TSSOP14
U38A
SN74LVC14APWR_TSSOP14
O 2I1
P14
G7
SSM2603U17
SSM2603CPZ-REEL7_LFCSP28_5X5~D
SSM2603U17
SSM2603CPZ-REEL7_LFCSP28_5X5~D
DBVDD5 HPVDD12
LHPOUT 13RHPOUT 14
PGND 15
LOUT 16ROUT 17
AVDD18 AGND 19DCVDD3 DGND 4
LLINEIN24
RLINEIN23
MCLK/XTI1XTO2
SCLK28SDIN27
CLKOUT 6
BCLK 7MICIN22MICBIAS21
MUTEN25
CSB26
VMID20
DACDAT 8ADCDAT 10
DACLRC 9ADCLRC 11
Thermal Pad 29
U38D
SN74LVC14APWR_TSSOP14
U38D
SN74LVC14APWR_TSSOP14
O 8I9
P14
G7
U38B
SN74LVC14APWR_TSSOP14
U38B
SN74LVC14APWR_TSSOP14
O 4I3
P14
G7
R17410K_0402_5%~DR17410K_0402_5%~D
12
D12
DA2
04U
_SO
T323
-3~D
@ D12
DA2
04U
_SO
T323
-3~D
@
231
D36PMEG2020EJ_SC90-2~D
D36PMEG2020EJ_SC90-2~D2 1
R23
4
22_0
402_
5%~D
R23
4
22_0
402_
5%~D
12
U38E
SN74LVC14APWR_TSSOP14
U38E
SN74LVC14APWR_TSSOP14
O 10I11
P14
G7
R22
0
100K
_040
2_5%
~D
R22
0
100K
_040
2_5%
~D12
D35PMEG2020EJ_SC90-2~DD35PMEG2020EJ_SC90-2~D
2 1
R21
9
100K
_040
2_5%
~D
R21
9
100K
_040
2_5%
~D12
R235
22_0402_5%~D
R235
22_0402_5%~D1 2
C13
14.
7U_0
805_
10V4
Z~D
C13
14.
7U_0
805_
10V4
Z~D
1
2
R2460_0402_5%~DR2460_0402_5%~D1 2
D15
DA2
04U
_SO
T323
-3~D
@ D15
DA2
04U
_SO
T323
-3~D
@
231
R71
33_0402_5%~D
R71
33_0402_5%~D1 2
D14
DA2
04U
_SO
T323
-3~D
@
D14
DA2
04U
_SO
T323
-3~D
@
231
U38C
SN74LVC14APWR_TSSOP14
U38C
SN74LVC14APWR_TSSOP14
O 6I5
P14
G7
R13310K_0402_5%~D
@R13310K_0402_5%~D
@
12
R21
7
100K
_040
2_5%
~D
R21
7
100K
_040
2_5%
~D12
C18
7
330P
_040
2_50
V7K~
D
@
C18
7
330P
_040
2_50
V7K~
D
@1
2
C212
0.1U_0402_16V4Z~D
C212
0.1U_0402_16V4Z~D
12
C13
00.
1U_0
402_
16V7
K~D
C13
00.
1U_0
402_
16V7
K~D
1
2
L21BLM21PG331SN1D_2P~D
L21BLM21PG331SN1D_2P~D
1 2
C13
20.
1U_0
402_
16V7
K~D
C13
20.
1U_0
402_
16V7
K~D
1
2
D11
DA2
04U
_SO
T323
-3~D
@ D11
DA2
04U
_SO
T323
-3~D
@
231
L25BLM18EG601SN1D_2P~D
L25BLM18EG601SN1D_2P~D1 2
C12
90.
1U_0
402_
16V7
K~D
C12
90.
1U_0
402_
16V7
K~D
1
2
D13
DA2
04U
_SO
T323
-3~D
@ D13
DA2
04U
_SO
T323
-3~D
@
231
C12
64.
7U_0
805_
10V4
Z~D
C12
64.
7U_0
805_
10V4
Z~D
1
2
R21
8
100K
_040
2_5%
~D
R21
8
100K
_040
2_5%
~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_SMB_DAT FX3_SMB_DAT
FX3_SMB_CLK
MIC_2MIC_1
DOCK_SMB_CLK
HP_DET
MIC_DET
DOCK_MICIN
HP_SPK_L1AUD_DOCK_HP_OUT_L
HP_SPK_R1AUD_DOCK_HP_OUT_R
MIC_2
HP_DET
MIC_DET
HP_SPK_L2
HP_SPK_R2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
DOCK_MICIN<15>
MICBIAS<15>
DOCK_SMB_DAT<5,6,8>
DOCK_SMB_CLK<5,6,8>
FX3_SMB_DAT <15>
FX3_SMB_CLK <15>
AUD_DOCK_HP_OUT_L<15>
AUD_DOCK_HP_OUT_R<15>
HP_DET<6>
MIC_DET<6>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Audio (HeadPhone Jack and MIC)
16 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Audio (HeadPhone Jack and MIC)
16 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Audio (HeadPhone Jack and MIC)
16 29Friday, April 18, 2008
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U17 Part
2008.3.15 Modify.
2008.3.15 Modify.
R1362K_0402_5%~DR1362K_0402_5%~D
12
R22
422
K_04
02_5
%~D
R22
422
K_04
02_5
%~D 1
2
R135100K_0402_5%~D
R135100K_0402_5%~D
12
R22
322
K_04
02_5
%~D
R22
322
K_04
02_5
%~D
12
R14
72.
2K_0
402_
5%~D
R14
72.
2K_0
402_
5%~D
12
R2140_0402_5%~DR2140_0402_5%~D1 2
C14
510
00P_
0402
_50V
7K~D
C14
510
00P_
0402
_50V
7K~D
1
2
R140200_0402_5%~DR140200_0402_5%~D
12
C1432.2U_0603_6.3V6K~D
C1432.2U_0603_6.3V6K~D
1 2
A
B
JAUD1
TYCO_6-1775390-6
A
B
JAUD1
TYCO_6-1775390-6
57
214
2Q3
115
1Q6
241
2P2
149
1P8
SHLD110SHLD211
SHLD413 SHLD312
R138100K_0402_5%~DR138100K_0402_5%~D
12
C88
10U_0805_10V4Z~D
C88
10U_0805_10V4Z~D
12
R256 68_0402_5%~DR256 68_0402_5%~D1 2
R14
82.
2K_0
402_
5%~D
R14
82.
2K_0
402_
5%~D
12
G
D S
Q242N7002W-7-F_SOT323-3~D
G
D S
Q242N7002W-7-F_SOT323-3~D
2
1 3
G
D S
Q232N7002W-7-F_SOT323-3~D
G
D S
Q232N7002W-7-F_SOT323-3~D
2
1 3
R255 68_0402_5%~DR255 68_0402_5%~D1 2 +
C135 100U_D_6.3VM_R15M~D
+
C135 100U_D_6.3VM_R15M~D1 2
+
C140 100U_D_6.3VM_R15M~D
+
C140 100U_D_6.3VM_R15M~D1 2
R139200_0402_5%~D
R139200_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_5V#
SUS_ON_5V#
SUS_ENABLE
RUN_ENABLE
RUN_ON_5V#
SUS_ON_5V#
RUN_ENABLE
ENAB_3VLAN
ENAB_3VLAN
+5V_ALW +5V_RUN
+15V_ALW+3.3V_ALW2
+3.3V_ALW
+3.3V_RUN+5V_RUN
+15V_ALW+3.3V_ALW2
+3.3V_SUS+3.3V_ALW
+3.3V_SUS
+DOCK_PWR_BAR+DOCK_PWR_BAR
+3.3V_ALW +3.3V_LAN
+3.3V_RUN
+DOCK_PWR_BAR
DK_RUNON<6,7>
DK_SUSON<6>
AUX_ON<6>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE Power
17 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE Power
17 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE Power
17 29Friday, April 18, 2008
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SCREW HOLE
+5V_RUN SourceDesign current: 200mAMax current: 200mA
+3.3V_SUS SourceDesign current: 200mAMax current: 300mA
+3.3V_RUN SourceDesign current: 300mAMax current: 300mA
FIDUCIAL MARK
G
D
S
Q14
2N70
02W
-7-F
_SO
T323
-3~D
G
D
S
Q14
2N70
02W
-7-F
_SO
T323
-3~D
2
13
C86
0.1U
_040
2_16
V4Z~
DC
860.
1U_0
402_
16V4
Z~D
1
2
R196100K_0402_5%~DR196100K_0402_5%~D
12
R284100K_0402_5%~DR284100K_0402_5%~D
12
R171100K_0402_5%~DR171100K_0402_5%~D
12
G
D
S Q12
2N70
02W
-7-F
_SO
T323
-3~D
@
G
D
S Q12
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
Q16SI4800BDY-T1-E3_SO8~DQ16SI4800BDY-T1-E3_SO8~D
S 3D6D5
D7 D8S 2
G4
S 1
C247
0.1U_0402_16V4Z~D
C247
0.1U_0402_16V4Z~D
1
2
C85
0.1U
_040
2_16
V4Z~
DC
850.
1U_0
402_
16V4
Z~D
1
2
CLIP6CLIP_4P9X2P4CLIP6CLIP_4P9X2P4
1
R1691K_0402_5%~D@
R1691K_0402_5%~D@
12
G
D
S Q13
2N70
02W
-7-F
_SO
T323
-3~D
@
G
D
S Q13
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
FD4
FIDUCAL
FD4
FIDUCAL
1
R17
320
K_04
02_5
%~D
R17
320
K_04
02_5
%~D
12
G
D
S
Q20
2N70
02W
-7-F
_SO
T323
-3~D
G
D
S
Q20
2N70
02W
-7-F
_SO
T323
-3~D
2
13
R172100K_0402_5%~DR172100K_0402_5%~D
12
H53P0@H53P0@
1
C82
0.1U
_040
2_16
V4Z~
DC
820.
1U_0
402_
16V4
Z~D
1
2
FD3
FIDUCAL
FD3
FIDUCAL
1
CLIP1EMI-79x138CLIP1EMI-79x138
1
CLIP4CLIP_6P2X2P9CLIP4CLIP_6P2X2P9
1
C2484700P_0402_25V7K~DC2484700P_0402_25V7K~D
1
2
H93P0@H93P0@
1
G
D
S
Q27
2N7002W
-7-F_SOT323-3~D
G
D
S
Q27
2N7002W
-7-F_SOT323-3~D
2
13
S
GD
Q26SI3456BDV-T1-E3_TSOP6~D
S
GD
Q26SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
Q22SI4800BDY-T1-E3_SO8~DQ22SI4800BDY-T1-E3_SO8~D
S 3D6D5
D7 D8S 2
G4
S 1
G
D
S Q18
2N70
02W
-7-F
_SO
T323
-3~D
@
G
D
S Q18
2N70
02W
-7-F
_SO
T323
-3~D
@
2
13
FD2
FIDUCAL
FD2
FIDUCAL
1
H83P0@H83P0@
1
C80
0.1U
_040
2_16
V4Z~
DC
800.
1U_0
402_
16V4
Z~D
1
2
R1681K_0402_5%~D@
R1681K_0402_5%~D@
12
H73P0@H73P0@
1
R19
820
K_04
02_5
%~D
R19
820
K_04
02_5
%~D
12
H63P0@H63P0@
1
C70
0.1U
_040
2_16
V4Z~
DC
700.
1U_0
402_
16V4
Z~D
1
2
R17
020
K_04
02_5
%~D
R17
020
K_04
02_5
%~D
12
CLIP3CLIP_4P9X2P4CLIP3CLIP_4P9X2P4
1
H13P0@H13P0@
1
C16
647
00P_
0402
_25V
7K~D
C16
647
00P_
0402
_25V
7K~D
1
2
R285470K_0402_5%~DR285470K_0402_5%~D
12
R197100K_0402_5%~DR197100K_0402_5%~D
12
FD5
FIDUCAL
FD5
FIDUCAL
1
Q11SI4800BDY-T1-E3_SO8~DQ11SI4800BDY-T1-E3_SO8~D
S 3D6D5
D7 D8S 2
G4
S 1
G
D
SQ282N7002W-7-F_SOT323-3~D
G
D
SQ282N7002W-7-F_SOT323-3~D
2
13
H11H_1P3X3P3N@H11H_1P3X3P3N@
1
C250
0.1U_0402_16V4Z~D
C250
0.1U_0402_16V4Z~D
1
2
R1941K_0402_5%~D@
R1941K_0402_5%~D@
12
H165P1N@H165P1N@
1
FD1
FIDUCAL
FD1
FIDUCAL
1
CLIP2CLIP_4X2P4CLIP2CLIP_4X2P4
1
FD6
FIDUCAL
FD6
FIDUCAL
1C
2464.7U
_0805_10V4Z~DC
2464.7U
_0805_10V4Z~D
1
2
C16
210
U_0
805_
10V4
Z~D
C16
210
U_0
805_
10V4
Z~D
1
2
G
D
SQ152N7002W-7-F_SOT323-3~D
G
D
SQ152N7002W-7-F_SOT323-3~D
2
13
C16
710
U_0
805_
10V4
Z~D
C16
710
U_0
805_
10V4
Z~D
1
2
H23P0@H23P0@
1
C249
10U_0805_10V4Z~D
C249
10U_0805_10V4Z~D
1
2
H33P0@H33P0@
1
CLIP5CLIP_6P2X2P9CLIP5CLIP_6P2X2P9
1
R286
200K_0402_5%~D
R286
200K_0402_5%~D
12
R283100K_0402_5%~DR283100K_0402_5%~D
12
C87
0.1U
_040
2_16
V4Z~
DC
870.
1U_0
402_
16V4
Z~D
1
2
C16
347
00P_
0402
_25V
7K~D
C16
347
00P_
0402
_25V
7K~D
1
2
C16
410
U_0
805_
10V4
Z~D
C16
410
U_0
805_
10V4
Z~D
1
2
G
D
SQ212N7002W-7-F_SOT323-3~D
G
D
SQ212N7002W-7-F_SOT323-3~D
2
13
H143P8@H143P8@
1
H103P0@H103P0@
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_PSID DOCK_PS_ID
+DOCK_DC_IN_SS
DOCK_PSID
+DOCK_DC_IN
+DOCK_DC_IN_SS
+DOCK_SDC_IN+DOCK_PWR_BAR
+3.3V_ALW+5V_ALW
+5V_ALW+5V_ALW
+DOCK_DC_IN
+DOCK_DC_IN_SS
+5V_ALW
+5V_ALW
+DOCK_DC_IN 5V_3V_REF+3.3V_ALW
+DOCK_DC_IN
NB_DET#<5>
DOCK_AC_OFF<5>
DOCK_DCIN_IS- <5>
DOCK_DCIN_IS+ <5>
ACAV_DOCK_SRC# <5>
DOCK_PS_ID <5>
PS_ID_DISABLE# <6>
ACAV_IN_DOCK <6>
+NBDOCK_DC_IN_SS <5>
DOCK_DET_1 <5>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power DC-DC
18 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power DC-DC
18 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power DC-DC
18 29Friday, April 18, 2008
Compal Electronics, Inc.
Dock DC_IN
Dock PS_ID Detector
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
This Capacitor should beused only as last resortfor EMI suppression.Capacitance should be assmall as possible.
2V* 100K/ (100K+32.4K)=1.51V17.8V*21.5K/(232K+21.5K)= 1.51V
1. Populated PR682. Reserve delay circuir, no stuff.
PR3
4.7K
_080
5_5%
~DPR
34.
7K_0
805_
5%~D
12
G
D
S
PQ10
RH
U00
2N06
_SO
T323
G
D
S
PQ10
RH
U00
2N06
_SO
T323
2
13
PR21
100K
_040
2_1%
~DPR
2110
0K_0
402_
1%~D
12
PQ2 P_FDS6681Z_SO8~DPQ2 P_FDS6681Z_SO8~D
32
4
1
5
PC41
100P
_040
2_50
V8J
PC41
100P
_040
2_50
V8J
12
PR16
10K_
0402
_1%
~DPR
1610
K_04
02_1
%~D1
2
G
D S
PQ12FDV301N_NL_SOT23-3~D
G
D S
PQ12FDV301N_NL_SOT23-3~D
2
1 3
2
1 3
PQ5NTR4502PT1G_SOT23-3~D
2
1 3
PQ5NTR4502PT1G_SOT23-3~D
2
1 3
PR14
323
2K_0
402_
1%~D
PR14
323
2K_0
402_
1%~D
12
PR9100K_0402_1%~D
PR9100K_0402_1%~D
12
PQ6A
IMD
2AT-
108_
SC74
-6~D
PQ6A
IMD
2AT-
108_
SC74
-6~D
5
16
PR7
22K_
0402
_1%
~DPR
722
K_04
02_1
%~D 1
2
PQ19B
2N7002DW-T/R7_SOT363-6~D
@PQ19B
2N7002DW-T/R7_SOT363-6~D
@
3
5
4
PR8
10K_
0402
_1%
~DPR
810
K_04
02_1
%~D
12
PR10.01_2512_1%~D
PR10.01_2512_1%~D
4
2
1
3 PC1
0.1U
_060
3_50
V4Z~
DPC
10.
1U_0
603_
50V4
Z~D
12
PR180_0402_5%~D@
PR180_0402_5%~D@1 2
PC6
0.02
2U_0
805_
50V7
K~D
PC6
0.02
2U_0
805_
50V7
K~D
12
PR641K_0402_5%~D
@PR641K_0402_5%~D
@
12
PR11
240K
_040
2_5%
~DPR
1124
0K_0
402_
5%~D
12
PR62200K_0402_5%~D
@ PR62200K_0402_5%~D
@
12
PD1
VZ06
03M
260A
PT_0
603
@
PD1
VZ06
03M
260A
PT_0
603
@
1
2
CB
E
PQ13PMBT3904_SOT23~D
CB
E
PQ13PMBT3904_SOT23~D
2
31
PR6540.2K_0402_1%~D
@PR6540.2K_0402_1%~D
@ 12
PR19
2.2K
_040
2_5%
~DPR
192.
2K_0
402_
5%~D
12
PR17
56K_
0402
_5%
~NPR
1756
K_04
02_5
%~N
12
PU11ALM393DR_SO8~DPU11ALM393DR_SO8~D
IN+3
IN-2O 1
P8
G4
FOX_JPD113D-DB570-7F
PJPDC1
FOX_JPD113D-DB570-7F
PJPDC1
DETECT 5
DC+_1 1
DC+_2 2
DC-_1 3
DC-_2 4GND_16
GND_27
GND_38
GND_49
G
D
S
PQ18RHU002N06_SOT323
G
D
S
PQ18RHU002N06_SOT3232
13
G
D
SPQ11
NTS4001NT1G_SC70-3
G
D
SPQ11
NTS4001NT1G_SC70-3
2
13
PR54
0_0402_5%~D
PR54
0_0402_5%~D
12
PR6
1M_0
402_
5%~D
PR6
1M_0
402_
5%~D 1
2
PC4
0.1U
_060
3_50
V4Z~
DPC
40.
1U_0
603_
50V4
Z~D
12
PD6
DA2
04U
_SO
T323
~DPD
6D
A204
U_S
OT3
23~D 23
1
PD4
DA2
04U
_SO
T323
~DPD
4D
A204
U_S
OT3
23~D 23
1
PR58100K_0402_5%~DPR58100K_0402_5%~D1
2
PR1421M_0402_1%~D
PR1421M_0402_1%~D1 2
PR46100K_0402_5%~DPR46100K_0402_5%~D1
2
PR56100K_0402_5%~DPR56100K_0402_5%~D1
2
PR14
432
.4K_
0402
_1%
~DPR
144
32.4
K_04
02_1
%~D
12
PC2
0.1U
_060
3_25
V7K~
D@
PC2
0.1U
_060
3_25
V7K~
D@
12
PC42
100P
_040
2_50
V8J
PC42
100P
_040
2_50
V8J
12
PQ3A
IMD
2AT-
108_
SC74
-6~D
PQ3A
IMD
2AT-
108_
SC74
-6~D
5
16
G
D
SPQ8RHU002N06_SOT323
G
D
SPQ8RHU002N06_SOT323
2
13
G
D
S
PQ9RHU002N06_SOT323
G
D
S
PQ9RHU002N06_SOT3232
13
2
1 3
PQ4NTR4502PT1G_SOT23-3~D
2
1 3
PQ4NTR4502PT1G_SOT23-3~D
2
1 3
PQ1 P_FDS6681Z_SO8~DPQ1 P_FDS6681Z_SO8~D
32
4
1
5
PC7
0.1U
_060
3_50
V4Z~
DPC
70.
1U_0
603_
50V4
Z~D
12
PR10
12.1
K_04
02_1
%~D
PR10
12.1
K_04
02_1
%~D1
2
PR67
0_0402_5%~D
@ PR67
0_0402_5%~D
@1 2
PR59200K_0402_5%~D@ PR59200K_0402_5%~D@
12
PU11BLM393DR_SO8~DPU11BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PL1FBMJ4516HS720NT 1806~D
PL1FBMJ4516HS720NT 1806~D
1 2
PR55
0_04
02_5
%~D
@
PR55
0_04
02_5
%~D
@
12
PR660_0402_5%~D
PR660_0402_5%~D
12
PR60200K_0402_5%~D@ PR60200K_0402_5%~D@
12
PD10B540C~D
PD10B540C~D
2 1
PQ19A2N7002DW-T/R7_SOT363-6~D
@PQ19A2N7002DW-T/R7_SOT363-6~D
@6
12
PD3RB751V_SOD323~D
PD3RB751V_SOD323~D
21
PL5FBMJ4516HS720NT 1806~D
PL5FBMJ4516HS720NT 1806~D
1 2
PR22
10K_
0402
_1%
~DPR
2210
K_04
02_1
%~D 1
2
PQ6B
IMD
2AT-
108_
SC74
-6~D
PQ6B
IMD
2AT-
108_
SC74
-6~D
2
43
PC3
0.01
U_0
603_
25V7
K~D
PC3
0.01
U_0
603_
25V7
K~D
12PR
224
0K_0
402_
5%~D
PR2
240K
_040
2_5%
~D
12
PR1443K_0402_5%
PR1443K_0402_5%
12
PR2033_0402_5%~D
PR2033_0402_5%~D
1 2
PC43
0.04
7U_0
603_
16V4
Z~D
@
PC43
0.04
7U_0
603_
16V4
Z~D
@
12
PR4
1M_0
402_
5%~D
PR4
1M_0
402_
5%~D1
2
PD12RB751V_SOD323~D@ PD12RB751V_SOD323~D@
21
PD5
SM24
_SO
T23
@
PD5
SM24
_SO
T23
@
2 31
PD2
VZ06
03M
260A
PT_0
603
@
PD2
VZ06
03M
260A
PT_0
603
@
1
2
PR13
30K_
0402
_1%
~DPR
1330
K_04
02_1
%~D1
2
PR63
100K
_040
2_5%
~D
@
PR63
100K
_040
2_5%
~D
@
12
PC5
10U
_120
6_25
V6M
~DPC
510
U_1
206_
25V6
M~D
12
PR1450_0402_5%~D
PR1450_0402_5%~D1 2
PR24
15K_
0402
_1%
~DPR
2415
K_04
02_1
%~D
12
PQ3B
IMD
2AT-
108_
SC74
-6~D
PQ3B
IMD
2AT-
108_
SC74
-6~D
2
43
G
D
S
PQ7RHU002N06_SOT323
G
D
S
PQ7RHU002N06_SOT3232
13
PC8
0.04
7U_0
402_
16V5
K~D
PC8
0.04
7U_0
402_
16V5
K~D
12
PR12
100K
_040
2_1%
~DPR
1210
0K_0
402_
1%~D1
2
PR15
16.5
K_04
02_1
%~D
PR15
16.5
K_04
02_1
%~D1
2
PR57100K_0402_5%~D
PR57100K_0402_5%~D
12
PD11
RB751V-40_SOD323~D
PD11
RB751V-40_SOD323~D
12
PR23100_0402_5%~D@
PR23100_0402_5%~D@
1 2
PL6FBMJ4516HS720NT 1806~D
PL6FBMJ4516HS720NT 1806~D
1 2
PL2FBMJ4516HS720NT 1806~D
PL2FBMJ4516HS720NT 1806~D
1 2
PR5
4.99
K_04
02_1
%~D
PR5
4.99
K_04
02_1
%~D
12
PR610_0402_5%~D@PR610_0402_5%~D@
12
PC45
10U
_120
6_25
V6M
~D
@
PC45
10U
_120
6_25
V6M
~D
@
12
PR680_0402_5%~DPR680_0402_5%~D
12
PU1
LM43
1SBC
MF_
SOT2
3-3
PU1
LM43
1SBC
MF_
SOT2
3-3
12
3
PR690_0402_5%~D@
PR690_0402_5%~D@
12
PR14
621
.5K_
0402
_1%
~DPR
146
21.5
K_04
02_1
%~D
12
PR14
710
0K_0
402_
1%~D
PR14
710
0K_0
402_
1%~D
12
PC44
10U
_120
6_25
V6M
~D
@
PC44
10U
_120
6_25
V6M
~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3.3V_ALW_UGATE
+3P3V_+5V_PWR_SRC
+5V_ALWP
+5V_ALW_PHASE
+5V_ALW_BOOT
+3.3V_ALWP_REFIN2
EN_3
V_5V
+3.3V_ALW2
+5V_ALW_LGATE
+5V_ALW_UGATE+3.3V_ALW_PHASE
EN_3V_5VEN_3V_5V
+3.3V_ALW_BOOT
POK1
+3.3V_ALW_LGATE
POK1
POK2
POK2+3.3V_ALWP
+5V_ALW2
+DOCK_PWR_BAR
+5V_ALWP
+5V_VCC1
+3.3V_ALWP
+15V_ALWP
+3.3V_ALWP
+15V_ALW
+5V_ALW+5V_ALWP
+3.3V_ALW
+5V_
ALW
2
+15V_ALWP
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
5V_3V_REF
GNDA_3V5V
+3.3V_ALW2
GNDA_3V5V
+3.3V_ALWP
DC1_PWR_SRC
GNDA_3V5V
GNDA_3V5V
VTT_PWRGD <6>
DOCK_POR_RST#<5>
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power 3V/5V
19 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power 3V/5V
19 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
Power 3V/5V
19 29Friday, April 18, 2008
Compal Electronics, Inc.
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP
5 Volt +/-5%Design current: 4.7AMax current:6.7A OCP_min= 7.14A
3.3 Volt +/-5%Design current: 0.4AMax current: 0.57A OCP_min= 2.2A
(100mA,20mils ,Via NO.=1)
(5A,200mils ,Via NO.=10)
(7.5A,300mils ,Via NO.=15)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these CAPsclose to FETs
Place these CAPsclose to FETs
No Install for ISL6236Install 10 ohm for MAX8778
Use 0.1uF for ISL6236.Use 1uF for MAX8778.
The p-p inductor ripple current/2=1.4AVILIM1/10= 5uA*110K=55mVconsider 20% tolerance,55mV*80%=44mV 55mV*120%=66mVOCP(min)=44mV/(5.9mOHM (Rds(on, typ)*1.3)+1.4A=7.14AOCP(max)=66mV/(5.9mOHM*1.3)+1.4A=10A
The p-p inductor ripple current/2=0.46AVILIM1/10= 5uA*51K=25.5mVconsider 20% tolerance,25.5mV*80%=20.4mV 25.5mV*120%=30.6mVOCP(min)=25.5mV/(16mOHM (Rds(on, typ)*1.3)+0.46A=1.68AOCP(max)=30.6mV/(16mOHM*1.3)+0.46A=1.93A
PR29
0_04
02_5
%~D
PR29
0_04
02_5
%~D 1
2
PR26
0_08
05_5
%~D
PR26
0_08
05_5
%~D
12
PD8BAT54SW-7-F_SOT323~D
PD8BAT54SW-7-F_SOT323~D
3
21
PC10
10U
_120
6_25
V6M
~D@
PC10
10U
_120
6_25
V6M
~D@
1
2
PC40
680p
_060
3_50
VNPO
~DPC
4068
0p_0
603_
50VN
PO~D
12
PR51
3.3K
_120
6_5%
~D@
PR51
3.3K
_120
6_5%
~D@
12
PC37
0.1U
_060
3_25
V7K~
D@
PC37
0.1U
_060
3_25
V7K~
D@
12
PC30
0.1U_0603_25V7K~D
PC30
0.1U_0603_25V7K~D1 2
PC201U_0402_6.3V6K~DPC201U_0402_6.3V6K~D1
2
PC17
4.7U
_080
5_10
V6K~
DPC
174.
7U_0
805_
10V6
K~D
12
PC27
0.1U
_060
3_25
V7K~
DPC
270.
1U_0
603_
25V7
K~D
12
PQ14FDS8880_NL_SO8~DPQ14FDS8880_NL_SO8~D
S3
D6
D5
D7
D8
S2
G 4
S1
PC19
0.1U
_060
3_25
V7K~
DPC
190.
1U_0
603_
25V7
K~D
12 PR31
0_0402_5%~D@PR310_0402_5%~D@
1 2
PR43
100K
_040
2_5%
~DPR
4310
0K_0
402_
5%~D
12
PR50
3.3K
_120
6_5%
~D@
PR50
3.3K
_120
6_5%
~D@
12
PR28
0_04
02_5
%~D
@
PR28
0_04
02_5
%~D
@
12
PC9
10U
_120
6_25
V6M
~D@
PC9
10U
_120
6_25
V6M
~D@
1
2
PJP2
PAD-OPEN 2x2m~D
PJP2
PAD-OPEN 2x2m~D
2 1
PR391_0603_5%~D
PR391_0603_5%~D
1 2
PC33
0.1U_0603_25V7K~D
PC33
0.1U_0603_25V7K~D1 2
PD9
BAT54CW_SOT323-3~D
PD9
BAT54CW_SOT323-3~D
2 3
1
PR381_0603_5%~D
PR381_0603_5%~D1 2
PC12
10U
_120
6_25
V6M
~DPC
1210
U_1
206_
25V6
M~D
1
2
PR32
0_04
02_5
%~D
@
PR32
0_04
02_5
%~D
@
12
PC34
0.1U
_060
3_25
V7K~
DPC
340.
1U_0
603_
25V7
K~D
12
PJP3
PAD-OPEN1x1m
PJP3
PAD-OPEN1x1m
12
PL38.2UH_FDV0630-8R2M=P3 3.7A_20%
PL38.2UH_FDV0630-8R2M=P3 3.7A_20%
12
PR34110K_0402_1%~D
PR34110K_0402_1%~D1 2
PR41
0_06
03_1
%~D
@PR
410_
0603
_1%
~D@
12
PC39
680p
_060
3_50
VNPO
~DPC
3968
0p_0
603_
50VN
PO~D
12
PC32
0.1U
_060
3_25
V7K~
DPC
320.
1U_0
603_
25V7
K~D
12
PR45
10K_
0402
_1%
~DPR
4510
K_04
02_1
%~D
12
PR36
0_06
03_1
%@
PR36
0_06
03_1
%@
12
PR37
0_06
03_1
%~D
PR37
0_06
03_1
%~D 1
2
PD7BAT54SW-7-F_SOT323~D
PD7BAT54SW-7-F_SOT323~D
3
21
PC18
1U_0
603_
10V6
K~D
PC18
1U_0
603_
10V6
K~D
12
PQ15
FDS6982AS_NL_SO8~D
PQ15
FDS6982AS_NL_SO8~D
S2
1
G22
S1 3G14
D2 8
D2 7
D1
6
D1
5
PC31
0.1U
_060
3_25
V7K~
D@
PC31
0.1U
_060
3_25
V7K~
D@
12
PC14
0.1U
_080
5_50
V7K~
DPC
140.
1U_0
805_
50V7
K~D
12
PC210.1U_0402_10V7K~D
PC210.1U_0402_10V7K~D
1 2
PR2710_0603_5%~D
PR2710_0603_5%~D
12
PR48200K_0402_1%~D
PR48200K_0402_1%~D
12
PC11
10U
_120
6_25
V6M
~DPC
1110
U_1
206_
25V6
M~D
1
2
PC35
2200
P_04
02_5
0V7K
~DPC
3522
00P_
0402
_50V
7K~D
12
PR52
4.7_
1206
_5%
~DPR
524.
7_12
06_5
%~D
12
PR350_0402_5%~D
PR350_0402_5%~D1 2
PC220.1U_0402_10V7K~D
@PC220.1U_0402_10V7K~D
@
12
PC36
2200
P_04
02_5
0V7K
~DPC
3622
00P_
0402
_50V
7K~D
12
PC23
0.1U
_060
3_25
V7K~
DPC
230.
1U_0
603_
25V7
K~D
12
PJP5
PAD-OPEN 4x4m
PJP5
PAD-OPEN 4x4m
1 2
PC15
2200
P_04
02_5
0V7K
~DPC
1522
00P_
0402
_50V
7K~D
12
PU2
MAX8778ETJ+_TQFN32_5X5~D
PU2
MAX8778ETJ+_TQFN32_5X5~D
RE
F1
TON
2V
CC
3O
NLD
O4
RTC
5IN
6LD
O7
LDO
RE
FIN
8
BYP9OUT110FB111ILIM112PGOOD113ON114DH115LX116
BS
T117
DL1
18V
DD
19S
EC
FB20
AG
ND
21P
GN
D22
DL2
23B
ST2
24
LX2 25DH2 26ON2 27PGOOD2 28SKIP# 29OUT2 30ILIM2 31REFIN2 32
PA
D33
PR300_0402_5%~D@
PR300_0402_5%~D@
1 2
PC46
0.1U
_060
3_25
V7K~
DPC
460.
1U_0
603_
25V7
K~D1
2
PJP4
PAD-OPEN 4x4m
PJP4
PAD-OPEN 4x4m
1 2
PR25
0_08
05_5
%~D
PR25
0_08
05_5
%~D
12
PQ16FDS6676AS_NL_SO8~DPQ16FDS6676AS_NL_SO8~D
36 578
2
4
1
PJP1
PAD-OPEN 4x4m
PJP1
PAD-OPEN 4x4m
1 2
PC13
2200
P_04
02_5
0V7K
~DPC
1322
00P_
0402
_50V
7K~D
12
+
PC29
330U
_D3L
_6.3
VM_R
25~D
+
PC29
330U
_D3L
_6.3
VM_R
25~D
1
2
PR53
4.7_
1206
_5%
PR53
4.7_
1206
_5% 1
2
PR4939K_0402_1%~DPR4939K_0402_1%~D
12
PR47
0_04
02_5
%~D
PR47
0_04
02_5
%~D
12
PL43.3UH_SIL1045R-3R3PF_8.2A_30%
PL43.3UH_SIL1045R-3R3PF_8.2A_30%1 2
+
PC24
330U
_D3L
_6.3
VM_R
25~D
+
PC24
330U
_D3L
_6.3
VM_R
25~D
1
2
PD13
RB751V_SOD323~D
PD13
RB751V_SOD323~D
2 1
PC16
0.1U
_080
5_50
V7K~
DPC
160.
1U_0
805_
50V7
K~D
12
PC26
0.1U
_060
3_25
V7K~
DPC
260.
1U_0
603_
25V7
K~D
12
PC38
0.1U
_060
3_25
V7K~
D@
PC38
0.1U
_060
3_25
V7K~
D@
12
PR40
0_06
03_1
%~D
PR40
0_06
03_1
%~D 1
2
PC28
0.1U
_060
3_25
V7K~
DPC
280.
1U_0
603_
25V7
K~D
12
+
PC25
330U
_D3L
_6.3
VM_R
25~D
@
+
PC25
330U
_D3L
_6.3
VM_R
25~D
@
1
2
PR3351K_0402_1%~D<BOM Structure>
PR3351K_0402_1%~D<BOM Structure>1 2
PR44
100K
_040
2_5%
~D@
PR44
100K
_040
2_5%
~D@ 1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-1
20 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-1
20 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-1
20 29Friday, April 18, 2008
Compal Electronics, Inc.
5,9,10,11
ME 9/6 1.Change JP2 symbol from TYCO_48226-1211 to TYCO_48226-0611.2.Change JESATA symbol from TYCO_1759557-2 to TYCO_1909573-3.3.Change JUSB1 symbol from TYCO_5787617-4 to Foxconn_UB11123-M4-4F.4.Change JP3 symbol from TYCO_1840021-1 to SUYIN_020181MHBK4M508ZA.5.Change page from P09-USB Port x6 + E-SATA to P09-USB Port x3 and PS2x2.6.Change page from P10-RJ45 and PS2x2 to P10-E-SATA+USB Port x1. 7.Add page P11-RJ45+USB Portx2.
Customer Request:1.Change Y TO B(6pin) Connector for POWER BOARD. 2.Change E-SATA+USB Connector.3.Change TREBLE USB Connector.4.Change RJ45+2USB Connector.
DELL14
Item 2No-pop the Link Detect Circuit in Audio Section:U20, U21, U22, U23, U24, U25, U26, U27
Item 4Pop 1Mohm resistors on USB crystal circuits (R68 and R77)Item 5No-pop the 47K resistors (R215 and R216) on USB hub reset lines since this signal is pulled low by the LPC before 3V_SUS comes up.
15 9/5 DELL15
9,10,11 9/6DELL
16
8 9/6 DELL17
NO-POP the U20, U21, U22, U23, U24, U25, U26, U27,C147,C148,C149,C150,C151,C152,R143,R144,R145,R146 partsGG list
GG list Item 3USB Cost Reduction:No-pop ESD diodesOnly use 4 TPS2066 switchesOnly use 4 150uF caps
1.JESATA use TPS2066 x1 and 150uF x1.2.JUSB1 use TPS2066 x2 and 150uF x2.3.JP3 use TPS2066 x1 and 150uF x1.4.No-pop ESD Diodes.
GG listPop 1Mohm resistors R68 and R77.
DELL9/6GG list8 NO_Pop the 47k resistors R215 and R216.
Item 8Please remove DC blocking caps C242 and C243 at U42.These caps are already present on Roush near the docking connector. Please verify.
GG list 9/6 DELL10 Remove it.
18
19
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
Remove FUSE (LF453) Parts.EE 9/6 COMPAL Remove it.20 9,10,11
21 EE15 9/11 COMPAL 1.Headphones and Microphone detect wrong.2.Audio input signal short ground.
1.Change HP_DET and MIC_DET to pulled up.2.Change JAUD1.9 from Ground to NC pin.
22 6 GG list 9/12 DELL Item10Disconnect PCI_RST# from pin 26 on LPC. We will use GPIO27 from the LPC to controlthe reset of LPC bus. Name the net SIO_RESET#.
Modify OK.Net:SIO_RESET# Add pull down R183 resistor.
23 9schematic review 9/12 Compal (PS2)These pull up resistors are already present on
Roush.NO_Pop the 10K resistors R105,R106,R107,R108.
24 5,10,15schematic review 9/17 Compal OR and NOTGate Power add CAPS to GND 1.Add caps C203,C204,C211,C212 to GND.
2.Change caps packaged size to 0402.
25 11schematic review 9/12 Compal DOCK_LED_10#,DOCK_LED_100#
Change current limit resistors R103,R104 change to 150 ohm.
26 11schematic review 9/12 Compal JP3 connector by pass caps alyeady present
SUYIN_020181MHBK4M508ZA NO_pop the 0.01U caps C209,C210.
27 6schematic review 9/12 Compal Update DOCK_ID to X02 R43 change to No_pop;R52 change to pop.
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Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-2
21 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-2
21 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-2
21 29Friday, April 18, 2008
Compal Electronics, Inc.
12 9/17No-pop the R243,R109 resistors;POP the D2 diode F4 fuse.Item 11
Please populate the fuse and the diode and no-pop the 0 ohm resistors at the VGA connector.
DELL28
Item 12Please populate the fuse and the diode and no-pop the 0 ohm resistors at the DP connector.
Item 15Please no-pop R282 since it is popped on Roush/Maybach.
Add new EE PIR-3 page.
13 9/17 DELL29
14 9/17 DELL30
14 9/17 DELL31
No-pop the R244,R117 resistors;POP the D7 diode F2 fuse.GG list
GG list Item 13Please populate the fuse and the diode and no-pop the 0 ohm resistors at the DP connector.
No-pop the R245,R124 resistors;POP the D9 diode F3 fuse.
GG listNo-pop the R282 resistor.
COMPAL9/17EE22 Add Page22 EE PIR-3.32
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
GG list
Layout issue Item34 Add no-pop ESD diode between AGND and GND at the audio connector for ESD purposes.
9/19 DELL15 GG list Add D8 ESD diode between AGND and GND at Audio connector.
33
Layout issue item 37AUD_DOCK_HP_OUT - Traces change reference planes between AGND and GND. They need to maintain the same reference plane throughout their runs. The traces also do not reference planes for 100 mils. If not, add and populate 0.1uF capacitors where the traces cross the moats. See attached picture hp_crossing the moat.jpg for moat crossings and bypass locations, circled in red
9/1915 Add the C165,C183 0.1uF caps.34 GG list DELL
8 GG list35 9/20 No-pop the R72,R73 resistors.keep one pair of the pull-up resistor for the USB SMBus.
Item 19We need to no-pop one pair of the pull-up resistors for the USB SMBus. There are two pairs of pull-ups on this bus.
DELL
13 GG list 9/20 Item 17Need to no pop R278 (CA_DET pull down). The system side has(/is adding) a pull down for this net too. For now no pop, but in the future - may remove.
33 DELL No-pop the R278 resistor (CA_DET pull down).
13,14 GG list 9/20 Item 18Need to no pop R277, R280 (HPD pull downs). The system side has pull downs for these nets. For now no pop, after testing remove.
34 DELL No-pop the R277,R280 resistors (HPD pull downs).
6,836 EE 11/5 Test Crystal EA fail.modify the circuit. Recommend circuit:1.Change Y1 part from 24MHZ_20PF_1BX24000BK1A~D to 24MHZ_12PF_1BX24000CE1B~D.2.Change C27 part from 18P_0402_50V8J~D to 15P_0402_50V8J~D.3.Change C28 part from 18P_0402_50V8J~D to 12P_0402_50V8J~D.4.Change C51,C63 part from 12P_0402_50V8J~D to 15P_0402_50V8J~D.5.Change C50,C62 part from 12P_0402_50V8J~D to 18P_0402_50V8J~D.
Benson
37 13 EE 11/06 Benson DVI port A and port b on DVI board location wrong. Modify JP4 board to board connector port A,B location.
4layer X00
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Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-3
22 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-3
22 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-3
22 29Friday, April 18, 2008
Compal Electronics, Inc.
10 EE 11/07 Net: SATA_SBTX_C_DRX_P_1 and SATA_SBTX_C_DRX_N_1 point add series connection R308 470ohm.
Test SATA EA fail.modify the circuit.Benson38
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
39 5 DELL 11/07 Benson Modify E-DOCK PIN OUT Add JP1 pin41 pin net: +DOCK_DC_IN_SS.source by P18-PWR_Dock DC_IN/PS_ID.
40 15 COMPAL 11/08 Benson Audio SM2602 DVSS,AVSS,HPVSS noise. Change L28,L29,L30 part to 0 ohmresistors .
41 6 COMPAL 11/08 Benson Change DOCK ID to X03. No-pop the R51 resistor;Pop the R42 resistor.
42 6 11/09 Benson U39, U40 use a different schematic symbol for an OR gate then the U59 from Roush schematics. Compal needs to standardize on one symbol for an OR gate. What is being done to prevent the symbol issues seen on Roush? This needs to be resolved before PT gerber.
Change U39,U40 symbol to SN74AHC1G32DCKR_SC70-5~D best on Roush.GG list
43 6 11/12 Benson No-pop Duplicate Pull-up Resistors on APR Please no-pop the following resistors since they are pulled up on the system side when docked:R7,R8,R9,R231.
SCH164847
44 6 11/12 Benson Fix DVI Pinout Issue on APR and DVI Daughter Card. There is a pin define error on the connector pinouts of both APR and DVI daughtercard that is preventing DVI display.The pinout on JP4 (APR) and JP1 (DVI board) need to change for proper DVI display on both channels.DVI Port A should be above Display Port ADVI Port B should be above Display Port B.
SCH164844
45 5 11/13SCH164880 Benson Passing 3V_ALW to Power Board we add Q6 at DOCKED_LED# net and Q7 at BREATH_PWR_LED# net.
46 6 COMPAL 11/13 Benson Change connector part. Change JP2 symbol from MOLEX_48226-0611 to MOLEX_48227-0611.
47 6 SCH164886 11/13 Benson Please add a comparator circuit, as outlined in separate email.The output of this comparator circuit will be named ACAV_IN_DOCK and needs to be routed to a Dock EC GPIO.Use GPIO11 on the APR.and Remove the R186 part.
Add Comparator Circuit for AC_AVIN_DOCK.
48 5 COMPAL 11/13 Benson Follow the POWER PIR2 item 2. Change net "ACAV_IN_DOCK#" to "ACAV_DOCK_SRC#"
49 17 COMPAL 11/13 Benson Add EMI CLIP. ADD CLIP2~CLIP6 Part.
50 15 COMPAL 11/14 Benson Audio EMI test fail.
51 16 COMPAL 11/15 Bill MIC bias resistor needs to change from 4.99 ohm to40Kohm at R139.
Change R139 from 4.99ohm to 40.2Kohm.
52 13,14 COMPAL 11/15 Bill Change F2, F3 to 3A_6VDC_2920SMD300 Change F2, F3 to 3A_6VDC_2920SMD300
53 6,8,16 COMPAL 11/19 Benson Have found that high Resistance values at the gate of the SMBus isolation FETs may affect the Vgs turn-on volatge, causing the SMBus to disconnect unexpectedly because the isolation FETs are not turning on.
Change the R65,R66,R214 from 10K to 0ohm
1.Please reserve R71,R79 0 ohm at Dock connector side and AC termination at the End for I2S_BCLK and I2S_12MHz.2. I2S_BCLK parallel R234 22 ohm and C195 10P to GND.2. I2S_12MHZ parallel R235 22 ohm and C199 10P to GND.
54 13, 14 COMPAL 12/13 Jake Lee Customer Request:1.Change resistor for SN75DP122_QFN56~D.2.Change resistor for SN75DP122_QFN56~D.
1. Change part R202 from 5.11Kto 3.48K.2. Change part R208 from 5.11Kto 3.48K.
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Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-4
23 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-4
23 29Friday, April 18, 2008
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet ofLA-3954P X03
EE PIR-4
23 29Friday, April 18, 2008
Compal Electronics, Inc.
13, 14, 15
COMPAL 12/131. Change part F2 from 3A_6VDC to 1.1A_6V.
Customer Request:1.Change FUSE part2.Change SSM2603CPZ
Jake Lee55
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
2. Change part F3 from 3A_6VDC to 1.1A_6V.3. Change part U17 from SSM2603 to SSM2603.
5 COMPAL 12/1956 Jake Lee Customer Request:1. Change resistor for TYCO_1840015-1. 1. Change part JP3 from SUYIN_020181MHBK4M508ZA to TYCO_1840015-1.
16 COMPAL 12/2757 Jake Lee Headphone channels of right and left are exchanging. Exchange nets of between the AUD_COCK_HP_OUT_R and the AUD_DOCK_HP_OUT_L.
58 5 COMPAL 12/27 Jake Lee The DOCK_POR_RST# signal will now be used to control the power to the dock.
Add new net of DOCK_POR_RST# to JP1.140.
59 6 COMPAL 01/07 Benson Change DOCK ID to X02. No-pop the R42 resistor;Pop the R51 resistor.
60 13,14 DELL 01/15 Benson Base on Roush Discrete Graphics changes for DP. 1. Add 10KOhm POP the PU (R309) and NO-POP the PD (R311) on DPA_DOCK_AUX#.2. Add 10KOhm NO-POP the PU (R310) and POP the PD (R312) on DPA_DOCK_AUX.3. Add 10KOhm POP the PU (R313) and NO-POP the PD (R315) on DPB_DOCK_AUX#.4. Add 10KOhm NO-POP the PU (R314) and POP the PD (R316) on DPB_DOCK_AUX.
61 5 DELL 01/14 Benson The Docking pinout will change to move the DOCK_DET# and SLICE_BAT_PRES# pins to minimize the false detection of an attached dock or slice battery when the system is inserted at an angle
Swap pin141 and pin143 on connector.Swap pin142 and pin144 on connector.
62 11 DELL 01/15 Benson Customer Request Change L31 to 0 ohm resistor for LOM CT signaling
63 9,10,11 DELL 01/15 Benson Change COMPAL part. Change U7,U33,U37,U45 from TPS2066DR_SO8~D to TPS2066ADR_SO8~D0 part.
64 7 COMPAL 01/16 Benson Parallel capactior change to 0402 capacitor... Change CP1,CP2,CP3,CP4 from Parallel capactior to (C259-C274) 0402 capactior.
65 12 COMPAL 01/29 Benson Change the ports for CRT EA report. Add 2.2pF capacitor to C97~C102 and change L14~L16 to 22 ohm bead(BK1608HS220T_0603~D).
4layer X02
4layer X02
4layer X02
4layer X02
4layer X02
4layer X02
4layer X02
4layer X02
4layer X02
4layer X02
4layer X02
4layer X0212 COMPAL 01/2466 Benson Customer Request:1.Change FUSE part 1. Change part F4 from 3A_6VDC to 1.1A_6V.
67 15 DELL 2/12 Benson For customer request.Power supply filtering for U17 the SSM2603.
1.Change part L21,L25from BK1608LM182-T_0603~D to BLM18EG601SN1D_2P~D.2.Pin3 and pin5 of U19 are combined together,and remove part C133,C187and add L25 to keep the power supply clean.3.Pin12 and pin18 of U19 are combined together,and remove part C124,C125.Change C126,C129,C131 from 1uF to 10U_0805_10V4Z~D.
4layer X02
DELL 2/14 Benson For customer request.Based on a review of the DP spec.we areconsidering making changes to the DP connector power delivery, like adding a PTC fuse and bulk capacitance on the system and dock side.
1.Change part F2 and F3 from 1.1A_6V_1812L110PR~D to 3A_6VDC_2920SMD300.2. Add part C128 10U_0805_10V4Z~D at +DPA_VCC net3. Add part C133 10U_0805_10V4Z~D at +DPB_VCC net
4layer X0268 13,14
DELL 2/14 Benson69 13,144layer X02
DP BOM Changes to Support PT SMT R202 and R208 should change to 3.83K for passing DP eye.
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Benson70
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
4layer X0213,14,16 02/19DELL
Benson DP BOM Changes to Support PT SMT R202 and R208 should change to 3.83K for passing DP eye. 4layer X0213, 14 02/19DELL71
For customer request.Audio Output protection.
1. Add D35 part.anode to the output Pin13(LHOUT) and the cathode to pin 12 HPVDD. 2. Add D36 part.anode to the output Pin14(RHOUT) and the cathode to pin 12 HPVDD. 3. Add one capacitor of around 300pF in parallel with R223 and do the same for R224, and place these 2 capacitors be close to the U17.
Benson02/1915,16 DELL724layer X02
02/19 Benson For customer request.Change CRT FUSE to No_pop.73 12 DELL 4layer X02F4 change to No_pop;R109 change to pop.
02/1974 15,16 Benson Recommended by ADIADI 4layer X021.Delete the R23~R26 Part 0_0603_5%~D.2.Delete the C165,C183 Part 0.1U_0402_16V7K~D.3.Delete the L28~L30 Part 0_0603_5%~D.4.Add the C134 Part 0.1U_0402_16V7K~D at +3.3V_RUN.5.Add the C132 Part 0.1U_0402_16V7K~D at +3.3V_AVDD.6.Add the R92 Part 0_0402_5%~D at AGND and DGND.7.Change the C275 net from HP_SPK_L1 to AUD_DOCK_HP_OUT_L.8.Change the C276 net from HP_SPK_R1 to AUD_DOCK_HP_OUT_R.9.Change the C145 net from MIC3 to MIC2.10.Delete the D26,D27 Part PRTR5V0U2X_SOT143-4~D.11.Delete the L24 Part BLM18AG121SN1D_0603~D.12.Delete the R225~R226 Part 0_0402_5%~D.
1.Add C165 0.1uF on SIO_RESET#(near chip side).2.Add C183 and C183 0.1uF on DP_A_HP and DP_B_HP(near chip side)
4layer X0275 03/046,13,14 COMPAL Benson Enhance ESD test result.
03/1076 Recommended by ADIBensonADI15,16 1.Delete the C134 Part 0.1U_0402_16V7K~D.2.Change the C126,C131 Part from 10U_0805_10V4Z~D to 4.7U_0805_10V4Z~D.3.Change C129 Part from 10U_0805_10V4Z~D to 0.1U_0402_16V7K~D.4.Delete the C275,C276,L23,L22,C137,C138,R141 part.5.Change the R139 from 40.2K_0402_1%~D to 200_0402_1%~D.6.Change the C145,1 net from Mic_2 to DOCK_MICIN.by the way change to 1000PF.
4layer X02
03/1077 13 COMPAL Benson Change the ports for DPa EA report. 1.Change R202 Part from 3.83K_0402_1%~D to 4.02K_0402_1%~D.4layer X02
Customer Request:1.Change Display connector part2.Change Audio connector part
1. Change part JDP1,JDP2 from MOLEX_47272-0001~D to MOLEX_47272-0026.2. Change part JAUD1 from TYCO_1775390-6 to TYCO_6-1775390-6.
COMPAL 03/12 Benson We review audio schematic found Symbol pin define mirror.
1.Modify JAUD1 symbol.4layer X02
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79 13,14 DELL 03/12 Benson Change the ports for DPa an DPb EA report. 1.Change R202 Part from 4.02K_0402_1%~D to 3.48K_0402_1%~D.1.Change R208 Part from 3.83K_0402_1%~D to 3.48K_0402_1%~D. 4layer X02
80 15 COMPAL 03/12 Benson Recommended by ADI 1.Delete R92 Resister AGND Connect DGND2.Change L25 part from 0_0805 to BLM18EG601SN1D_2P~D 4layer X02
81 17 COMPAL 03/12 Benson Modify H14 SCREW HOLE 4layer X021.Change H14 from 3P25 to 3P8.
82 9 COMPAL 03/12 Benson 1.L4 swap PIN define. 4layer X02L4 swap for layout routing issue.
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Benson83
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
4layer X0217 03/13DELL EMI Request
APR and add several 0.1µF capacitance from Vcc to GND and PCI_CLK AC terminal.
1. +DOCK_PWR_BAR net New add: 6*0.1µF C80,C82,C85,C86,C87,C70 at BOT and TOP side.2. PCI_CLK: change BOM: R60 change to 33 ohm, C29 change to 10P
84 Benson17 DELL 03/134layer X02Audio jack pin define correct 1.Swap pin1 and pin4 on JAUD1
2.Swap pin2 and pin3 on JAUD13.Swap pin6 and pin8 on JAUD14.Swap pin5 and pin9 on JAUD1
85 Benson17 DELL 03/14 Change COMPAL part4layer X021.Change C246 part form 4.7U_0603_6.3V4Z~D to 4.7U_0805_10V4Z~D.
Change the ports for CRT EA report. Modify 2.2pF capacitor to C97~C102.86 Benson12 DELL 03/14 4layer X02
1.Improve Dynamic Range on HP and Mic.2.Need to adjust Mic Bias to accommodate Bias current of <750uA3.System noise is effecting the Microphone performance. 4.Need to meet GS Mark Spec5.Improve THD on HP
87 Benson 1.Change L21 to BLM21PG331SN1D.2.Change C136 to 2K_0402_5%~D.3.Connect a cap C88 (10uf) from R136 pin 1 to Analog Ground and connect a resistor R140 (200ohm) from R136 pin 1 to MICBIAS.4.Change C135 & C140 to 100uf and the output resistor R225,R226 values will be 68 Ohms.5.Connect 2 capacitors C186,C187 of 300pF from pin 13 and pin 14 respectively to the analog ground on U17. Please make these Nopop for now.
15,16 ADI 03/15 4layer X02
1.Change the R225,R226 to 68_0402_5%~D.R225,R226 part correctBenson15,1687 03/15ADI4layer X02
4layer X0388 13,14 04/08 Benson Add DP to DP repeater.DELL
4layer X0389 13 DELL 04/08 Benson Remove the U19,U20,U21,U22,U23,U24,U25,U26 part.
Add U46,U47 8121E parts.
Remove the about audio no-pop part.
for TI comments.90 13,14 TI 04/11 Cindy 1.Change pin8 and 9 of PS8121E from AUX_A_CH+/- to DPA_DOCK_AUX/#.2.Change HPD flow to DP connector to PS8121 to DP122 to Dock connector (1)Pin18 JDP1connector feed pin30 PS8121 (HPD_SINK) (2)Pin 7 of PS8121 (HPD) feed pin40 DP122(DP_HPD_SINK) (3)Pin37 DP122 (HPD) feed pin39 docking station connector3.Add R139 and R321 to pull high DDCBUF_EN# of PS8121E.4.remove CA_DET application circuit.
4layer X03
1. C182,C183 should be "no-pop" and the value should change to 0.033uF (0402 pkg). 2. Place pads for a 600 ohm FB (0402 pkg) between JDP1 pin 18 and the DPA_DOCK_HPD net. Please use a 0 ohm resistor in this location. 3. Place pads for a 600 ohm FB (0402 pkg) between JDP2 pin 18 and the DPB_DOCK_HPD net. Please use a 0 ohm resistor in this location. 4. Populate the R244,R245 and "no-pop" the D7,D9. 5. Change the R276,R279 to "no-pop".
for Dell comments.13,1491 Benson04/16DELL
4layer X03
Change Dock ID form X02 to X03.92 06 COMPAL 04/16 Benson 1.Change the R44 to "pop" ,R53 to "no-pop".
93 13 DELL 04/18 Benson 1.Change the PS_PC0 "R318" and PS_PC1 "R320" to "no-pop".for Dell comments.
4layer X03
4layer X03
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Size Document Number Rev
Date: Sheet ofLA-3954P X03
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Compal Electronics, Inc.
Benson
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
4layer X0313,14 04/18Parade
1.Add the C290,C291 AC_coupled capacitor on AUX channel U46 and add the R322,R323 pull up 100K to 3.3V .2.Add the C292,C293 AC_coupled capacitor on AUX channel U47 andadd the R324,R325 pull up 100K to 3.3V .
for Parade comments.Please add the ac-coupled capacitor on AUX channel to PS8121ED
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Size Document Number Rev
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Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page#
3
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18
RequestOwner
+3.3V_ALWP Choke Size
8/2
CompalBecause the power budget is 0.57A_MAXfor *3.3V_ALWP, we change the size for PL3 Change PL3 from 10mm*10mm*4mm to 7mm*7mm*3mm
2 18Derating issue 8/7 Compal
Because the Vgs rating for RUH002N06 is 20Vand the NB_Det# is 19V.so we need adding resister to divide the voltage.
Add PR140 and PR141.Connect PR140_2 to NB_Det#, Connect PR140_1 to PR141_2and PQ17_2.Connect PR141_1 to GND
1 17GG list
8/7
DELL Follow GG_issue_listChange PR10 and PR12 from 240K to 100KChange PR11 from 100K to 240KChange PR13 and PR16 from 240K to 150KChange PR14 from 100K to 43KChange PR15 from 240K to 7.87KChange PR17 from 100K to 56KChange PC8 from 0.1U to 1U
4 18 EMI 8/9 Compalchange location PR52 and PC39 each otherchange location PR53 and PC40 each other
change location PR52 and PC39 each otherchange location PR53 and PC40 each other
5 17 PSL issue 8/15 CompalThe APL431LBAC-TRL for PU1 is not approve vender base on DELL PSL list
Change PU1 from APL431LBAC-TRL(AMPEC) to TL431BQDBZR(TI).Change PR15 from 7.87K to 16.5K
6 17 8/15 CompalDC_INAdd PD10 between PQ2.1 and PQ22.8 Add PD10 between PQ2.1 and PQ22.8
X01
X01
X01
X01
X01
7 17 DC_IN 8/20 CompalDock supports the 230W adapter. The FDS6679 is not enough to meet current rating. We plan to change MOS for PQ1 and PQ2.
Change PQ1 and PQ2 from FDS6679 AZ to FDS6681Z
X01
X01
X028 18 Component 9/6 Compal The FDS6676AS is common part Change PQ16 from FDS6676S to FDS6676AS.
9 17DC_IN 9/10 Compal
Time seqence setting when NB insert to DockingAdd PR54 and PR55, no-pop PR54 X02
1017
Component shortage issue9/12
Compal The Vender (TI) will material shortage issue for TL431BQDBZR on PU1We plan to implement TL431BQDBZR on PT 2nd source
Change PU1 form TL431BQDBZR (TI)to LM431SBCMF(FIRCHILD) X02
X0211 17ACAV_IN circuit
10/26 Support E-Dock hot plug/unplug of AC Adapter1. Change component PC6 from 0.47U to 0.1U PR4 from 240K to 1M PR6 from 47K to 220K PR7 from 47K to 22K PR8 from 100K to 10K PR5 from 100K to 4.99K PR10 from 100K to 24.9K PR13 and PR16 from 150K to 30K PC8 from 1U to .047U2, Change net name for PR12.1 from +DOCK_SDC_IN to +DOCK_DC_IN_SS3. Stuff PR54 and un-stuff PR55
12 17 PSID circuit 10/31 Compal Dock PSID signal fail Change net name from +5VALW to +5V_ALW for PD3_Pin3, PR22_Pin2 and PD5_Pin3
X02
DELL
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Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
11/121 17 DELL X02When no AC adapter is in E-Dock and EN_DOCK_PWR_BAR is low to hold of Roush PQ23, there is back drive issue where the +DOCK_PWR_BAR is held up. The issue is that NB DOCK_DCIN_IS+ and - on the NB side is biased up to +PWR_SRC potential, this holds the source terminals of both PQ4, and PQ5 higher than their gates, which are biased up to +DOCK_PWR_BAR rail. The FET's perhaps operate in a linear mode where they are not fully turned off allowing current flow back into the _DOCK_PWR_BAR rail.
ACAV_IN circuit
1.Delete cline between PR8_pin2 and Pq4_pin22.Add PR46(100K) between PQ4_pin3 nad PQ4_pin2.3.Add PR56(100K) between PQ5_pin3 nad PQ5_pin2.4.Add PR57(100K) between PQ18_pin1 nad PQ5_pin2.5.Add PQ18(RHU002N06), connect PQ18_Pin1 to PR57_pin2; connect PQ18_pin2 to PD3_pin2; connect PQ18_pin3 to GND
217
11/12 Change net "ACAV_IN_DOCK#" to "ACAV_DOCK_SRC#" Change net "ACAV_IN_DOCK#" to "ACAV_DOCK_SRC#"
X02
11/12317 Comparator
Circuit
ACAV_IN circuit DELL
DELL Add Comparator Circuit X02
4 17 ACAV_IN circuit
11/15 DELL EE work item Add PD11 (RB751) X02
5 17ACAV_IN circuit
11/15 DELLEE work item
Change PC6 from 0.1U to 0.022UChange PR6 from 220K to 1M ohm X02
1.Add PU11 (LM393)2.Add PC41 and PC42(100P)3.Add PR143 (232K)4.Add PR146 (21.5K)5.Add PR144 (32.4K)6.Add PR147 (100K)7.Add PR142 (1M) 8.Add PR145 (0) 9.Add new net for "ACAV_IN_DOCK" 10 Add PR58(100K)
186 12/20 DELL Reserve the Dock side delay circuit, but show it as no stuff with resistor option to short out.
1. Add PR68 (0) Add @PR59 (200K) Add @PR60 (200K) Add @PR61 (0) Add @PR62 (200K) Add @PR63 (100K) Add @PR64 (1K) Add @PR65 (40.2K) Add @PC43 (0.047U) Add @PC44 (10U) Add @PC45 (10U) Add @PD12 (RB751V) Add @PQ19A (2N7002DW) Add @PQ19B (2N7002DW)
X03POR issue
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Size Document Number Rev
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Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Issue Description
Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page# Title
RequestOwner
12/207 19 1.Delete PR42, PR140, PQ172.Add PD13 (RB751V) 3.Add PC46 (0.1U)4.Change PR45 from 4.99K to 10K5.Add net DOCK_POR_RST# and connect to PD13_pin2
X03DELLPOR issue
E-Dock Worse case PQ11
188 12/24 DELL 1.Change PR16 from 30K to 10K2.Change PR10 from 24.9K to 12.1K3.Change PQ11 from RHU002N06(ROHM) to NTS4001NT1G(ON)
marginal on guarantee turn off PQ11. With the Vgth of 1 to 2.5 volts, the node at the gate only drops to 1 volt. I think this is a result of changing from a 1.5V Vref TL431 to a 2.5V TL31 early in development. We also need to be able to turn on the transistor while powered via battery power so the 2.5V threshold is important as well. When calculation the circuit values required I find adjusting PR13, and PR16 considering battery voltage of 9 volts is right at 2.5V, while the values result in a low voltage of ~1V, just not too much margin. Really we need a tighter Vgth MOSFET.
X03
9 18 crowbar 12/24 To add a PR69 0 ohm option on the next Dock Gerber out to tie PQ8 source to pin 1. The other 0 ohm will still got to dock ground. This to allow instant release of NB AC softstart upon hot undock if we later determine we have an issue.
Add PR69 0 ohm, no stuff. X03
POR issue
DELL
191001/30 Compal The vender (DELTA) molding type is non psl.
X03Change PL3 form 10UH +-20% MPL73-100 3A (DELTA)to 8.2UH +-20%
FDV0630-8R2M=P3 3.7A (TOKO).+3.3V
1811 03/19 Compal Change PQ1 and PQ2 symbol from N-Channel to P-Channel. X03Dock DC_INPQ1 and PQ2 are P-channel material,but we use N-channel symbol.