a b c d e biwa block diagram -...

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Size Document Number Rev

Date: Sheet of

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.

Biwa -2BLOCK DIAGRAM

A3

1 42Thursday, March 01, 2007

55.4H001.S03G

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Date: Sheet of



A3


55.4H001.S03G

Title


Date: Sheet of



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55.4H001.S03G

31WPC8763LWinbond

INT.KB

Touch Pad32 32

-2-0226

SYSTEM DC/DC

X4 DMI

HOST BUS

DDR2

CLK GEN.

[email protected]

400M Byte/s

533/667 MHz

3

4, 5

6,7,8,9,10,11

12,13

16,17,18,19

Crestline

ICH8M

Mobile CPU

2.0G : B0, QLYV2.2G : B0, QLFS

Biwa Block Diagram

CodecALC268

Line In

1D8V_S3

Merom 479 2G/2.33G

INPUTS

SYSTEM DC/DCISL6236

5V_S5(5A)

37

OUTPUTS

ICS 9LPR502(RTM875T-605)

G2997F6UDDR_VREF_S0(1.2A)

39

6 PCIe ports

PATA

USB4 PORTHDD

MINI USBBlue-tooth

2221

CDROM

LPC BUS

3D3V_S5(5A)

DDR2533/667 MHz

12,13

533/667MHz

AGTL+ CPU I/F

LVDS, CRT I/FINTEGRATED GRAHPICS

DDR Memory I/F

ETHERNET (10/100/1000MbE)10 USB 2.0/1.1 ports

High Definition Audio

1 PATA 66/100

ACPI 1.1

Matrix Storage Technology(DO)

PCI/PCI BRIDGE

21

C-Link0

DEBUGCONN.

LPC

33

1D8V_S3(10A)

38

DCBATOUT1D05V_S0(13A)

INPUTS OUTPUTS

Project code: 91.4H001.001PCB P/N : 55.4H001.XXXREVISION : 06237-2(GCE, Hannstar)

3 SATA

LPC I/F

TOP

VCC

S

S

GND

BOTTOM

PCB STACKUP

MDC Card

APA2031OP AMP

AZALIA

MODEM

G1412

INT.SPKR

RJ11

RGB CRT

22

LVDS

CRT

14

15

14" WXGA LCD

71.0ICH8.A0U, B1, QN23

71.CREST.M02, B0, QN12

MAX8717

SATA

G79220

533/667MHz

DDR_VREF_S3

G971

1D5V_S0(4A)

39

PCI BUS

MS/MS Pro/xD/MMC/SD/SDIO

BCM5787MKMLG 24

27

TI 7412

1394CONN

25,26 26

6 in 1

1394

23

LANGiga LAN 24

TXFM RJ45

CardReader

APL5913 39

40

36

CCD

VCC_CORE_S00~1.3V 47A

OUTPUTS

CPU DC/DC

INPUTS

DCBATOUT

MAXIM CHARGER

OUTPUTSINPUTS

CHG_PWR

DCBATOUTUP+5V5V 100mA

19V 4.0A

ISL6255

MAX8770

Active Managemnet Technology(DO)

Serial Peripheral I/F

15TVOUT

22

1D8V_S3

G909 343D3V_AUX_S5(100mA)

5V_AUX_S5

INT.MIC

29

14

24

CardBus 27 27TPS2211

PCMCIASLOT

SupportTypeII

PCMCIA I/F

PWR SW

30

30

30

30

30

Mic In

Line Out(No-SPDIF)

30

SPI I/FW25X80-VSSI-G

33BIOS

FIR32

SVIDEO/COMP

Finger PT 22

1D8V_S3 1D25V_S0(1.5A)

DCBATOUT

KBC

a/b/g/nMini CardPCIex1

28KedronC Link1

28 28New card

PWR SWP2231NFC

5V_AUX_S5

Super I/OWinbondPC87381

33

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Title


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Biwa -2Reference

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55.4H001.S03G

Title


Date: Sheet of


Biwa -2Reference

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55.4H001.S03G

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Biwa -2Reference

A3


55.4H001.S03G

1 = Low Power mode0 = Normal mode

Crestline Strapping Signals andConfiguration page 7

ReservedCFG[8:6]Reserved This signal should not be pulled high.

INTVRMEN

LAN100_SLP

GPIO33/HDA_DOCK_EN#

SATALED#

SPKR

TP3

CFG9

00 = Reserved

(Default)

(Default)

edge of the Crestline GMCH PWORK in signal.

CFG16

10 = All Z mode enabled

0 = No SDVO Card present_DATA

CFG[15:14]

SDVO Present

CFG19

CFG20

straps

CFG[18:17]

11 = Normal Operation

1 = Dynamic ODT Enabled

All strap signals are sampled with respect to the leading

0 = Dynamic ODT Disabled

1= SDVO Card present

SDVOCRTL

SDVO/PCIEConcurrent

XOR/ALL Z test

FSB Dynamic ODT

Reserved

01 = XOR mode enabled

DMI Lane Reversal

NOTE:

(Default)

PCIE config2 bit0,Rising Edge of PWROK.

GNT2#

Sets bit0 of RPC.PC(Config Registers:Offset 224h)

PCI Express GraphicsLane Reversal

Top-Block Swap Override.Rising Edge of PWROK.

GNT0#/SPI_CS1#

0 = Reverse Lanes,15->0,14->1 ect..

Boot BIOS Destination Selection.Rising Edge of PWROK.

ESI compatible mode is for server platforms only.This signal should not be pulled low for desttopand mobile.

HDA_SDOUT

HDA_SYNC

GNT3#

Signal

Sampled low:Top-Block Swap mode(inverts A16 forall cycles targeting FWH BIOS space).Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

This signal has a weak internal pull-up.

XOR Chain Entrance/PCIE Port Config1 bit1,Rising Edge of PWROK

1= Normal operation(Default):Lane Numbered in order

Allows entrance to XOR Chain testing when TP3pulled low.When TP3 not pulled low at rising edgeof PWROK,sets bit1 of RPC.PC(Config Registers:offset 224h)

PCIE config1 bit0,Rising Edge of PWROK.

GPIO20

Usage/When Sampled

ESI Strap (Server Only)Rising Edge of PWROK

Comment

CFG[11:10] Reserved

CFG[13:12]

Reserved

0 = Normal operation (Default):lane Numbered in order

2007/02/161.Page 33: Add SIO 87381 for FIR Issue.2.Page 31, change KBC from 8768L to 8763L.3.Page 33, del U33(LPC golden Finger).4.Page 24/32, change ERC1/ERC2 due to 77.61021.02L is Obsoleted Part !5.Page 37, del TC22/TC19.6.Page 38, del TC1/TC4.===========================================================2007/02/091.Page 14:Modify "Q14" "BTBTN1" "WLBTN1" symbol.2.Page 36, 37, 38: Replace 0ohm with 0ohm pad.===========================================================2007/02/08a1.Page 14:Modify R428 to“FRONT_PWRLED#_1”and RN58 pin7 to“STBY_LED#_2”due to LED brightness issue.2.Page 38:Replace "TC26" with "77.C1561.01L".===========================================================2007/02/081.Page 10:Replace "R244" with "0603-PAD".2.Page 36:Replace open power gap with close power gap.3.Page 38:Add capacitor "TC26" for acoustic noise===========================================================

1 =Reverse Lane,4->0,3->1 ect...

0 = Only SDVO or PCIE x1 is operational (Default)1 =SDVO and PCIE x1 are operating simultaneously via the PEG port

ICH8-M EDS 21762 2.0V1

DA[2:0],

DIOR#,DIOW#,DD[15:0],

DDACK#, IORDY,

DREQ,approximately 33 ohm

DCS3#,

DCS1#,

page 17

Integrated VccLAN1_05and VccCL1_05 VRMEnable/Disable.Always sampled.

Enables integrated VccLAN1_05 and VccCL1_05 VRM'swhen sampled high

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

CFG[2:0]

CFG[4:3]

CFG5

Pin Name

011 = FSB667FSB Frequency Select

0 = DMI x2

others = Reserved

Reserved

(Default)1 = DMI x4

Strap Description

DMI x2 Select

Low Power PCI Express

Configuration

Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)

This signal has a weak internal pull-down.

GNT1#/GPIO51

History

Integrated VccSus1_05,VccSus1_5 and VccCL1_5VRM Enable/Disable.Always sampled.

Enables integrated VccSus1_05, VccSus1_5 andVccCL1_5 VRM's when sampled high

Flash Descriptor Security Override StrapRising Edge of PWROK

PCI Express Lane Reversal. Rising Edgeof PWROK.

No Reboot.Rising Edge of PWROK.

XOR Chain Entrance.Rising Edge of PWROK.

This signal should not be pull low unless using XOR Chain testing.

If sampled high, the system is strapped to the "No Reboot" mode(ICH8 will disable the TCO Timersystem reboot feature). The status is readable via the NO REBOOT bit.

ICH8M Integrated Pull-upand Pull-down Resistors

ICH8M IDE Integrated SeriesTermination Resistors

IDEIRQ

ICH8M Functional Strap Definitions

Controllable via Boot BIOS Destination bit(Config Registers:Offset 3410h:bit 11:10).GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

SIGNAL Resistor Type/ValueHDA_BIT_CLK

HDA_RST#

HDA_SDIN[3:0]

HDA_SDOUT

HDA_SYNC

GNT[3:0]

GPIO[20]

LDA[3:0]#/FHW[3:0]#

LDRQ[0]

PME#

PWRBTN#

SATALED#

LAN_RXD[2:0]

LDRQ[1]/GPIO23

TP[3]

SPKR

SPI_CLK

SPI_CS1#

USB[9:0][P,N]

CL_RST#

SPI_MOSI

SPI_MISO

TACH_[3:0]

NONE

PULL-DOWN 20K

PULL-DOWN 15K

PULL-UP 13K

PULL-UP 20K

PULL-UP 20K

PULL-UP 10K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 15K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K (?)

PULL-UP 20K

PULL-DOWN 20K

PULL-DOWN 20K

PULL-DOWN 20K

PULL-DOWN 20K

PULL-DOWN 20K (?)

page 16

PCI Routing

This signal has a weak internal pull-up. Sampled low:the Flash Descriptor Security will beoverridden. If high,the security measures will be in effect.This should only be used in manufacturingenvironments.

Reserved

Crestline EDS 20954 1.0

(Default)

LAN BCM5787M

BT

USB2

Finger

USB1

NC

Pair

4

USB4

USB

USB3

5

0

2

3

1

Device

MINIC1

6

7

8

9

CCD

USB Table

0 0AD22TI7412

INT REQG:CARDBUSB:1394F:Flash MediaG:SD Host

GNTIDSEL

LANE2

LANE1

MiniCard WLAN

PCIE Routing

NEW

010 = FSB800

001 = FSB533

LANE3 NewCard WLAN

ICH8-M EDS 21762 2.0V1

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

CLK_PCIE_ICH_1#CLK_PCIE_ICH_1

CLK_MCH_BCLK_1

CLK_CPU_BCLK_1#

CLK_MCH_BCLK_1#

CLK_CPU_BCLK_1

3D3V_48MPWR_S0

CPU_SEL2_R

CLK_PCIE_SATA_1#

CLK_PCIE_MINI_12CLK_PCIE_MINI_12#

3D3V_CLKGEN_S03D3V_48MPWR_S0

GEN_XTAL_OUT_R

GEN_XTAL_OUT

PCLKCLK1

CLK_PCIE_SATA_1

3D3V_CLKGEN_S0

CPU_SEL2_R

PCLKCLK3

3D3V_CLKPLL_S0

GEN_XTAL_IN

PCLKCLK2

PCLKCLK5

PCLKCLK4

PCLKCLK5

PCLKCLK2

3D3V_CLKPLL_S0

CLK_MCH_3GPLL_1#CLK_MCH_3GPLL_1

CLK_PCIE_LAN#_RCLK_PCIE_LAN_R

DREFSSCLK#_1DREFSSCLK_1

DREFCLK_1DREFCLK#_1

CLK48

PCLKCLK4

PCLKCLK3

CLK48

CLK_PCIE_NEW_1CLK_PCIE_NEW_1#

PCLKCLK0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

CPU_SEL14,7

CPU_SEL24,7

PM_STPCPU# 17

CLK48_ICH17

CLK_CPU_BCLK 4CLK_CPU_BCLK# 4

CLK_MCH_BCLK 6CLK_MCH_BCLK# 6

CLK_PCIE_SATA 16CLK_PCIE_SATA# 16

CLK_PCIE_ICH 17CLK_PCIE_ICH# 17

CLK_PCIE_MINI1 28CLK_PCIE_MINI1# 28

CLK_ICH1417

PM_STPPCI# 17

SMBD_ICH 12,19SMBC_ICH 12,19

CLK_PWRGD 17

PCLK_ICH17

CPU_SEL04,7

PCLK_SIO33

PCLK_KBC31

CLK_MCH_3GPLL 7CLK_MCH_3GPLL# 7

CLK_PCIE_LAN# 23CLK_PCIE_LAN 23

DREFSSCLK# 7DREFSSCLK 7

DREFCLK 7DREFCLK# 7

PCLK_PCM26

CLK48_CARDBUS26

CLK_PCIE_NEW 28CLK_PCIE_NEW# 28

CLK14_SIO33

Title


Date: Sheet of


Clock Generator

3 42Thursday, March 01, 2007Biwa -2

55.4H001.S03G

Title


Date: Sheet of


Clock Generator


55.4H001.S03G

Title


Date: Sheet of


Clock Generator


55.4H001.S03G

SEL1FSB

SEL0FSA

133M100M

166M800M

0 1X0

1 X

667M200M

0 1

CPUSEL2FSC

FSB

0 10

101

PCI0/CR#_A

PIN NAME DESCRIPTIONByte 5, bit 70 = PCI0 enabled (default)1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pairByte 5, bit 60 = CR#_A controls SRC0 pair (default),1= CR#_A controls SRC2 pair

Byte 5, bit 50 = PCI1 enabled (default)1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pairByte 5, bit 40 = CR#_B controls SRC1 pair (default)1= CR#_B controls SRC4 pair

PCI1/CR#_B

0 = Overclocking of CPU and SRC Allowed1 = Overclocking of CPU and SRC NOT allowedPCI2/TME

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#PCI4/27M_SEL0 =SRC8/SRC8#1 = ITP/ITP#PCI_F5/ITP_EN

PCI3/SRC-5_EN

CL=20pF±0.2pF

PIN NAME DESCRIPTIONByte 5, bit 70 = PCI0 enabled (default)1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pairByte 5, bit 60 = CR#_A controls SRC0 pair (default),1= CR#_A controls SRC2 pair

Byte 5, bit 50 = PCI1 enabled (default)1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pairByte 5, bit 40 = CR#_B controls SRC1 pair (default)1= CR#_B controls SRC4 pair

PCI1/CR#_B

0 = Overclocking of CPU and SRC Allowed1 = Overclocking of CPU and SRC NOT allowedPCI2/TME

0 =SRC8/SRC8#1 = ITP/ITP#PCI_F5/ITP_EN

PCI0/CR#_A

RTM875T-605 setting tableICS9LPR502HGLFT-GP setting table

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.1 = Pins29,30 as SRC-5 differential pair.

PCI4/SRC5_EN 0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.1 = Pins29,30 as SRC-5 differential pair.

SA SIV Bug

<---1 2/16 modify

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

H_A#18

H_A#20H_A#21H_A#22

H_A#17

H_A#19

H_A#23H_A#24H_A#25H_A#26H_A#27H_A#28H_A#29H_A#30H_A#31

H_A#3H_A#4H_A#5H_A#6H_A#7H_A#8H_A#9H_A#10H_A#11H_A#12H_A#13H_A#14H_A#15H_A#16

H_REQ#0H_REQ#1H_REQ#2H_REQ#3H_REQ#4

H_A#[35..3]

H_RS#1H_RS#0

H_RS#2

H_IERR#

XDP_BPM#0XDP_BPM#1XDP_BPM#2XDP_BPM#3XDP_BPM#4

XDP_TCKXDP_TDI

XDP_TMSXDP_TRST#

XDP_TDO

XDP_DBRESET#

XDP_BPM#5

H_D#32H_D#33H_D#34H_D#35H_D#36H_D#37H_D#38H_D#39

H_D#41H_D#40

H_D#42H_D#43

H_D#[63..0]

H_D#44H_D#45H_D#46H_D#47

H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7H_D#8H_D#9

H_D#10H_D#11H_D#12H_D#13H_D#14H_D#15

H_D#16H_D#17H_D#18H_D#19H_D#20H_D#21H_D#22H_D#23H_D#24H_D#25H_D#26H_D#27H_D#28H_D#29H_D#30H_D#31

H_D#48H_D#49

H_D#51H_D#50

H_D#52H_D#53H_D#54H_D#55

H_D#57H_D#56

H_D#58H_D#59H_D#60H_D#61

H_D#63H_D#62

COMP0COMP1COMP2COMP3

TEST1

TEST2

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_DINV#[3..0]

RSVD_CPU_12

RSVD_CPU_13RSVD_CPU_14

RSVD_CPU_4

RSVD_CPU_1

RSVD_CPU_8

RSVD_CPU_5RSVD_CPU_6RSVD_CPU_7

RSVD_CPU_2RSVD_CPU_3

RSVD_CPU_10

RSVD_CPU_11

XDP_TDI

XDP_TMS

XDP_TRST#

XDP_TCK

H_THERMDC

H_THERMDA

CPU_GTLREF0

RSVD_CPU_9

TEST1TEST2

TEST4

H_A#32H_A#33H_A#34H_A#35 CPU_PROCHOT#_R

1D05V_S0

1D05V_S0

1D05V_S0

1D05V_S0

H_ADS# 6H_BNR# 6

H_DRDY# 6H_DBSY# 6

H_BREQ#0 6

H_HIT# 6H_HITM# 6

H_LOCK# 6

H_DSTBN#2 6H_DSTBP#2 6H_DINV#2 6

H_D#[63..0] 6

H_DSTBN#3 6H_DSTBP#3 6H_DINV#3 6

H_ADSTB#16

H_A#[35..3]6

H_ADSTB#06H_REQ#[4..0]6

H_DSTBN#06H_DSTBP#06H_DINV#06

H_DSTBN#16H_DSTBP#16H_DINV#16

H_BPRI# 6

H_DEFER# 6

H_INIT# 16

H_CPURST# 6,42H_RS#[2..0] 6

H_TRDY# 6

H_THERMDA 20

CLK_CPU_BCLK 3CLK_CPU_BCLK# 3

H_DPRSTP# 7,16,36H_DPSLP# 16H_DPWR# 6H_PWRGD 16,34,42H_CPUSLP# 6

H_FERR#16

H_THERMDC 20

H_INTR16H_NMI16H_SMI#16

H_IGNNE#16

H_A20M#16

H_DINV#[3..0] 6

H_DSTBN#[3..0] 6

H_DSTBP#[3..0] 6

CPU_SEL23,7

CPU_SEL03,7CPU_SEL13,7

H_STPCLK#16

PSI# 36

CPU_PROCHOT# 36

PM_THRMTRIP# 7,16,34

Title


Date: Sheet of


CPU (1 of 2)

4 42Thursday, March 01, 2007Biwa SA

55.4H001.S03G

Title


Date: Sheet of


CPU (1 of 2)


55.4H001.S03G

Title


Date: Sheet of


CPU (1 of 2)


55.4H001.S03G

H_IERR# with a GND0.1" away

Place testpoint on

Layout Note:Comp0, 2 connect with Zo=27.4 ohm, make

Comp1, 3 connect with Zo=55 ohm, maketrace length shorter than 0.5" .

trace length shorter than 0.5" .

Layout Note:"CPU_GTLREF0"0.5" max length.( No stub)

should connect toPM_THRMTRIP#

without T-ingICH8 and MCH

All place within 2" to CPU

Net "TEST4" as short as possible,make sure "TEST4" routing isreference to GND and away othernoisy signals

2nd source: 62.10053.401

20060925 original 27R2F

1 2R103 649R2F-GPR103 649R2F-GP

TP23 Do Not StuffTP23 Do Not Stuff


TP42Do Not StuffTP42Do Not Stuff



1 2R90 39R2F-GPR90 39R2F-GP







D16#N22D17#K25D18#P26D19#R23D20#L23D21#M24D22#L22D23#M23D24#P25D25#P23D26#P22D27#T24D28#R24D29#L25D30#T25D31#N25

DINV0#H25

DINV1#N24

DSTBN0#J26

DSTBN1#L26

DSTBP0#H26

DSTBP1#M26

D0#E22D1#F24D2#E26D3#G22D4#F23D5#G25D6#E25D7#E23D8#K24D9#G24D10#J24D11#J23D12#H22D13#F26D14#K22D15#H23

D53# AC26

D60# AC22

D63# AC23

GTLREFAD26

TEST2D25

BSEL0B22BSEL1B23BSEL2C21

DINV2# U22

D32# Y22D33# AB24D34# V24D35# V26D36# V23

D38# U25D39# U23D40# Y25D41# W22D42# Y23D43# W24D44# W25D45# AA23D46# AA24D47# AB25

DSTBP2# AA26DSTBN2# Y26

D48# AE24D49# AD24

D52# AB21

D54# AD20D55# AE22D56# AF23D57# AC25D58# AE21D59# AD21

D61# AD23

DINV3# AC20

DSTBN3# AE25

D51# AB22D50# AA21

D62# AF22

COMP0 R26COMP1 U26

DPRSTP# E5DPSLP# B5DPWR# D24

PWRGOOD D6SLP# D7PSI# AE6

TEST1C23

TEST6A26

TEST3C24

TEST5AF1TEST4AF26

D37# T22

DSTBP3# AF24

COMP2 AA1COMP3 Y1

2 OF 4

DATA GRP0

DATA GRP1

DATA GRP2

DATA GRP3

MISC

U41B

BGA479-SKT6-GPU3

2 OF 4

DATA GRP0

DATA GRP1

DATA GRP2

DATA GRP3

MISC

U41B

BGA479-SKT6-GPU3

1 2R322 27D4R2F-L1-GPR322 27D4R2F-L1-GP

12

R11756R2J-4-GPR11756R2J-4-GP

1 2R91 27D4R2F-L1-GPR91 27D4R2F-L1-GP



1 2R75 27D4R2F-L1-GPR75 27D4R2F-L1-GP

1 2R324 Do Not Stuff

DYR324 Do Not Stuff

DY


12

C486SC2200P50V2KX-2GPC486SC2200P50V2KX-2GP


12

R3201KR2F-3-GP

R3201KR2F-3-GP


DYR323 Do Not Stuff

DY

12

R11856R2J-4-GP

R11856R2J-4-GP

1 2R74 54D9R2F-L1-GPR74 54D9R2F-L1-GP


A3#J4A4#L5A5#L4A6#K5A7#M3A8#N2A9#J1A10#N3A11#P5A12#P2A13#L2A14#P4A15#P1A16#R1

A20M#A6

ADS# H1

ADSTB0#M1

REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L1

A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5

A30#U2

A24#R4A25#T5A26#T3

A32#W3

A28#W5A29#Y4

A27#W2

A31#V4

A33#AA4A34#AB2A35#AA3

FERR#A5IGNNE#C4

RSVD#M4M4RSVD#N5N5RSVD#T2T2RSVD#V3V3RSVD#B2B2RSVD#C3C3

BNR# E2BPRI# G5

DEFER# H5

DBSY# E1DRDY# F21

BR0# F1

IERR# D20INIT# B3

LOCK# H4

RS0# F3RS1# F4RS2# G3

TRDY# G2

HIT# G6HITM# E4

BPM0# AD4BPM1# AD3BPM2# AD1BPM3# AC4PRDY# AC2PREQ# AC1

TCK AC5TDI AA6

TDO AB3TMS AB5

TRST# AB6DBR# C20

PROCHOT# D21THRMDA A24

THERMTRIP# C7

BCLK0 A22BCLK1 A21

RSVD#D2D2

RSVD#F6F6RSVD#D3D3RSVD#D22D22

STPCLK#D5LINT0C6LINT1B4SMI#A3

A23#U1

ADSTB1#V1

RESET# C1

KEY_NCB1

THRMDC B25

1 OF 4

RESERVED

HCLK

THERMAL

ADDR GROUP 1

XDP/ITP SIGNALS

CONTROL

ADDR GROUP 0

ICH

U41A

BGA479-SKT6-GPU362.10079.001

1 OF 4

RESERVED

HCLK

THERMAL

ADDR GROUP 1

XDP/ITP SIGNALS

CONTROL

ADDR GROUP 0

ICH

U41A

BGA479-SKT6-GPU362.10079.001



12 R119Do Not Stuff

DYR119Do Not Stuff

DY

1 2R321 54D9R2F-L1-GPR321 54D9R2F-L1-GP

1 2R98 150R2F-1-GPR98 150R2F-1-GP



12

R3192KR2F-3-GP

R3192KR2F-3-GP







TP21Do Not StuffTP21Do Not StuffTP32Do Not StuffTP32Do Not Stuff

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

H_VID0H_VID1H_VID2H_VID3H_VID4H_VID5H_VID6

CPU_G21

H_VID[0..6]

CPU_V6

VCC_CORE_S0

VCC_CORE_S0

1D5V_S0

1D05V_S0

1D5V_VCCA_S0

1D05V_S0

VCC_CORE_S0

VCC_CORE_S0

VCC_CORE_S0

VCC_SENSE 36

VSS_SENSE 36

H_VID[0..6] 36

Title


Date: Sheet of


CPU (2 of 2)


Title


Date: Sheet of


CPU (2 of 2)


Title


Date: Sheet of


CPU (2 of 2)


Layout Note:

should be of equal length.VCCSENSE and VSSSENSE lines

Layout Note:Provide a test point (withno stub) to connect a differential probe between VCCSENSE andVSSSENSE at the locationwhere the two 54.9ohmresistors terminate the55 ohm transmission line.

layout note: "1D5V_VCCA_S0"as short as possible

2nd source: 62.10053.401

12

C219

Do N

ot Stuff

DYC219

Do N

ot Stuff

DY

12

R97100R2F-L1-GP-UR97100R2F-L1-GP-U

12

C456

SC

10U6D

3V6K

X-4G

P

C456

SC

10U6D

3V6K

X-4G

P

12

C210

SC

D1U

10V2K

X-4G

P

C210

SC

D1U

10V2K

X-4G

P

12

C133D

o Not S

tuffDY

C133D

o Not S

tuffDY

12

C458

SC

10U6D

3V6K

X-4G

P

C458

SC

10U6D

3V6K

X-4G

P

12

C170

SC

10U6D

3V6K

X-4G

P

C170

SC

10U6D

3V6K

X-4G

P

VCCA7VCCA9

VCCAC10

VCCA10VCCA12VCCA13VCCA15VCCA17VCCA18VCCA20VCCB7VCCB9VCCB10VCCB12VCCB14VCCB15VCCB17VCCB18VCCB20VCCC9VCCC10VCCC12VCCC13VCCC15VCCC17VCCC18VCCD9VCCD10VCCD12VCCD14VCCD15VCCD17VCCD18VCCE7VCCE9VCCE10VCCE12VCCE13VCCE15

VCCAA7VCCAA9VCCAA10VCCAA12VCCAA13VCCAA15VCCAA17VCCAA18VCCAA20VCCAB9

VCCAB12VCCAB14VCCAB15VCCAB17VCCAB18

VCCE17VCCE18VCCE20VCCF7VCCF9VCCF10VCCF12VCCF14VCCF15VCCF17VCCF18VCCF20

VCC AB20VCC AB7VCC AC7VCC AC9VCC AC12VCC AC13VCC AC15VCC AC17VCC AC18VCC AD7VCC AD9VCC AD10VCC AD12VCC AD14VCC AD15VCC AD17VCC AD18VCC AE9VCC AE10VCC AE12VCC AE13VCC AE15VCC AE17VCC AE18VCC AE20VCC AF9VCC AF10VCC AF12VCC AF14VCC AF15VCC AF17VCC AF18VCC AF20

VCCP G21

VCCP J6

VCCP J21

VCCP K6

VCCP K21

VCCP M6

VCCP M21

VCCP N6VCCP N21

VCCP R6VCCP R21

VCCP T6VCCP T21

VCCP V6

VCCP V21VCCP W21

VCCA B26VCCA C26

VID0 AD6

VID6 AE2

VID4 AE3

VID2 AE5

VID5 AF3

VID3 AF4

VID1 AF5

VSSSENSE AE7

VCCSENSE AF7

VCCAB10

3 OF 4U41C

BGA479-SKT6-GPU362.10079.001

3 OF 4U41C

BGA479-SKT6-GPU362.10079.001

12

C434

Do N

ot Stuff

DYC434

Do N

ot Stuff

DY

12

C489SC4D7U6D3V3KX-GPC489SC4D7U6D3V3KX-GP

12

C208

Do N

ot Stuff

DYC208

Do N

ot Stuff

DY

12

C187

SC

10U6D

3V6K

X-4G

P

C187

SC

10U6D

3V6K

X-4G

P

12

R89100R2F-L1-GP-UR89100R2F-L1-GP-U

12

C137

SC

D1U

10V2K

X-4G

P

C137

SC

D1U

10V2K

X-4G

P

12

C125

SC

D1U

10V2K

X-4G

P

C125

SC

D1U

10V2K

X-4G

P

12

C433

Do N

ot Stuff

DYC433

Do N

ot Stuff

DY

12

C463

Do N

ot Stuff

DYC463

Do N

ot Stuff

DY

12

C462

Do N

ot Stuff

DYC462

Do N

ot Stuff

DY

VSSAF2

VSSA4VSSA8VSSA11VSSA14VSSA16VSSA19VSSA23

VSSB6VSSB8VSSB11VSSB13VSSB16VSSB19VSSB21VSSB24VSSC5VSSC8VSSC11VSSC14VSSC16VSSC19VSSC2VSSC22VSSC25VSSD1VSSD4VSSD8VSSD11VSSD13VSSD16VSSD19VSSD23VSSD26VSSE3VSSE6VSSE8VSSE11VSSE14VSSE16VSSE19VSSE21VSSE24VSSF5VSSF8VSSF11VSSF13VSSF16VSSF19VSSF2VSSF22VSSF25VSSG4VSSG1VSSG23VSSG26VSSH3VSSH6VSSH21VSSH24VSSJ2VSSJ5VSSJ22VSSJ25VSSK1VSSK4VSSK23VSSK26VSSL3VSSL6VSSL21VSSL24VSSM2VSSM5VSSM22VSSM25VSSN1VSSN4VSSN23VSSN26VSSP3

VSS P6VSS P21VSS P24VSS R2VSS R5VSS R22VSS R25VSS T1VSS T4VSS T23VSS T26VSS U3VSS U6VSS U21VSS U24VSS V2VSS V5VSS V22VSS V25VSS W1VSS W4VSS W23VSS W26VSS Y3VSS Y6VSS Y21VSS Y24VSS AA2VSS AA5VSS AA8VSS AA11VSS AA14VSS AA16VSS AA19VSS AA22VSS AA25VSS AB1VSS AB4VSS AB8VSS AB11VSS AB13VSS AB16VSS AB19VSS AB23VSS AB26VSS AC3VSS AC6VSS AC8VSS AC11VSS AC14VSS AC16VSS AC19VSS AC21VSS AC24VSS AD2VSS AD5VSS AD8VSS AD11VSS AD13VSS AD16VSS AD19VSS AD22VSS AD25VSS AE1VSS AE4VSS AE8VSS AE11VSS AE14VSS AE16VSS AE19VSS AE23VSS AE26VSS A2VSS AF6VSS AF8VSS AF11VSS AF13VSS AF16VSS AF19VSS AF21VSS A25VSS AF25

4 OF 4U41D

BGA479-SKT6-GPU3

4 OF 4U41D

BGA479-SKT6-GPU3

12

C199

SC

10U6D

3V6K

X-4G

P

C199

SC

10U6D

3V6K

X-4G

P

12

C130

SC

4D7U

6D3V

3KX

-GP

C130

SC

4D7U

6D3V

3KX

-GP

12

C126

SC

D1U

10V2K

X-4G

P

C126

SC

D1U

10V2K

X-4G

P

12

C152

Do N

ot Stuff

DYC152

Do N

ot Stuff

DY

12

C151

Do N

ot Stuff

DYC151

Do N

ot Stuff

DY

12

C488

SCD01U16V2KX-3GP

C488

SCD01U16V2KX-3GP

12

C218

SC

4D7U

6D3V

3KX

-GP

C218

SC

4D7U

6D3V

3KX

-GP

12

C214

Do N

ot Stuff

DYC214

Do N

ot Stuff

DY

1 2R102 Do Not StuffR102 Do Not Stuff

12

C217

SC

D1U

10V2K

X-4G

P

C217

SC

D1U

10V2K

X-4G

P

12

C115

SC

D1U

10V2K

X-4G

P

C115

SC

D1U

10V2K

X-4G

P


12

C207

Do N

ot Stuff

DYC207

Do N

ot Stuff

DY1

2C220

SC

D1U

10V2K

X-4G

P

C220

SC

D1U

10V2K

X-4G

P

12

C216

SC

D1U

10V2K

X-4G

P

C216

SC

D1U

10V2K

X-4G

P

1 2

L15

HCB1608KF121T30-GP68.00230.041

L15

HCB1608KF121T30-GP68.00230.041

12

C447

SC

10U6D

3V6K

X-4G

P

C447

SC

10U6D

3V6K

X-4G

P

12

C131SC

D1U

10V2K

X-4G

P

C131SC

D1U

10V2K

X-4G

P

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

H_D#[63..0]H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7H_D#8H_D#9H_D#10H_D#11H_D#12H_D#13H_D#14H_D#15H_D#16H_D#17H_D#18H_D#19H_D#20H_D#21H_D#22H_D#23H_D#24H_D#25H_D#26H_D#27H_D#28H_D#29H_D#30H_D#31H_D#32H_D#33H_D#34H_D#35H_D#36H_D#37H_D#38H_D#39H_D#40H_D#41H_D#42H_D#43H_D#44H_D#45H_D#46H_D#47H_D#48H_D#49H_D#50H_D#51H_D#52H_D#53H_D#54H_D#55H_D#56H_D#57H_D#58H_D#59H_D#60H_D#61H_D#62H_D#63

H_SCOMP#

H_SWINGH_RCOMP

H_SCOMP

H_A#29H_A#30H_A#31

H_A#26H_A#27H_A#28

H_A#23H_A#24H_A#25

H_A#20H_A#21H_A#22

H_A#17H_A#18H_A#19

H_A#14H_A#15H_A#16

H_A#11H_A#12H_A#13

H_A#8H_A#9H_A#10

H_A#5H_A#6H_A#7

H_A#3H_A#4

H_A#[35..3]

H_DINV#0H_DINV#1H_DINV#2H_DINV#3

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBN#3H_DSTBN#2H_DSTBN#1H_DSTBN#0

H_DSTBP#[3..0]

H_DSTBP#2

H_DSTBP#0

H_DSTBP#3

H_DSTBP#1

H_REQ#1

H_REQ#3H_REQ#2

H_REQ#0

H_REQ#4

H_RS#1H_RS#2

H_RS#0

H_SCOMP#

H_RCOMP

H_SCOMP

H_SWING

H_AVREF

H_DVREF

H_A#32H_A#33H_A#34H_A#35

1D05V_S0

1D05V_S0

1D05V_S0

1D05V_S0

H_A#[35..3] 4

H_BNR# 4

H_BREQ#0 4

H_ADS# 4H_ADSTB#0 4H_ADSTB#1 4

H_DBSY# 4

H_DRDY# 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_HIT# 4H_HITM# 4

H_REQ#[4..0] 4

H_D#[63..0]4

CLK_MCH_BCLK 3CLK_MCH_BCLK# 3

H_LOCK# 4

H_BPRI# 4

H_CPURST#4,42

H_DEFER# 4

H_DPWR# 4

H_TRDY# 4

H_RS#[2..0] 4H_CPUSLP#4

Title


Date: Sheet of


GMCH (1 of 6)


55.4H001.S03G

Title


Date: Sheet of


GMCH (1 of 6)


55.4H001.S03G

Title


Date: Sheet of


GMCH (1 of 6)


55.4H001.S03G

Place them near to the chip ( < 0.5")

H_RCOMP routing Trace width andSpacing use 10 / 20 mil

H_SCOMP and H_SCOMP# Resistors andCapacitors close MCH 500 mil ( MAX )

H_SWING routing Trace width andSpacing use 10 / 20 mil

H_SWING Resistors andCapacitors close MCH500 mil ( MAX )

H_REF Decoupling Crestlineclose Crestline 100 mil

CRB v0.9 REQUEST

12

R309Do Not Stuff

R309Do Not Stuff

1 2R314 54D9R2F-L1-GPR314 54D9R2F-L1-GP

12

R315221R2F-2-GPR315221R2F-2-GP

12

R316100R2F-L1-GP-UR316100R2F-L1-GP-U

12

R3102KR2F-3-GPR3102KR2F-3-GP 1

2

C471SCD1U16V2ZY-2GP

C471SCD1U16V2ZY-2GP

12

C47

9S

CD

1U10

V2K

X-4

GP

C47

9S

CD

1U10

V2K

X-4

GP

12

R3111KR2F-3-GPR3111KR2F-3-GP

H_D#0E2H_D#1G2H_D#2G7H_D#3M6H_D#4H7H_D#5H3H_D#6G4H_D#7F3H_D#8N8H_D#9H2H_D#10M10H_D#11N12H_D#12N9H_D#13H5H_D#14P13H_D#15K9H_D#16M2H_D#17W10H_D#18Y8H_D#19V4H_D#20M3H_D#21J1H_D#22N5H_D#23N3H_D#24W6H_D#25W9H_D#26N2H_D#27Y7H_D#28Y9H_D#29P4H_D#30W3H_D#31N1H_D#32AD12H_D#33AE3H_D#34AD9H_D#35AC9H_D#36AC7H_D#37AC14H_D#38AD11H_D#39AC11H_D#40AB2H_D#41AD7H_D#42AB1H_D#43Y3H_D#44AC6H_D#45AE2H_D#46AC5H_D#47AG3H_D#48AJ9H_D#49AH8H_D#50AJ14H_D#51AE9H_D#52AE11H_D#53AH12H_D#54AJ5H_D#55AH5H_D#56AJ6H_D#57AE7H_D#58AJ7H_D#59AJ2H_D#60AE5H_D#61AJ3H_D#62AH2H_D#63AH13

H_SWINGB3H_RCOMPC2

H_SCOMPW1H_SCOMP#W2

H_CPURST#B6H_CPUSLP#E5

H_AVREFB9H_DVREFA9

H_A#23 D17

H_A#31 E17

H_A#28 E19

H_A#33 A19

H_A#4 B11

H_A#13 B13

H_A#16 B14

H_A#30 B15

H_A#20 B16

H_A#29 B17

H_A#27 B18

H_A#34 B19

H_A#5 C11

H_A#11 C14

H_A#7 C15

H_A#32 C18

H_A#8 F16

H_A#10 G17

H_A#21 H20

H_A#3 J13

H_A#15 J17

H_A#26 J19

H_A#12 K16

H_A#17 K19

H_A#9 L13

H_A#14 L16

H_A#22 L19

H_A#25 N16

H_A#35 N19

H_A#18 P15H_A#19 R17

H_A#6 M11

H_A#24 M17

H_ADS# G12H_ADSTB#0 H17H_ADSTB#1 G20

H_BNR# C8H_BPRI# E8

H_BREQ# F12H_DEFER# D6

H_DBSY# C10HPLL_CLK AM5

HPLL_CLK# AM7H_DPWR# H8H_DRDY# K7

H_HIT# E4H_HITM# C6

H_TRDY# B7H_LOCK# G10

H_DINV#2 AD13H_DINV#3 AE13

H_DINV#0 K5H_DINV#1 L2

H_DSTBN#2 AD2H_DSTBN#3 AH11

H_DSTBN#1 K3H_DSTBN#0 M7

H_DSTBP#2 AC2H_DSTBP#1 K2

H_DSTBP#3 AJ10

H_DSTBP#0 L7

H_REQ#1 E13H_REQ#2 A11

H_REQ#4 B12H_REQ#3 H13

H_REQ#0 M14

H_RS#1 D7H_RS#2 D8

H_RS#0 E12

1 OF 10

HOST

U40A 1 OF 10

HOST

U40A

1 2R313 54D9R2F-L1-GPR313 54D9R2F-L1-GP

1 2R312 24D9R2F-L-GPR312 24D9R2F-L-GP

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

M_RCOMPN

M_RCOMPP

CFG4

CFG3

CFG5

CFG13

CFG9

CFG8

CFG14

CFG15

CFG12

CFG16

CFG7

CFG10

CFG17PM_EXTTS#0PM_EXTTS#1

CFG20

CFG19

CFG18

DMI_TXP3

CFG4CFG3

CFG5CFG6CFG7CFG8CFG9CFG10

CFG11CFG12CFG13CFG14CFG15CFG16CFG17CFG18

CFG20CFG19

DMI_RXN3

DMI_TXN2DMI_TXN1DMI_TXN0

DMI_TXN3

DMI_RXP3DMI_RXP2DMI_RXP1DMI_RXP0

DMI_TXP2DMI_TXP1DMI_TXP0

DMI_RXN2DMI_RXN1DMI_RXN0

PM_EXTTS#0

RSTIN#

CFG6

PWROK_GDPM_EXTTS#1

DREFCLK#DREFCLK

DREFSSCLK#DREFSSCLK

PEG_CMP

H_DPRSTP#_MCH

PM_DPRSLPVR_MCH

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_RCOMP_VOHSM_RCOMP_VOL

M_RCOMPPM_RCOMPN

CFG11

CLPWROK_MCH

MCH_CLVREF

CLK_3GPLLREQ#

TEST1_GMCH

L_LVBG

LCTLB_DATALCTLA_CLK

LIBG

GMCH_VS

GMCH_HS

CRT_IREF

TV_DCONSEL1TV_DCONSEL0

GMCH_RED

GMCH_BLUE

GMCH_GREEN

GMCH_TXAOUT3-

GMCH_TXAOUT3+

TEST2_GMCH

GFX_VID0GFX_VID1GFX_VID2GFX_VID3GFX_VR_EN

TV_DACC

TV_DACA

TV_DACB

1D8V_S3

1D8V_S3

1D25V_S0

1D8V_S3DDR_VREF_S3

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

1D05V_S0

DMI_RXN0 17

DMI_TXN0 17DMI_TXN1 17

DMI_TXP1 17

DMI_TXN2 17DMI_TXN3 17

DMI_TXP0 17

DMI_TXP2 17DMI_TXP3 17

DMI_RXN1 17DMI_RXN2 17DMI_RXN3 17

DMI_RXP0 17

DMI_RXP2 17DMI_RXP3 17

DMI_RXP1 17

M_CLK_DDR#2 12M_CLK_DDR#3 12

M_CLK_DDR0 12M_CLK_DDR1 12

M_CKE0 12,13M_CKE1 12,13M_CKE2 12,13M_CKE3 12,13

M_CLK_DDR2 12M_CLK_DDR3 12

M_CS1# 12,13M_CS2# 12,13M_CS3# 12,13

M_CS0# 12,13

M_CLK_DDR#0 12M_CLK_DDR#1 12

M_ODT0 12,13M_ODT1 12,13M_ODT2 12,13M_ODT3 12,13

CPU_SEL13,4CPU_SEL23,4

CPU_SEL03,4

H_DPRSTP#4,16,36PM_BMBUSY#17

PLT_RST1#17,21,23,28,31,33

VGATE_PWRGD17,36

PWROK17,20

PM_DPRSLPVR17,36PM_THRMTRIP#4,16,34

MCH_ICH_SYNC# 17

CL_RST#0 17

CL_CLK0 17CL_DATA0 17

CLK_MCH_3GPLL 3CLK_MCH_3GPLL# 3

DREFCLK# 3DREFCLK 3

DREFSSCLK# 3DREFSSCLK 3

GMCH_TXAOUT0+14GMCH_TXAOUT1+14GMCH_TXAOUT2+14

GMCH_TXAOUT0-14GMCH_TXAOUT1-14GMCH_TXAOUT2-14

GMCH_TXACLK-14GMCH_TXACLK+14

GMCH_LCDVDD_ON14

CLK_DDC_EDID14DAT_DDC_EDID14

GMCH_BL_ON31

GMCH_GREEN15

GMCH_BLUE15

GMCH_RED15

GMCH_DDCCLK15GMCH_DDCDATA15

GMCH_VSYNC15

GMCH_HSYNC15

GMCH_TXBCLK-14GMCH_TXBCLK+14

GMCH_TXBOUT0+14GMCH_TXBOUT1+14GMCH_TXBOUT2+14

GMCH_TXBOUT0-14GMCH_TXBOUT1-14GMCH_TXBOUT2-14

PWROK 17,20

TV_DACA15TV_DACB15TV_DACC15

GMCH_BKLTCTL14

Title


Date: Sheet of


GMCH (2 of 6)


Title


Date: Sheet of


GMCH (2 of 6)


Title


Date: Sheet of


GMCH (2 of 6)


FOR Calero: 255 ohm Crestline: 1.3k ohm

CRT_IREF routing Tracewidth use 20 mil

20060908

20060908

20060919




12

C404SC

D1U

10V2K

X-4G

P

C404SC

D1U

10V2K

X-4G

P



1 2R27939R2F-GPR27939R2F-GP



12

C427

SC2D2U6D3V3MX-1-GP

C427

SC2D2U6D3V3MX-1-GP



12

R2953K01R2F-3-GP

R2953K01R2F-3-GP

12 R762K4R2F-GP

R762K4R2F-GP

12

C439

SCD01U16V2KX-3GP

C439

SCD01U16V2KX-3GP

12R92

150R2F-1-GPR92

150R2F-1-GP

1 2R2961KR2F-3-GP R2961KR2F-3-GP

RSVD#A35A35

RSVD#B34B34RSVD#B36B36RSVD#B37B37

RSVD#C34C34

RSVD#P36P36RSVD#P37P37RSVD#R35R35RSVD#N35N35RSVD#AR12AR12RSVD#AR13AR13RSVD#AM12AM12RSVD#AN13AN13RSVD#J12J12RSVD#AR37AR37RSVD#AM36AM36RSVD#AL36AL36RSVD#AM37AM37RSVD#D20D20

RSVD#H10H10RSVD#B51B51RSVD#BJ20BJ20RSVD#BK22BK22RSVD#BF19BF19RSVD#BH20BH20RSVD#BK18BK18RSVD#BJ18BJ18RSVD#BF23BF23RSVD#BG23BG23RSVD#BC23BC23RSVD#BD24BD24

RSVD#BH39BH39RSVD#AW20AW20RSVD#BK20BK20

RSVD#B44B44RSVD#C44C44

CFG0P27CFG1N27CFG2N24CFG3C21CFG4C23CFG5F23CFG6N23CFG7G23CFG8J20CFG9C20CFG10R24CFG11L23CFG12J23CFG13E23CFG14E20CFG15K23CFG16M20CFG17M24CFG18L32CFG19N33CFG20L35

PM_BM_BUSY#G41PM_DPRSTP#L39PM_EXT_TS#0L36PM_EXT_TS#1J36PWROKAW49RSTIN#AV20THERMTRIP#N20DPRSLPVRG36

NC#BJ51BJ51NC#BK51BK51NC#BK50BK50NC#BL50BL50NC#BL49BL49NC#BL3BL3NC#BL2BL2NC#BK1BK1NC#BJ1BJ1NC#E1E1NC#A5A5NC#C51C51NC#B50B50NC#A50A50NC#A49A49NC#BK2BK2

SM_CK4 AV23

SM_CK0 AV29

SM_CK#4 AW23SM_CK#3 AW25

SM_CK#0 AW30

SM_CKE1 AY32

SM_CK#1 BA23

SM_CK3 BA25SM_CK1 BB23

SM_CKE3 BD39

SM_CKE0 BE29

SM_CKE4 BG37

SM_CS#2 BG16

SM_CS#0 BG20SM_CS#1 BK16

SM_CS#3 BE13

SM_ODT3 BE16

SM_ODT0 BH18

SM_ODT2 BJ14SM_ODT1 BJ15

SM_RCOMP BL15SM_RCOMP# BK14

SM_VREF#AR49 AR49SM_VREF#AW4 AW4

DPLL_REF_CLK B42DPLL_REF_CLK# C42

DPLL_REF_SSCLK H48DPLL_REF_SSCLK# H47

PEG_CLK K44PEG_CLK# K45

DMI_RXN1 AJ38DMI_RXN2 AN42DMI_RXN3 AN46

DMI_RXN0 AN47

DMI_RXP1 AJ39DMI_RXP0 AM47

DMI_RXP2 AN41DMI_RXP3 AN45

DMI_TXN1 AJ41DMI_TXN0 AJ46

DMI_TXN2 AM40DMI_TXN3 AM44

DMI_TXP1 AJ42DMI_TXP0 AJ47

DMI_TXP2 AM39DMI_TXP3 AM43

GFX_VID2 C38

GFX_VID0 E35GFX_VID1 A39

GFX_VID3 B39GFX_VR_EN E36

CL_CLK AM49CL_DATA AK50

CL_PWROK AT43CL_RST# AN49CL_VREF AM50

TEST1 A37TEST2 R32

SDVO_CTRL_CLK H35SDVO_CTRL_DATA K36

CLKREQ# G39ICH_SYNC# G40

SM_RCOMP_VOH BK31SM_RCOMP_VOL BL31

2 OF 10

RSVD

DDR MUXING

CLK

DMI

CFG

PM

NC

MISC

ME

GRAPHICS VID

U40B 2 OF 10

RSVD

DDR MUXING

CLK

DMI

CFG

PM

NC

MISC

ME

GRAPHICS VID

U40B

12R77 Do Not StuffR77 Do Not Stuff 1 2

R95 39R2F-GPR95 39R2F-GP

12

R7224D9R2F-L-GP

R7224D9R2F-L-GP



DYR254 Do Not Stuff

DY



12

C440

SCD01U16V2KX-3GP

C440

SCD01U16V2KX-3GP

12 R303100R2J-2-GP

R303100R2J-2-GP


1 2 3 45678

RN36SRN10KJ-6-GPRN36SRN10KJ-6-GP

12

R253392R2F-GPR253392R2F-GP


DYR251 Do Not Stuff

DY

12

R7810KR2J-3-GP

R7810KR2J-3-GP

12R93

150R2F-1-GPR93

150R2F-1-GP

12R82Do Not Stuff R82Do Not Stuff

12R99

150R2F-1-GPR99

150R2F-1-GP


12

C457

Do Not Stuff DYC457

Do Not Stuff DY 1 2R246 0R2J-2-GPR246 0R2J-2-GP

12

R80Do Not StuffR80Do Not Stuff


12

C442SC2D2U6D3V3MX-1-GP

C442SC2D2U6D3V3MX-1-GP



12R252Do Not Stuff

DYR252Do Not Stuff

DY



L_BKLT_CTRLJ40L_BKLT_ENH39L_CTRL_CLKE39L_CTRL_DATAE40L_DDC_CLKC37L_DDC_DATAD35L_VDD_ENK40

LVDS_IBGL41LVDS_VBGL43

LVDS_VREFLN40LVDS_VREFHN41

LVDSA_CLKC45LVDSB_CLK#D44

LVDSA_CLK#D46

LVDSB_CLKE42

LVDSB_DATA2A45LVDSB_DATA1A47

LVDSB_DATA#2B45LVDSB_DATA#1B47

LVDSB_DATA0E44

LVDSA_DATA1E50

LVDSA_DATA#1E51

LVDSA_DATA2F48

LVDSA_DATA#2F49

LVDSB_DATA#0G44

LVDSA_DATA0G50

LVDSA_DATA#0G51

TVA_DACE27

TVA_RTNF27

TVB_DACG27

TVB_RTNJ27

TVC_DACK27

TVC_RTNL27

TV_DCONSEL0M35TV_DCONSEL1P33

CRT_RED#E29

CRT_VSYNCE33CRT_TVO_IREFC32

CRT_REDF29

CRT_HSYNCF33

CRT_BLUE#G32

CRT_DDC_DATAG35

CRT_BLUEH32

CRT_GREEN#J29CRT_GREENK29

CRT_DDC_CLKK33

PEG_COMPI N43PEG_COMPO M43

PEG_RX#2 N47

PEG_RX1 L50

PEG_RX#1 L51

PEG_RX2 M47

PEG_RX5 T41

PEG_RX#3 T45

PEG_RX4 T49

PEG_RX#4 T50PEG_RX#5 U40

PEG_RX3 U44

PEG_RX#7 Y40PEG_RX#6 Y44

PEG_RX9 Y48PEG_RX8 AB50

PEG_RX#8 AB51

PEG_RX7 W41PEG_RX6 W45

PEG_RX#9 W49

PEG_RX11 AC41PEG_RX10 AC45

PEG_RX#11 AD40PEG_RX#10 AD44

PEG_RX#15 AG41

PEG_RX15 AG42

PEG_RX#14 AG45

PEG_RX#12 AG46

PEG_RX13 AG49

PEG_RX0 J50

PEG_RX#0 J51

PEG_RX14 AH45

PEG_RX12 AH47

PEG_RX#13 AH49

PEG_TX#6 Y43

PEG_TX#8 W38PEG_TX#7 W46

PEG_TX#12 AC42

PEG_TX#10 AC46PEG_TX#11 AC49

PEG_TX#9 AD39

PEG_TX#14 AE49PEG_TX#13 AH39

PEG_TX#15 AH44

PEG_TX#0 N45

PEG_TX#3 N51PEG_TX#4 R50PEG_TX#5 T42

PEG_TX#1 U39PEG_TX#2 U47

PEG_TX8 Y39PEG_TX7 Y47PEG_TX6 W42

PEG_TX9 AC38

PEG_TX11 AC50PEG_TX12 AD43

PEG_TX10 AD47

PEG_TX14 AE50PEG_TX13 AG39

PEG_TX15 AH43

PEG_TX3 N50

PEG_TX0 M45

PEG_TX4 R51

PEG_TX1 T38PEG_TX2 T46

PEG_TX5 U43

LVDSA_DATA#3C48

LVDSA_DATA3D47

3 OF 10

LVDS

TV

VGA

PCI_EXPRESS GRAPHICS

U40C 3 OF 10

LVDS

TV

VGA

PCI_EXPRESS GRAPHICS

U40C

12

R2431KR2F-3-GPR2431KR2F-3-GP

12

R8820KR2J-L2-GPR8820KR2J-L2-GP

12R106

150R2F-1-GPR106

150R2F-1-GP1 2R112 Do Not StuffR112 Do Not Stuff

1 2R301 20R2F-GPR301 20R2F-GP

12 R255Do Not Stuff R255Do Not Stuff


12R104

150R2F-1-GPR104

150R2F-1-GP

12345

678

RN35

SRN10KJ-6-GP

RN35

SRN10KJ-6-GP





1 2R96 1K3R2F-1-GPR96 1K3R2F-1-GP

12R105

150R2F-1-GPR105

150R2F-1-GP


1 2R299 20R2F-GPR299 20R2F-GP

12

R2891KR2F-3-GP

R2891KR2F-3-GP

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

M_A_DQS#3

M_A_DQS#0

M_A_DQS#6

M_A_DQS#4

M_A_DQS#1M_A_DQS#2

M_A_DQS#5

M_A_DQS#7

M_A_A0

M_A_A6

M_A_A3

M_A_A5

M_A_A7

M_A_A1M_A_A2

M_A_A4

M_A_A10

M_A_A8

M_A_A13

M_A_A11

M_A_A9

M_A_A12

M_A_DQS#[7..0]

M_A_A[14..0]

M_B_DQS#[7..0]M_B_DQS#0M_B_DQS#1M_B_DQS#2M_B_DQS#3M_B_DQS#4M_B_DQS#5M_B_DQS#6M_B_DQS#7

M_B_DQ0M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11

M_B_DQ15

M_B_DQ13M_B_DQ12

M_B_DQ14

M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19

M_B_DQ23

M_B_DQ21M_B_DQ20

M_B_DQ22

M_B_DQ28

M_B_DQ26

M_B_DQ29

M_B_DQ25

M_B_DQ31

M_B_DQ24

M_B_DQ27

M_B_DQ30

M_B_DQ32M_B_DQ33M_B_DQ34M_B_DQ35

M_B_DQ39

M_B_DQ37M_B_DQ36

M_B_DQ38

M_B_DQ44

M_B_DQ42

M_B_DQ45

M_B_DQ41

M_B_DQ47

M_B_DQ40

M_B_DQ43

M_B_DQ46

M_A_DM[7..0]M_A_DM0

M_B_DQ48M_B_DQ49M_B_DQ50

M_A_DM1M_A_DM2M_A_DM3M_A_DM4M_A_DM5

M_B_DQ51

M_B_DQ55

M_B_DQ53M_B_DQ52

M_B_DQ54

M_B_DQ60

M_B_DQ58

M_B_DQ61

M_A_DM6M_A_DM7

M_B_DQ57

M_B_DQ63

M_B_DQ56

M_B_DQ59

M_B_DQ62

M_B_DQ[63..0]

M_A_DQ44

M_A_DQ36

M_A_DQ47

M_A_DQ40M_A_DQ39

M_A_DQ37

M_A_DQ35M_A_DQ34

M_A_DQ59

M_A_DQ54M_A_DQ53

M_A_DQ63

M_A_DQ60M_A_DQ61

M_A_DQ58

M_A_DQ51

M_A_DQ48

M_A_DQ57

M_A_DQ55

M_A_DQ49M_A_DQ50

M_A_DQ62

M_A_DQ52

M_A_DQ56

M_A_DQ[63..0]M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3

M_A_DQ7

M_A_DQ5M_A_DQ4

M_A_DQ6

M_A_DQ12

M_A_DQ10

M_A_DQ13

M_A_DQ9M_A_DQ8

M_A_DQ11

M_A_DQ15M_A_DQ14

M_A_DQ27

M_A_DQ25

M_A_DQ20M_A_DQ19

M_A_DQ30

M_A_DQ18

M_A_DQ16

M_A_DQ28

M_A_DQ17

M_A_DQ26

M_A_DQ31

M_A_DQ29

M_A_DQ22M_A_DQ23M_A_DQ24

M_A_DQ21

M_A_DQ46

M_A_DQ42

M_A_DQ38

M_A_DQ32

M_A_DQ45

M_A_DQ33

M_A_DQ43

M_A_DQ41

M_B_DQS[7..0]M_B_DQS0M_B_DQS1M_B_DQS2M_B_DQS3M_B_DQS4M_B_DQS5M_B_DQS6M_B_DQS7

M_A_DQS[7..0]

M_A_DQS5

M_A_DQS7

M_A_DQS2M_A_DQS3M_A_DQS4

M_A_DQS0M_A_DQS1

M_A_DQS6

SB_RCVEN#

M_B_A12

M_B_A9

M_B_A11

M_B_A13

M_B_A8

M_B_A10

M_B_A[14..0]M_B_A0M_B_A1M_B_A2M_B_A3M_B_A4M_B_A5M_B_A6M_B_A7

SA_RCVEN#

M_B_DM[7..0]M_B_DM0M_B_DM1M_B_DM2M_B_DM3M_B_DM4M_B_DM5M_B_DM6M_B_DM7

M_A_A14M_B_A14

M_A_DQS#[7..0] 12M_B_DQS#[7..0] 12

M_B_DQS[7..0] 12M_A_DQS[7..0] 12

M_B_DQ[63..0]12M_A_DQ[63..0]12

M_A_BS#0 12,13M_A_BS#1 12,13M_A_BS#2 12,13

M_A_A[14..0] 12,13

M_A_DM[7..0] 12

M_B_BS#0 12,13M_B_BS#1 12,13M_B_BS#2 12,13

M_B_WE# 12,13

M_B_RAS# 12,13

M_B_A[14..0] 12,13

M_A_WE# 12,13

M_A_RAS# 12,13

M_B_DM[7..0] 12

M_A_CAS# 12,13M_B_CAS# 12,13

Title


Date: Sheet of


GMCH (3 of 6)


Title


Date: Sheet of


GMCH (3 of 6)


Title


Date: Sheet of


GMCH (3 of 6)


Place Test PAD Near to Chipascould as possible

Place Test PAD Near to Chipas could as possible

SB_DQ2AW50SB_DQ3AW51

SB_DQ1AR51SB_DQ0AP49

SB_DQ20BK47SB_DQ21BK49

SB_DQ19BL43

SB_DQ4AN51SB_DQ5AN50SB_DQ6AV50SB_DQ7AV49SB_DQ8BA50SB_DQ9BB50SB_DQ10BA49SB_DQ11BE50SB_DQ12BA51SB_DQ13AY49SB_DQ14BF50SB_DQ15BF49SB_DQ16BJ50SB_DQ17BJ44SB_DQ18BJ43

SB_DQ22BK43SB_DQ23BK42SB_DQ24BJ41SB_DQ25BL41SB_DQ26BJ37SB_DQ27BJ36SB_DQ28BK41SB_DQ29BJ40SB_DQ30BL35SB_DQ31BK37SB_DQ32BK13SB_DQ33BE11SB_DQ34BK11SB_DQ35BC11SB_DQ36BC13SB_DQ37BE12SB_DQ38BC12SB_DQ39BG12SB_DQ40BJ10SB_DQ41BL9SB_DQ42BK5SB_DQ43BL5SB_DQ44BK9SB_DQ45BK10SB_DQ46BJ8SB_DQ47BJ6SB_DQ48BF4SB_DQ49BH5SB_DQ50BG1SB_DQ51BC2SB_DQ52BK3SB_DQ53BE4SB_DQ54BD3SB_DQ55BJ2SB_DQ56BA3SB_DQ57BB3SB_DQ58AR1SB_DQ59AT3SB_DQ60AY2SB_DQ61AY3SB_DQ62AU2SB_DQ63AT2

SB_BS0 AY17SB_BS1 BG18SB_BS2 BG36

SB_CAS# BE17

SB_DM7 AW2

SB_DM0 AR50SB_DM1 BD49

SB_DM4 BH12

SB_DM6 BF3SB_DM5 BJ7

SB_DM2 BK45SB_DM3 BL39

SB_DQS0 AT50SB_DQS1 BD50SB_DQS2 BK46SB_DQS3 BK39SB_DQS4 BJ12SB_DQS5 BL7SB_DQS6 BE2SB_DQS7 AV2

SB_DQS#0 AU50SB_DQS#1 BC50SB_DQS#2 BL45SB_DQS#3 BK38SB_DQS#4 BK12SB_DQS#5 BK7SB_DQS#6 BF2SB_DQS#7 AV3

SB_MA11 BE37

SB_MA4 BF25

SB_MA13 BG13

SB_MA10 BG17

SB_MA2 BG25SB_MA1 BG28

SB_MA3 AW17

SB_MA8 AY28

SB_MA6 BA29

SB_MA12 BA39

SB_MA0 BC18

SB_MA7 BC28

SB_MA9 BD37

SB_MA5 BE25

SB_RAS# AV16SB_RCVEN# AY18

SB_WE# BC17

SB_MA14 BE24

DDR SYSTEM MEMORY B

5 OF 10U40E

DDR SYSTEM MEMORY B

5 OF 10U40E


SA_DQ1AW44

SA_DQ7AW47

SA_DQ4AR41

SA_DQ0AR43

SA_DQ5AR45SA_DQ6AT42

SA_DQS0 AT46

SA_DQS#0 AT47

SA_DQ3AY46

SA_DQS#4 BA16SA_DQS#3 BA37

SA_DQ2BA45

SA_DQS4 BB16

SA_DQS6 BB2

SA_DQS2 BB43

SA_DQS#6 BC1

SA_DQS3 BC37

SA_DQS#2 BC41SA_DQS#1 BD47

SA_DQS#5 BH7

SA_DQS1 BE48

SA_DQ9BF48

SA_DQS#7 AP2

SA_DQS7 AP3

SA_DQ8BB45

SA_DQ10BG47SA_DQ11BJ45SA_DQ12BB47SA_DQ13BG50SA_DQ14BH49

SA_DQS5 BH6

SA_DQ16AW43SA_DQ15BE45

SA_BS0 BB19SA_BS1 BK19SA_BS2 BF29

SA_CAS# BL17

SA_DM4 AW13SA_DM3 AW38

SA_DM0 AT45

SA_DM6 AY5

SA_DM2 BD42SA_DM1 BD44

SA_DM5 BG8

SA_DM7 AN6

SA_DQ17BE44SA_DQ18BG42SA_DQ19BE40SA_DQ20BF44SA_DQ21BH45SA_DQ22BG40SA_DQ23BF40SA_DQ24AR40SA_DQ25AW40SA_DQ26AT39SA_DQ27AW36SA_DQ28AW41SA_DQ29AY41SA_DQ30AV38SA_DQ31AT38SA_DQ32AV13SA_DQ33AT13SA_DQ34AW11SA_DQ35AV11SA_DQ36AU15SA_DQ37AT11SA_DQ38BA13SA_DQ39BA11SA_DQ40BE10SA_DQ41BD10SA_DQ42BD8SA_DQ43AY9SA_DQ44BG10SA_DQ45AW9SA_DQ46BD7SA_DQ47BB9SA_DQ48BB5SA_DQ49AY7SA_DQ50AT5SA_DQ51AT7SA_DQ52AY6SA_DQ53BB7SA_DQ54AR5SA_DQ55AR8SA_DQ56AR9SA_DQ57AN3SA_DQ58AM8SA_DQ59AN10SA_DQ60AT9SA_DQ61AN9SA_DQ62AM9SA_DQ63AN11

SA_MA3 BH28

SA_MA13 BJ16

SA_MA0 BJ19

SA_MA7 BJ25SA_MA6 BJ27

SA_MA12 BG30

SA_MA2 BK27

SA_MA5 BK28SA_MA4 BL24

SA_MA8 BL28SA_MA9 BA28

SA_MA10 BC19

SA_MA1 BD20

SA_MA11 BE28

SA_RAS# BE18SA_RCVEN# AY20

SA_WE# BA19

SA_MA14 BJ29

DDR SYSTEM MEMORRY A

4 OF 10U40D

DDR SYSTEM MEMORRY A

4 OF 10U40D


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

SM_LF6_GMCHSM_LF7_GMCH

SM_LF1_GMCHSM_LF2_GMCHSM_LF3_GMCHSM_LF4_GMCHSM_LF5_GMCH

1D05V_S0

1D05V_S0

1D8V_S3

1D05V_S0

1D05V_S0

1D05V_S0

1D05V_S0

Title


Date: Sheet of


GMCH (4 of 6)


Title


Date: Sheet of


GMCH (4 of 6)


Title


Date: Sheet of


GMCH (4 of 6)


FOR VCC CORE

FOR VCC CORE AND VCC NCTF

Place on the Edge

FOR VCC AXM NCTF AND VCC AXM

Coupling CAP 370 mils from the Edge

Coupling CAP

Coupling CAP

308 mils fromthe Edge

FOR VCC SM

Place on the Edge

Place CAP whereLVDS and DDR2 taps

VCC_AXG_NCTF + VCC_AXG=7700mA

1573mA

3138mA

VCC_AXM_NCTF + VCC_AXM=540mA

VCC_NCTF + VCC=1573mA

-1_20070201

12

C10

8S

C10

U6D

3V5K

X-1

GP

C10

8S

C10

U6D

3V5K

X-1

GP

12

C14

2S

CD

1U10

V2K

X-4

GP

C14

2S

CD

1U10

V2K

X-4

GP

12

C10

6S

CD

1U10

V2K

X-4

GP

C10

6S

CD

1U10

V2K

X-4

GP1

2C

180

SC

D1U

10V

2KX

-4G

PC

180

SC

D1U

10V

2KX

-4G

P12

C22

1S

CD

1U10

V2K

X-4

GP

C22

1S

CD

1U10

V2K

X-4

GP 1

2C

103

SC

D1U

10V

2KX

-4G

PC

103

SC

D1U

10V

2KX

-4G

P

12

C16

5S

CD

1U10

V2K

X-4

GP

C16

5S

CD

1U10

V2K

X-4

GP

12

C14

6S

CD

1U10

V2K

X-4

GP

C14

6S

CD

1U10

V2K

X-4

GP

12

C134

SC

D1U

10V

2KX

-4G

PC134

SC

D1U

10V

2KX

-4G

P

12

C15

3S

CD

1U10

V2K

X-4

GP

C15

3S

CD

1U10

V2K

X-4

GP

12

C16

7S

CD

1U10

V2K

X-4

GP

C16

7S

CD

1U10

V2K

X-4

GP

12

C47

8S

CD

1U10

V2K

X-4

GP

C47

8S

CD

1U10

V2K

X-4

GP

12

C12

3S

CD

1U10

V2K

X-4

GP

C12

3S

CD

1U10

V2K

X-4

GP

VCCAT34VCCAT35

VCCAC31VCCAC32

VCCAF32

VCCAH28

VCCAH29VCCAH31VCCAH32

VCCAK32

VCCR30

VCCAJ28VCCAJ31

VCC_SMBE32VCC_SMBE33VCC_SMBE35

VCC_SMAU32VCC_SMAU33VCC_SMAU35VCC_SMAV33VCC_SMAW33VCC_SMAW35VCC_SMAY35VCC_SMBA32VCC_SMBA33VCC_SMBA35VCC_SMBB33VCC_SMBC32VCC_SMBC33VCC_SMBC35VCC_SMBD32VCC_SMBD35

VCC_SMBF33VCC_SMBF34VCC_SMBG32VCC_SMBG33VCC_SMBG35

VCC_SMBJ32VCC_SMBJ33VCC_SMBJ34

VCC_SMBH32VCC_SMBH34VCC_SMBH35

VCC_SMBK32VCC_SMBK33VCC_SMBK34VCC_SMBK35VCC_SMBL33VCC_SMAU30

VCC_AXGAA20VCC_AXGAA23VCC_AXGAA26VCC_AXGAA28

VCC_AXGAA31

VCC_AXGAB21VCC_AXGAB24VCC_AXGAB29VCC_AXGAC20VCC_AXGAC21VCC_AXGAC23VCC_AXGAC24VCC_AXGAC26VCC_AXGAC28VCC_AXGAC29VCC_AXGAD20VCC_AXGAD23VCC_AXGAD24VCC_AXGAD28

VCC_AXGAD31

VCC_AXGAF21VCC_AXGAF26

VCC_AXGAH20VCC_AXGAH21VCC_AXGAH23VCC_AXGAH24VCC_AXGAH26

VCC_AXGR20VCC_AXGT14VCC_AXGW13VCC_AXGW14VCC_AXGY12

VCC_AXGAJ20VCC_AXGAN14

VCC_AXG_NCTF AA16VCC_AXG_NCTF AA17VCC_AXG_NCTF AB16VCC_AXG_NCTF AB19VCC_AXG_NCTF AC16VCC_AXG_NCTF AC17VCC_AXG_NCTF AC19

VCC_SM_LF AW45VCC_SM_LF BC39VCC_SM_LF BE39VCC_SM_LF BD17VCC_SM_LF BD4VCC_SM_LF AW8VCC_SM_LF AT6

VCC_AXG_NCTF T17VCC_AXG_NCTF T18VCC_AXG_NCTF T19VCC_AXG_NCTF T21VCC_AXG_NCTF T22VCC_AXG_NCTF T23VCC_AXG_NCTF T25VCC_AXG_NCTF U15VCC_AXG_NCTF U16VCC_AXG_NCTF U17VCC_AXG_NCTF U19VCC_AXG_NCTF U20VCC_AXG_NCTF U21VCC_AXG_NCTF U23VCC_AXG_NCTF U26VCC_AXG_NCTF V16VCC_AXG_NCTF V17VCC_AXG_NCTF V19VCC_AXG_NCTF V20VCC_AXG_NCTF V21VCC_AXG_NCTF V23VCC_AXG_NCTF V24VCC_AXG_NCTF Y15VCC_AXG_NCTF Y16VCC_AXG_NCTF Y17VCC_AXG_NCTF Y19VCC_AXG_NCTF Y20VCC_AXG_NCTF Y21VCC_AXG_NCTF Y23VCC_AXG_NCTF Y24VCC_AXG_NCTF Y26VCC_AXG_NCTF Y28VCC_AXG_NCTF Y29

VCC_AXG_NCTF AD15VCC_AXG_NCTF AD16VCC_AXG_NCTF AD17VCC_AXG_NCTF AF16VCC_AXG_NCTF AF19VCC_AXG_NCTF AH15VCC_AXG_NCTF AH16VCC_AXG_NCTF AH17VCC_AXG_NCTF AH19VCC_AXG_NCTF AJ16VCC_AXG_NCTF AJ17VCC_AXG_NCTF AJ19VCC_AXG_NCTF AK16VCC_AXG_NCTF AK19VCC_AXG_NCTF AL16VCC_AXG_NCTF AL17VCC_AXG_NCTF AL19VCC_AXG_NCTF AL20VCC_AXG_NCTF AL21VCC_AXG_NCTF AL23VCC_AXG_NCTF AM15VCC_AXG_NCTF AM16VCC_AXG_NCTF AM19VCC_AXG_NCTF AM20VCC_AXG_NCTF AM21VCC_AXG_NCTF AM23VCC_AXG_NCTF AP15VCC_AXG_NCTF AP16VCC_AXG_NCTF AP17VCC_AXG_NCTF AP19VCC_AXG_NCTF AP20VCC_AXG_NCTF AP21VCC_AXG_NCTF AP23VCC_AXG_NCTF AP24VCC_AXG_NCTF AR20VCC_AXG_NCTF AR21VCC_AXG_NCTF AR23VCC_AXG_NCTF AR24

VCC_AXG_NCTF V26VCC_AXG_NCTF V28VCC_AXG_NCTF V29VCC_AXG_NCTF Y31

VCC_AXG_NCTF AR26

6 OF 10

POWER

VCC CORE

VCC SM

VCC GFX NCTF

VCC GFX

VCC SM LF

U40F 6 OF 10

POWER

VCC CORE

VCC SM

VCC GFX NCTF

VCC GFX

VCC SM LF

U40F

12

C11

8S

CD

1U10

V2K

X-4

GP

C11

8S

CD

1U10

V2K

X-4

GP

12

C19

1S

CD

1U10

V2K

X-4

GP

C19

1S

CD

1U10

V2K

X-4

GP

12

C184

SC

D1U

10V

2KX

-4G

P

UMAC184

SC

D1U

10V

2KX

-4G

P

UMA

C169SC4D7U10V5ZY-3GPUMA

C169SC4D7U10V5ZY-3GPUMA

12

TC8

Do N

ot StuffDY

TC8

Do N

ot StuffDY

12

C11

1S

CD

1U10

V2K

X-4

GP

C11

1S

CD

1U10

V2K

X-4

GP

12

C17

8S

CD

1U10

V2K

X-4

GP

C17

8S

CD

1U10

V2K

X-4

GP

12

C12

9S

CD

1U10

V2K

X-4

GP

C12

9S

CD

1U10

V2K

X-4

GP

12

C12

7S

C10

U6D

3V5K

X-1

GP

C12

7S

C10

U6D

3V5K

X-1

GP

12

C18

8S

CD

1U10

V2K

X-4

GP

UMA

C18

8S

CD

1U10

V2K

X-4

GP

UMA

12

C12

1S

C10

U6D

3V5K

X-1

GP

C12

1S

C10

U6D

3V5K

X-1

GP

12

C14

5S

CD

1U10

V2K

X-4

GP

C14

5S

CD

1U10

V2K

X-4

GP

12

C17

6S

CD

1U10

V2K

X-4

GP

C17

6S

CD

1U10

V2K

X-4

GP

12

C20

1S

CD

1U10

V2K

X-4

GP

C20

1S

CD

1U10

V2K

X-4

GP

VCC_NCTFAK33VCC_NCTFAK35VCC_NCTFAK36VCC_NCTFAK37

VCC_NCTFAL33VCC_NCTFAL35

VCC_NCTFAJ33VCC_NCTFAJ35

VCC_NCTFAJ36VCC_NCTFAM35

VCC_NCTFT30VCC_NCTFT34VCC_NCTFT35VCC_NCTFU29

VCC_NCTFAP35VCC_NCTFAP36VCC_NCTFAR35VCC_NCTFAR36VCC_NCTFY32VCC_NCTFY33VCC_NCTFY35VCC_NCTFY36VCC_NCTFY37

VCC_NCTFAA33VCC_NCTFAA35VCC_NCTFAA36

VCC_NCTFAD33

VCC_NCTFAF36

VCC_NCTFAB33VCC_NCTFAB36VCC_NCTFAB37VCC_NCTFAC33VCC_NCTFAC35VCC_NCTFAC36VCC_NCTFAD35VCC_NCTFAD36VCC_NCTFAF33

VCC_NCTFAH33VCC_NCTFAH35VCC_NCTFAH36VCC_NCTFAH37

VCC_NCTFU31VCC_NCTFU32VCC_NCTFU33VCC_NCTFU35VCC_NCTFU36VCC_NCTFV32VCC_NCTFV33VCC_NCTFV36VCC_NCTFV37

VCC_AXM_NCTFAL24VCC_AXM_NCTFAL26VCC_AXM_NCTFAL28VCC_AXM_NCTFAM26VCC_AXM_NCTFAM28VCC_AXM_NCTFAM29VCC_AXM_NCTFAM31VCC_AXM_NCTFAM32VCC_AXM_NCTFAM33VCC_AXM_NCTFAP29VCC_AXM_NCTFAP31VCC_AXM_NCTFAP32VCC_AXM_NCTFAP33VCC_AXM_NCTFAL29VCC_AXM_NCTFAL31VCC_AXM_NCTFAL32VCC_AXM_NCTFAR31VCC_AXM_NCTFAR32VCC_AXM_NCTFAR33

VSS_NCTF T27VSS_NCTF T37VSS_NCTF U24VSS_NCTF U28VSS_NCTF V31VSS_NCTF V35VSS_NCTF AA19VSS_NCTF AB17VSS_NCTF AB35VSS_NCTF AD19VSS_NCTF AD37VSS_NCTF AF17VSS_NCTF AF35

VSS_NCTF AM17VSS_NCTF AK17

VSS_NCTF AM24VSS_NCTF AP26VSS_NCTF AP28VSS_NCTF AR15VSS_NCTF AR19VSS_NCTF AR28

VSS_SCB A3VSS_SCB B2VSS_SCB C1VSS_SCB BL1VSS_SCB BL51VSS_SCB A51

VCC_AXM AT31VCC_AXM AT33

VCC_AXM AK29

VCC_AXM AJ23VCC_AXM AJ26VCC_AXM AK23VCC_AXM AK24

7 OF 10

POWER

VCC NCTF

VSS NCTF

VSS SCB

VSS AXM

VSS AXM NCTF

U40G 7 OF 10

POWER

VCC NCTF

VSS NCTF

VSS SCB

VSS AXM

VSS AXM NCTF

U40G

12

C11

2S

CD

1U10

V2K

X-4

GP

C11

2S

CD

1U10

V2K

X-4

GP

12

C12

4S

CD

1U10

V2K

X-4

GP

C12

4S

CD

1U10

V2K

X-4

GP

12

C19

2S

CD

1U10

V2K

X-4

GP

C19

2S

CD

1U10

V2K

X-4

GP

12

C11

7S

CD

1U10

V2K

X-4

GP

C11

7S

CD

1U10

V2K

X-4

GP

12

C11

0S

C10

U6D

3V5K

X-1

GP

C11

0S

C10

U6D

3V5K

X-1

GP

12

C16

1S

CD

1U10

V2K

X-4

GP

C16

1S

CD

1U10

V2K

X-4

GP

12

C99

SC

D1U

10V

2KX

-4G

PC

99S

CD

1U10

V2K

X-4

GP

12

C10

9S

C10

U6D

3V5K

X-1

GP

C10

9S

C10

U6D

3V5K

X-1

GP

12

C185

SC

D1U

10V

2KX

-4G

P

UMAC185

SC

D1U

10V

2KX

-4G

P

UMA

12

C14

1S

CD

1U10

V2K

X-4

GP

C14

1S

CD

1U10

V2K

X-4

GP

12

TC6

ST220U

2D5V

BM

-2GP

UMATC6

ST220U

2D5V

BM

-2GP

UMA

12

C166SCD1U10V2KX-4GP

UMA

C166SCD1U10V2KX-4GP

UMA

12

C10

7S

CD

1U10

V2K

X-4

GP

C10

7S

CD

1U10

V2K

X-4

GP

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

M_VCCA_HPLL

M_VCCA_MPLL

M_VCCA_DPLLA

M_VCCA_DPLLB

M_VCCA_DAC_BG

1D25V_PEGPLL

1D5V_TVDAC

3D3VTVDAC

1D5V_TVDAC

3D3VTVDAC

1D25V_PEGPLL

3D3VTVDAC

VTTLF1VTTLF2VTTLF3

1D05V_HV_S0

M_VCCA_DPLLB

M_VCCA_DPLLA

M_VCCA_MPLL

M_VCCA_HPLL

1D25V_PEGPLL

1D5V_TVDAC

3D3V_SYNC_S0

3D3V_CRTDAC_S0

M_VCCA_DAC_BG

1D8V_TXLVDS

1D8V_SUS_DLVDS

1D25V_S0

1D25V_S0

3D3V_S0

1D25V_S0

1D8V_S3

1D8V_TXLVDS_S3

1D05V_S0

1D05V_S0

3D3V_S0

1D05V_S0

1D25V_S0

1D25V_S0

1D8V_S3

1D05V_S0

3D3V_S0

1D25V_S0

1D25V_S0

1D25V_S0

1D5V_S0

3D3V_S0

3D3V_S0

1D8V_TXLVDS_S3

1D8V_S3

1D25V_SUS_MCH_PLL2

1D25V_SUS_MCH_PLL2

3D3VTVDAC3D3V_S0

1D5V_TVDAC

Title


Date: Sheet of


GMCH (5 of 6)

10 42Thursday, March 01, 2007Biwa SB

Title


Date: Sheet of


GMCH (5 of 6)


Title


Date: Sheet of


GMCH (5 of 6)


Place on the edge

120ohm 100MHz

120ohm 100MHz

220ohm 100MHz

180ohm 100MHz

180ohm 100MHz

180ohm 100MHz

850mA

1200mA

100mA

250mA

400uA

80mA

10mA

60mA

100mA

60mA

40mA40mA40mA

5mA

5mA

150mA

10mA

100mA

80mA80mA50mA150mA

100mA250mA

180ohm 100MHz

200mA

350mA

200mA

100mA

SB modify

VCC_SYNCJ32

VCCA_CRT_DACA33VCCA_CRT_DACB33

VCCA_DAC_BGA30

VSSA_DAC_BGB32

VCCA_DPLLAB49

VCCA_SMAW18

VCCA_LVDSA41

VCCA_DPLLBH49

VCCA_PEG_BGK50

VCCA_HPLLAL2

VCCA_MPLLAM2

VCCA_PEG_PLLU51

VSSA_LVDSB41

VSSA_PEG_BGK49

VCCA_SMAU19VCCA_SMAV19

VCCA_TVC_DACA28

VCCA_TVA_DACB25

VCCA_TVB_DACB27VCCA_TVC_DACB28

VCCA_SMAT17VCCA_SMAT18VCCA_SMAT19VCCA_SMAT21VCCA_SMAT22

VCCA_TVA_DACC25

VCCA_TVB_DACC27

VCCA_SM_CKBB29VCCA_SM_CKBC29

VCCA_SM_NCTFAR16VCCA_SM_NCTFAR17

VCCA_SMAU18VCCA_SMAU17

VCCD_CRTM32VCCD_TVDACL29

VCCD_QDACN28

VCCD_HPLLAN2

VCCD_PEG_PLLU48

VCCD_LVDSJ41VCCD_LVDSH42

VTT R1VTT R2VTT R3

VTT T10VTT T11VTT T13

VTT T2VTT T3VTT T5VTT T6VTT T7VTT T9

VTT U1

VTT U11VTT U12VTT U13

VTT U2VTT U3VTT U5VTT U7VTT U8VTT U9

VCC_AXD AU24VCC_AXD AU28VCC_AXD AT23

VCC_AXD AT25VCC_AXD AT29

VCC_AXD AT30

VCC_AXD_NCTF AR29

VCC_AXF A21VCC_AXF B21VCC_AXF B23

VCC_DMI AJ50

VCC_SM_CK BJ23VCC_SM_CK BJ24VCC_SM_CK BK23VCC_SM_CK BK24

VCC_TX_LVDS A43

VCC_HV C40VCC_HV B40

VCC_PEG V49VCC_PEG V50

VCC_PEG W50VCC_PEG W51

VCC_PEG AD51

VCC_RXR_DMI AH50VCC_RXR_DMI AH51

VTTLF A7

VTTLF AH1VTTLF F2

8 OF 10

LVDS

TV/CRT

VTTLF

DMI

PEG

HV

TV

A CK

A SM

SM CK

AXF

A PEG AXD

A LVDS

PLL

CRT

VTT

POWER

U40H 8 OF 10

LVDS

TV/CRT

VTTLF

DMI

PEG

HV

TV

A CK

A SM

SM CK

AXF

A PEG AXD

A LVDS

PLL

CRT

VTT

POWER

U40H

12

C215

SC

10U

6D3V

5KX

-1G

P

C215

SC

10U

6D3V

5KX

-1G

P

12

C438

SC2D2U6D3V3MX-1-GPUMAC438

SC2D2U6D3V3MX-1-GPUMA

12L9

FCM1608CF-1-GP68.00217.141

UMA L9

FCM1608CF-1-GP68.00217.141

UMA

12

C114SCD1U10V2KX-4GP

UMA C114SCD1U10V2KX-4GP

UMA

12

R317Do Not StuffR317Do Not Stuff

12

TC7Do Not Stuff

DYTC7

Do Not Stuff

DY

12

C423

SCD1U10V2KX-4GP

UMAC423

SCD1U10V2KX-4GP

UMA

12

C139

SCD1U10V2KX-4GP

C139

SCD1U10V2KX-4GP

12

C393

SC10U6D3V5KX-1GPUMAC393

SC10U6D3V5KX-1GPUMA

12

C20

6S

CD

1U10

V2K

X-4

GP

C20

6S

CD

1U10

V2K

X-4

GP

12

C402SCD1U10V2KX-4GPC402SCD1U10V2KX-4GP

12

C47

4S

CD

1U10

V2K

X-4

GP

C47

4S

CD

1U10

V2K

X-4

GP

12


12

C452



12

C453

SC

10U

6D3V

5KX

-1G

P

C453

SC

10U

6D3V

5KX

-1G

P

12

C105

SCD1U10V2KX-4GPUMAC105

SCD1U10V2KX-4GPUMA

12

C95

SC

D1U

10V

2KX

-4G

PC

95S

CD

1U10

V2K

X-4

GP

12

C19

4S

CD

1U10

V2K

X-4

GP

C19

4S

CD

1U10

V2K

X-4

GP

12

C15

6S

C1U

10V

2KX

-GP

C15

6S

C1U

10V

2KX

-GP


12

C449


SCD1U10V2KX-4GPUMA

12

C17

7S

C1U

10V

2KX

-GP

C17

7S

C1U

10V

2KX

-GP

12

C382

SC10U6D3V5KX-1GP

C382

SC10U6D3V5KX-1GP

12

C15

9S

C1U

10V

2KX

-GP

C15

9S

C1U

10V

2KX

-GP

12

C119

SC

10U

6D3V

5KX

-1G

P

C119

SC

10U

6D3V

5KX

-1G

P

12

C16

4S

CD

1U10

V2K

X-4

GP

C16

4S

CD

1U10

V2K

X-4

GP

1

2

3

D17BAS16-1-GP

D17BAS16-1-GP

12 R250Do Not Stuff

R250Do Not Stuff

1 2L14 FCM1608KF-121-GP

68.00217.101L14 FCM1608KF-121-GP

68.00217.101

12 R285Do Not Stuff

R285Do Not Stuff

12

C48

0S

C4D

7U6D

3V3K

X-G

PC

480

SC

4D7U

6D3V

3KX

-GP

12

C47

5S

CD

1U10

V2K

X-4

GP

C47

5S

CD

1U10

V2K

X-4

GP

12

C48

1S

C4D

7U6D

3V3K

X-G

PC

481

SC

4D7U

6D3V

3KX

-GP

12


12 R258Do Not Stuff

R258Do Not Stuff

12

C47

2S

C4D

7U6D

3V3K

X-G

PC

472

SC

4D7U

6D3V

3KX

-GP

12

C483SC10U6D3V5KX-1GP

C483SC10U6D3V5KX-1GP

12 R248Do Not Stuff

R248Do Not Stuff

12

C40

6S

CD

1U10

V2K

X-4

GP

C40

6S

CD

1U10

V2K

X-4

GP

12

C411SC1KP50V2KX-1GP

UMAC411

SC1KP50V2KX-1GP

UMA

12

C100

SC10U6D3V5KX-1GP

C100

SC10U6D3V5KX-1GP

12


12

C400

SC10U6D3V5KX-1GP

C400

SC10U6D3V5KX-1GP

12

C410SC1KP50V2KX-1GP

C410SC1KP50V2KX-1GP

12 R240Do Not Stuff

R240Do Not Stuff

12

C42

2S

CD

1U10

V2K

X-4

GP

C42

2S

CD

1U10

V2K

X-4

GP

12

C441


SCD1U10V2KX-4GPUMA

12

C444



12


12

C48

2S

C4D

7U6D

3V3K

X-G

PC

482

SC

4D7U

6D3V

3KX

-GP

1 2L13 FCM1608KF-121-GP

68.00217.101L13 FCM1608KF-121-GP

68.00217.101

12

C48

4S

CD

1U10

V2K

X-4

GP

C48

4S

CD

1U10

V2K

X-4

GP

12

C47

3S

CD

1U10

V2K

X-4

GP

C47

3S

CD

1U10

V2K

X-4

GP

12


12

C401

SC10U6D3V5KX-1GP

C401

SC10U6D3V5KX-1GP

12

C102

Do Not StuffDY

C102

Do Not StuffDY

12

C158SC10U6D3V5KX-1GPC158SC10U6D3V5KX-1GP

12

C424SCD1U10V2KX-4GP

UMAC424SCD1U10V2KX-4GP

UMA

12

C409

SCD1U10V2KX-4GP

C409

SCD1U10V2KX-4GP

12R237

10R2J-2-GP

R237

10R2J-2-GP

12

C15

5S

C10

U6D

3V5K

X-1

GP

C15

5S

C10

U6D

3V5K

X-1

GP

12 R244Do Not Stuff

R244Do Not Stuff

12

C13

8S

CD

1U10

V2K

X-4

GP

C13

8S

CD

1U10

V2K

X-4

GP

12

C17

2S

C1U

10V

2KX

-GP

C17

2S

C1U

10V

2KX

-GP

12

C435


SCD1U10V2KX-4GPUMA

12

C148Do Not StuffDYC148Do Not StuffDY

12

C101

SC

10U

6D3V

5KX

-1G

P

C101

SC

10U

6D3V

5KX

-1G

P

12

C135


SCD1U10V2KX-4GPUMA

12

R83

Do Not Stuff

R83

Do Not Stuff

12

C15

7S

C1U

10V

2KX

-GP

C15

7S

C1U

10V

2KX

-GP

12 R286Do Not Stuff

R286Do Not Stuff

12 R249Do Not Stuff

R249Do Not Stuff

12

C18

1S

C10

U6D

3V5K

X-1

GP

C18

1S

C10

U6D

3V5K

X-1

GP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


GMCH (6 of 6)


Title


Date: Sheet of


GMCH (6 of 6)


Title


Date: Sheet of


GMCH (6 of 6)


VSS AW24VSS AW29VSS AW32VSS AW5VSS AW7VSS AY10VSS AY24VSS AY37VSS AY42VSS AY43VSS AY45VSS AY47VSS AY50VSS B10VSS B20VSS B24VSS B29VSS B30VSS B35VSS B38VSS B43VSS B46VSS B5VSS B8VSS BA1VSS BA17VSS BA18VSS BA2VSS BA24VSS BB12VSS BB25VSS BB40VSS BB44VSS BB49VSS BB8VSS BC16VSS BC24VSS BC25VSS BC36VSS BC40VSS BC51VSS BD13VSS BD2VSS BD28VSS BD45VSS BD48VSS BD5VSS BE1VSS BE19VSS BE23VSS BE30VSS BE42VSS BE51VSS BE8VSS BF12VSS BF16VSS BF36VSS BG19VSS BG2VSS BG24VSS BG29VSS BG39VSS BG48VSS BG5VSS BG51VSS BH17VSS BH30VSS BH44VSS BH46VSS BH8VSS BJ11VSS BJ13VSS BJ38VSS BJ4VSS BJ42VSS BJ46VSS BK15VSS BK17VSS BK25VSS BK29VSS BK36VSS BK40VSS BK44VSS BK6VSS BK8VSS BL11VSS BL13VSS BL19VSS BL22VSS BL37VSS BL47VSS C12VSS C16VSS C19VSS C28VSS C29VSS C33VSS C36VSS C41

VSSA13VSSA15VSSA17VSSA24VSSAA21VSSAA24VSSAA29VSSAB20VSSAB23VSSAB26VSSAB28VSSAB31VSSAC10VSSAC13VSSAC3VSSAC39VSSAC43VSSAC47VSSAD1VSSAD21VSSAD26VSSAD29VSSAD3VSSAD41VSSAD45VSSAD49VSSAD5VSSAD50VSSAD8VSSAE10VSSAE14VSSAE6VSSAF20VSSAF23VSSAF24VSSAF31VSSAG2VSSAG38VSSAG43VSSAG47VSSAG50VSSAH3VSSAH40VSSAH41VSSAH7VSSAH9VSSAJ11VSSAJ13VSSAJ21VSSAJ24VSSAJ29VSSAJ32VSSAJ43VSSAJ45VSSAJ49VSSAK20VSSAK21VSSAK26VSSAK28VSSAK31VSSAK51VSSAL1VSSAM11VSSAM13VSSAM3VSSAM4VSSAM41VSSAM45VSSAN1VSSAN38VSSAN39VSSAN43VSSAN5VSSAN7VSSAP4VSSAP48VSSAP50VSSAR11VSSAR2VSSAR39VSSAR44VSSAR47VSSAR7VSSAT10VSSAT14VSSAT41VSSAT49VSSAU1VSSAU23VSSAU29VSSAU3VSSAU36VSSAU49VSSAU51VSSAV39VSSAV48VSSAW1VSSAW12VSSAW16

9 OF 10

VSS

U40I 9 OF 10

VSS

U40I

VSSC46VSSC50VSSC7VSSD13VSSD24VSSD3VSSD32VSSD39VSSD45VSSD49VSSE10VSSE16VSSE24VSSE28VSSE32VSSE47VSSF19VSSF36VSSF4VSSF40VSSF50VSSG1VSSG13VSSG16VSSG19VSSG24VSSG28VSSG29VSSG33VSSG42VSSG45VSSG48VSSG8VSSH24VSSH28VSSH4VSSH45VSSJ11VSSJ16VSSJ2VSSJ24VSSJ28VSSJ33VSSJ35VSSJ39VSSK12VSSK47VSSK8VSSL1VSSL17VSSL20VSSL24VSSL28VSSL3VSSL33VSSL49VSSM28VSSM42VSSM46VSSM49VSSM5VSSM50VSSM9VSSN11VSSN14VSSN17VSSN29VSSN32VSSN36VSSN39VSSN44VSSN49VSSN7VSSP19VSSP2VSSP23VSSP3VSSP50VSSR49VSST39VSST43VSST47VSSU41VSSU45VSSU50VSSV2VSSV3

VSS W11VSS W39VSS W43VSS W47VSS W5VSS W7VSS Y13VSS Y2VSS Y41VSS Y45VSS Y49VSS Y5VSS Y50VSS Y11VSS P29VSS T29VSS T31VSS T33VSS R28

VSS AB32VSS AD32VSS AF28VSS AF29VSS AT27VSS AV25VSS H50

VSS AA32

10 OF 10

VSS

U40J10 OF 10

VSS

U40J

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

M_B_DQS#4

M_B_DQS#2

M_B_DQS#7

M_B_DQS#3

M_B_DQS#6

M_B_DQS#0

M_B_DQS#5

M_B_DQS#1

M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3M_A_DQ4M_A_DQ5

M_A_DQ7M_A_DQ6

M_A_DQ8M_A_DQ9

M_A_DQ11M_A_DQ10


M_A_DQ12

M_A_DQ16M_A_DQ17

M_A_DQ19M_A_DQ18


M_A_DQ20

M_A_DQ28

M_A_DQ31M_A_DQ30

M_A_DQ27

M_A_DQ25M_A_DQ24

M_A_DQ26

M_A_DQ29

M_A_DQ32M_A_DQ33

M_A_DQ35M_A_DQ34


M_A_DQ36

M_A_DQ44

M_A_DQ47

M_A_DQ60

M_A_DQ49

M_A_DQ51M_A_DQ50

M_A_DQ63

M_A_DQ53M_A_DQ54

M_A_DQ46

M_A_DQ43

M_A_DQ41M_A_DQ40

M_A_DQ42

M_A_DQ45

M_A_DQ55

M_A_DQ48

M_A_DQ52

M_A_DQ58

M_A_DQ62M_A_DQ61

M_A_DQ57

M_A_DQ59

M_A_DQ56

SMBC_ICHSMBD_ICH

M_B_A10

M_B_A7

M_B_A1

M_B_A8

M_B_A5

M_B_A2

M_B_A11

M_B_A6

M_B_A3

M_B_A12

M_B_A9

M_B_A0

M_B_A4

M_B_A13

M_B_DM0M_B_DM1

M_B_DM7M_B_DM6M_B_DM5M_B_DM4M_B_DM3M_B_DM2

M_A_A0M_A_A1M_A_A2M_A_A3M_A_A4M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13

M_A_DQS#2M_A_DQS#3

M_A_DQS#5M_A_DQS#6M_A_DQS#7

M_A_DQS#1M_A_DQS#0

M_A_DQS#4

M_B_DQ0

M_B_DQ8

M_B_DQ3

M_B_DQ10

M_B_DQ1

M_B_DQ9

M_B_DQ4

M_B_DQ6

M_B_DQ2

M_B_DQ11

M_B_DQ5

M_B_DQ19

M_B_DQ14

M_B_DQ30

M_B_DQ22

M_B_DQ16

M_B_DQ28

M_B_DQ18

M_B_DQ27

M_B_DQ15

M_B_DQ23

M_B_DQ17

M_B_DQ31

M_B_DQ13

M_B_DQ21

M_B_DQ12

M_B_DQ20

M_B_DQ35

M_B_DQ24

M_B_DQ46

M_B_DQ38

M_B_DQ32

M_B_DQ44

M_B_DQ34

M_B_DQ43

M_B_DQ26

M_B_DQ39

M_B_DQ33

M_B_DQ47

M_B_DQ25

M_B_DQ37

M_B_DQ29

M_B_DQ36

M_B_DQ53

M_B_DQ45

M_B_DQ52M_B_DQ51

M_B_DQ40

M_B_DQ62

M_B_DQ54

M_B_DQ48

M_B_DQ60

M_B_DQ50

M_B_DQ59

M_B_DQ42

M_B_DQ55

M_B_DQ49

M_B_DQ63

M_B_DQ41

M_B_DQ57

M_B_DQ61

M_B_DQ56

M_B_DQ58

M_B_DQS1M_B_DQS0

M_B_DQS7

M_B_DQS5M_B_DQS4

M_B_DQS2

M_B_DQS6

M_B_DQS3

M_A_DQS7

M_A_DQS5M_A_DQS4

M_A_DQS2M_A_DQS1

M_A_DQS3

M_A_DQS0

M_A_DQS6

M_B_DQ7

M_A_DM5

M_A_DM7

M_A_DM0

M_A_DM3M_A_DM2M_A_DM1

M_A_DM6

M_A_DM4

M_CLK_DDR#3

M_CLK_DDR3

M_CLK_DDR#2

M_CLK_DDR2

M_CLK_DDR#0

M_CLK_DDR0

M_CLK_DDR#1

M_CLK_DDR1

DDRB_SA0

M_B_A14

M_A_A14M_B_A15

M_A_A15

1D8V_S3

DDR_VREF_S3

3D3V_S0

1D8V_S3

DDR_VREF_S3

3D3V_S0

M_B_BS#28,13

M_B_BS#08,13M_B_BS#18,13

M_B_DQS#[7..0]8

M_CLK_DDR3 7

M_CLK_DDR2 7

M_CLK_DDR#3 7

M_CLK_DDR#2 7

M_B_RAS# 8,13M_B_WE# 8,13M_B_CAS# 8,13

M_CS2# 7,13M_CS3# 7,13

M_CKE2 7,13M_CKE3 7,13

M_ODT07,13M_ODT17,13

M_A_DQ[63..0]8

M_ODT27,13M_ODT37,13

M_CLK_DDR1 7M_CLK_DDR#1 7

M_A_RAS#8,13

M_CS0#7,13M_CS1#7,13

M_B_A[14..0]8,13

M_A_BS#08,13M_A_BS#18,13

M_A_BS#28,13

M_A_CAS#8,13

M_CKE07,13M_CKE17,13

M_B_DM[7..0] 8

M_A_A[14..0]8,13

M_A_DQS#[7..0] 8

M_B_DQ[63..0]8

M_B_DQS[7..0]8

M_A_DQS[7..0] 8

M_A_DM[7..0] 8

M_A_WE#8,13

M_CLK_DDR0 7M_CLK_DDR#0 7

SMBD_ICH 3,19SMBC_ICH 3,19

Title


Date: Sheet of


Biwa SADDR2 Socket


Title


Date: Sheet of


Biwa SADDR2 Socket


Title


Date: Sheet of


Biwa SADDR2 Socket

12 42Thursday, March 01, 2007High 9.2mm

Place near DM2

High 5.2mm

Place near DM1

NO

RM

AL

TYPE

NO

RM

AL

TYPE

2nd source: 62.10017.A512nd source: 62.10017.A41

12

C230SCD

1U16V2ZY-2G

PC230SC

D1U

16V2ZY-2GP

12

C485Do Not Stuff

DYC485Do Not Stuff

DYTP36Do Not StuffTP36Do Not StuffTP34Do Not StuffTP34Do Not Stuff

12

C87

SCD

1U16

V2ZY

-2G

P

C87

SCD

1U16

V2ZY

-2G

P

12

C94Do Not Stuff

DYC94Do Not Stuff

DY

A0102A1101A2100A399A498A597A694A792A893A991A10/AP105A1190A1289A13116A1486A1584A16_BA285

BA0107BA1106

DQ05DQ17DQ217DQ319DQ44DQ56DQ614DQ716DQ823DQ925DQ1035DQ1137DQ1220DQ1322DQ1436DQ1538DQ1643DQ1745DQ1855DQ1957DQ2044DQ2146DQ2256DQ2358DQ2461DQ2563DQ2673DQ2775DQ2862DQ2964DQ3074DQ3176DQ32123DQ33125DQ34135DQ35137DQ36124DQ37126DQ38134DQ39136DQ40141DQ41143DQ42151DQ43153DQ44140DQ45142DQ46152DQ47154DQ48157DQ49159DQ50173DQ51175DQ52158DQ53160DQ54174DQ55176DQ56179DQ57181DQ58189DQ59191DQ60180DQ61182DQ62192DQ63194

NC#5050NC#6969NC#8383NC#120120NC#163/TEST163

CS0#110CS1#115CKE079CKE180RAS#108CAS#113WE#109

SCL197SDA195

ODT0114ODT1119

VREF1

GND201

DQS0 13DQS1 31DQS2 51DQS3 70DQS4 131DQS5 148DQS6 169DQS7 188

DQS0# 11DQS1# 29DQS2# 49DQS3# 68DQS4# 129DQS5# 146DQS6# 167DQS7# 186

DM0 10DM1 26DM2 52DM3 67DM4 130DM5 147DM6 170DM7 185

CK0 30CK0# 32CK1 164

CK1# 166

SA0 198SA1 200

VDD_SPD 199

VDD 81VDD 82VDD 87VDD 88VDD 95VDD 96VDD 103VDD 104VDD 111VDD 112VDD 117VDD 118

VSS 2VSS 3VSS 8VSS 9VSS 12VSS 15VSS 18VSS 21VSS 24VSS 27VSS 28VSS 33VSS 34VSS 39VSS 40VSS 41VSS 42VSS 47VSS 48VSS 53VSS 54VSS 59VSS 60VSS 65VSS 66VSS 71VSS 72VSS 77VSS 78VSS 121VSS 122VSS 127VSS 128VSS 132VSS 133VSS 138VSS 139VSS 144VSS 145VSS 149VSS 150VSS 155VSS 156VSS 161VSS 162VSS 165VSS 168VSS 171VSS 172VSS 177VSS 178VSS 183VSS 184VSS 187VSS 190VSS 193VSS 196

GND 202

MH1MH1 MH2 MH2

DM2

SKT-SODIMM20020U3GP

62.10017.661

DM2

SKT-SODIMM20020U3GP

62.10017.661

12

C85

SCD

1U16

V2ZY

-2G

P

C85

SCD

1U16

V2ZY

-2G

P

12C491

SCD

1U16V2ZY-2G

P

C491

SCD

1U16V2ZY-2G

P

12

C86

Do

Not

Stu

ff

DYC86

Do

Not

Stu

ff

DY

12R135

10KR2J-3-GPR135

10KR2J-3-GP

A0102A1101A2100A399A498A597A694A792A893A991A10/AP105A1190A1289A13116A1486A1584A16/BA285

BA0107BA1106

DQ05DQ17DQ217DQ319DQ44DQ56DQ614DQ716DQ823DQ925DQ1035DQ1137DQ1220DQ1322DQ1436DQ1538DQ1643DQ1745DQ1855DQ1957DQ2044DQ2146DQ2256DQ2358DQ2461DQ2563DQ2673DQ2775DQ2862DQ2964DQ3074DQ3176DQ32123DQ33125DQ34135DQ35137DQ36124DQ37126DQ38134DQ39136DQ40141DQ41143DQ42151DQ43153DQ44140DQ45142DQ46152DQ47154DQ48157DQ49159DQ50173DQ51175DQ52158DQ53160DQ54174DQ55176DQ56179DQ57181DQ58189DQ59191DQ60180DQ61182DQ62192DQ63194

DQS0#11DQS1#29DQS2#49DQS3#68DQS4#129DQS5#146DQS6#167DQS7#186

DQS013DQS131DQS251DQS370DQS4131DQS5148DQS6169DQS7188

OTD0114OTD1119

VREF1VSS2

GND202

RAS# 108WE# 109

CAS# 113

CS0# 110CS1# 115

CKE0 79CKE1 80

CK0 30CK0# 32

CK1 164CK1# 166

DM0 10DM1 26DM2 52DM3 67DM4 130DM5 147DM6 170DM7 185

SDA 195SCL 197

VDDSPD 199

SA0 198SA1 200

NC#50 50NC#69 69NC#83 83

NC#120 120NC#163/TEST 163

VDD 81VDD 82VDD 87VDD 88VDD 95VDD 96VDD 103VDD 104VDD 111VDD 112VDD 117VDD 118

VSS 3VSS 8VSS 9VSS 12VSS 15VSS 18VSS 21VSS 24VSS 27VSS 28VSS 33VSS 34VSS 39VSS 40VSS 41VSS 42VSS 47VSS 48VSS 53VSS 54VSS 59VSS 60VSS 65VSS 66VSS 71VSS 72VSS 77VSS 78VSS 121VSS 122VSS 127VSS 128VSS 132VSS 133VSS 138VSS 139VSS 144VSS 145VSS 149VSS 150VSS 155VSS 156VSS 161VSS 162VSS 165VSS 168VSS 171VSS 172VSS 177VSS 178VSS 183VSS 184VSS 187VSS 190VSS 193VSS 196

GND 201

MH1MH1 MH2 MH2

DM1

DDR2-200P-22-GP-U1

62.10017.A61

DM1

DDR2-200P-22-GP-U1

62.10017.A61

12

C88

Do

Not

Stu

ff

DYC88

Do

Not

Stu

ff

DY

12

C408Do Not Stuff

DYC408Do Not Stuff

DY12

C224Do Not Stuff

DYC224Do Not Stuff

DY

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

M_B_A5

M_B_A10

M_A_A5

M_A_A10

M_B_A3

M_B_A2

M_A_A12

M_B_A1

M_A_A6

M_A_A9

M_B_A12

M_B_A6

M_A_A8

M_B_A8M_B_A9

M_A_A4

M_A_A[14..0]

M_B_A[14..0]

M_B_A13

M_A_A11M_A_A7

M_B_A0

M_B_A4

M_A_A13

M_B_A11M_B_A7

M_A_A0M_A_A2

M_A_A1M_A_A3

M_A_A14

M_B_A14

1D8V_S3

1D8V_S3

DDR_VREF_S0

DDR_VREF_S0

M_CKE1 7,12

M_A_BS#1 8,12

M_CS0# 7,12

M_ODT3 7,12

M_B_BS#2 8,12

M_ODT0 7,12

M_ODT1 7,12

a b c d e biwa block diagram -...

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