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By Piero Belforte, July 2010
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PrefaceIn the early 70s CSELT Labs (Turin,Italy) developed the
first digital switches deployed in the Italian network.
The Switching Techniques lab, headed by Piero Belforte, had the mission of developing a modular technologyfor fast prototyping of high-speed digital systems
A CAD methodology for prediction of high-speedinterconnects behavior was strongly needed…
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The environment (1) IBM’s ASTAP circuit simulation program was only
available on mainframe computers.
ASTAP was very slow and inaccurate dealing withtrasmission line and propagation effects.
Accurate models of ICs I/O ports were not available.
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The environment (2) The expression “Signal Integrity” didn’t exist.
The IBIS models of Ics were not yet invented.
The S-parameter concept was only used in the Microwave field in the frequency domain.
The Eye-Diagram representation of digital signals wasonly used in the Transmission System domain.
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The environment (3) HP launches the first desktop calculators (9800
series).
Tek 7S12 TDR unit has already a 25 ps risetimecapability.
HP introduces the HPIB instrumentation control bus.
DSP techniques were already known but never
applied to circuit simulation.
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Hp 9800 Series technologyhttp://www.hpmuseum.org/tech98xx.htm
8MHz 16-bit processor.
Microcode stored in bipolar ROM (7 ICs were used to supply 256 28 bit words.)
Firmware stored in 4K bit ROM chips organized as 512 8 bit words.
Intel 1103 1K bit PMOS dynamic RAM ICs.
16-character LED display
Philips cassette magnetic-tape cartridge drive
HPL algebraic programming language
HPIB bus card for instrument control
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The TEK 7S12 TDR/Sampler Unit(25ps rise time)
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THE WINNING IDEAS1) Apply DSP (Digital Signal Processing) techniques
to circuit simulation.
2) Use Wave variables instead of classical voltage and currents tomodel propagation effects.
3) Use TDR as Time-domain S-parameter extractor from actualdevices .
4) Integrate Modelling & Simulation Environments using a Desktop calculator for both controlling instruments and runnigsimulations.
5) Extensive use of PRBS sequences as stimulus and EYE-DIAGRAMS to evaluate signal prameters ( eye opening, jitter, Noise margins).
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Piero (left) and his colleague Giancarlo (right) with the HP9821 desktop calculator used for the first versions of the simulator (circa 1974)
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Published paper showing the Digital Wave DSP algorithms usedfor modelling and simulation of high-speed interconnects
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Cellular topology (N transmission-line cells) interconnection structure modelled by the DWN program
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Digital Network model of the cellularinterconnection structure
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DWN Simulation Program features
The whole DWN algorithm for the modular structurerequired about 250 lines of HPL code and was written byUgo Colonnelli.
The output waveforms were plotted on a HP 9862A plotter driven by the calculator.
The accuracy and speed performance was much better thanIBM’s ASTAP circuit analysis program running on a mainframe computer .
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Layout of a microstrip test circuit used for
validation of simulator’s results (TDR response)
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Plot of simulated (s) and measured (m) one-port TDR
responses of the test circuit (1975)
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Simulation (s) vs measure (m) of a 220 Mbit/s MECL III pcb interconnect (1975) using a PRBS stimulus
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ECL multi-drop backplane bus
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Simulated and measured Eye-diagrams of the multi-
drop bus carrying a 100Mbit/s PRBS stream (1975)
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Early HPIB automatic bench for modelling active and passive device based on Tek 7S12 TDR (1974)
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Automatic I/O model extraction from biasedTDR measures (S-parameters) of IC ports
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THICK-FILM HIGH-SPEED HYBRID CIRCUIT
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Thin-film hybrid clock driver designedfor 500Mhz clock distribution
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MEASUREMENT SETUPS FOR TDR I/OCHARACTERIZATIONS OF HYBRID CLOCK DRIVERS
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BIASED TDR INPUT RESPONSES
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BIASED TDR OUTPUT RESPONSES
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TEST BOARD FOR TDR CHARACTERIZATION
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DWN simulations of 250Mhz clock waveforms ofthe hybrid clock driver at various fan outs
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250 Mbit/s module designed using the DWN methodology (1974)
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Backplane twisted pair interconnectsamong high-speed modules
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COLLECTION of hybrid circuits designed and characterized using DWN (1973-1975)
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Interconnect optimization for a high-speed (.5 Gbps) MCM using simulated eye diagrams (1975)
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.5 Gbps MCM module fully designed by means of DWN modelling and simulations (1975)
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Low-cost high-speed module for fast prototyping of digitalsystems fully optimized by DWN (1978)
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EYE-DIAGRAM PARAMETERS FOR INTERCONNECT PARAMETERS EVALUATION
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TDR Characterization of the connector
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TLM model of the connector (DWN simulation)
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SETTING OF INTER-MODULE BACKPLANE INTERCONNECT RULES BY SIMULATION
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INTER-MODULE CLOCK INTERCONNECT PARAMETERS VS FREQUENCY (From DWN SIMs)
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High-speed prototype of a digitalswitch built up using .5Gps modules
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TEST SETUP OF A HIGH-SPEED DIGITAL SUBSYSTEM PROTOTYPE
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WEB LINKS (1) http://it.linkedin.com/in/pierobelforte
http://www.slideshare.net/pierobelforte
http://sites.google.com/site/pierobelforte/Home/piero-s-papers-1
http://www.linkedin.com/groups?mostPopular=&gid=2673743
http://docs.google.com/viewer?a=v&pid=sites&srcid=ZGVmYXVsdGRvbWFpbnxwaWVyb2JlbGZvcnRlZG9jfGd4OjMwNzY5MjUzZjM1ZTJjNzQ
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WEB LINKS (2) http://www.hp9825.com/html/hpib1.html
http://www.hp9825.com/html/hp_9810_20_30.html
http://www.hpmuseum.org/hp9820.htm