Introduction to Microprocessor-Based SystemsDesign

Giuliano Donzellini • Andrea Mattia Garavagno •

Luca Oneto

Introductionto Microprocessor-BasedSystems Design

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Giuliano DonzelliniDITENUniversity of GenoaGenova, Italy

Luca OnetoDIBRISUniversity of GenoaGenova, Italy

Andrea Mattia GaravagnoDITENUniversity of GenoaGenova, Italy

ISBN 978-3-030-87343-1 ISBN 978-3-030-87344-8 (eBook)https://doi.org/10.1007/978-3-030-87344-8

© The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer NatureSwitzerland AG 2022This work is subject to copyright. All rights are solely and exclusively licensed by the Publisher, whetherthe whole or part of the material is concerned, specifically the rights of reprinting, reuse of illustrations,recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmissionor information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilarmethodology now known or hereafter developed.The use of general descriptive names, registered names, trademarks, service marks, etc. in thispublication does not imply, even in the absence of a specific statement, that such names are exempt fromthe relevant protective laws and regulations and therefore free for general use.The publisher, the authors and the editors are safe to assume that the advice and information in thisbook are believed to be true and accurate at the date of publication. Neither the publisher nor theauthors or the editors give a warranty, expressed or implied, with respect to the material containedherein or for any errors or omissions that may have been made. The publisher remains neutral with regardto jurisdictional claims in published maps and institutional affiliations.

This Springer imprint is published by the registered company Springer Nature Switzerland AGThe registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland

Translation from the Italian language edition: Introduzione al Progetto di Sistemi a Microprocessore byG. Donzellini, et al., © Springer-Verlag Italia S.r.l., part of Springer Nature 2021. Published by SpringerMilano, Italy. All Rights Reserved.

To my wife Melina and my sons Sara and Paolofor their presence and infinite patience.

To my Father and my Mother, always in my thoughts.

Giuliano Donzellini

To my grandparents who couldn’t witness this happy moment.To my parents for always being there.

To my friends for their presence despite my absences,and for listening to many of my ideas.

Andrea Mattia Garavagno

To Irene.Hoping to become the father she deserves.

Luca Oneto

Foreword of Prof. Donatella Sciuto

Writing a university textbook is no easy task. It requires a broad knowledge ofthe material, an ability to explain it clearly and to inspire students to want tolearn more. Compared to commonly used tools such as lecture notes or slides,a textbook requires far greater attention to detail, meticulous planning of theapproach, the order of the subjects and the level of detail for each part.

What a university textbook adds to other teaching tools is a critical approachand reasoning. This entails not only meticulously listing data or technicalaspects but relating them to each other to develop a method in order tochallenge preconceived ideas. It is precisely the method, the ability to analyze,which studying should provide us, not just a set of ideas, for which there areother useful and complementary tools. Textbooks, however, educate the mindand require a keen understanding of the material and ability to analyze andsummarize. Like a good teacher, they also inspire questioning, the basis ofany valid scientific principle.

In fact, this textbook stems from the considerable experience of its authorswho have taught this material and developed a flexible methodology overthe years. They have developed a flexible educational tool that allows forthe simulation of logic networks and the emulation of a system based on aneducational processor, used in this text as an example to explain the basicconcepts of a programmable digital system architecture. This book deals withcomputers from the perspective of their logical structure and that of its lan-guage. It provides enough ideas and examples for students to learn to programdirectly using machine language. It emphasizes the conceptual, technologicaland structural aspects, that is the hardware architecture of programmabledigital systems.

The book takes a bottom-up approach; the broad first chapter shows howto “build” the architecture of a simple 8-bit processor step-by-step, detailingevery internal mechanism. The aim of the chapter is to give the fundamentalsof microcontroller design and also to make clear that design choices have an

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effect on how the machine performs and what it can do from the programmer’spoint of view. The book then introduces another 8-bit microprocessor, theDMC8, inspired by the Z80-CPU. This processor is the heart of the rest ofthe book, which deals with the issue from the perspective of initially havingto integrate the processor in a system and then programming it to performthe required functions.

The book offers a “learning by doing” approach with very detailed examplesthat help the reader develop analyzing and summarizing skills. The strongconnection between the book’s content and the Deeds (Digital ElectronicsEducation and Design Suite) environment makes this possible. The Deeds en-vironment provides the simulation tools so students can master the concepts,work through the examples and check how they work in a hands-on way.

Chapter 2 deals with the integration of the processor with the memory andinput/output subsystems by means of the bus. It also introduces the individualcomponents, the hardware elements required in the programming model andthe steps required to execute simple instructions. This chapter shows thedynamic interaction among the different components through bus signals. Thechapter concludes with a presentation of the Deeds module that allows for theemulation of the workings of the complete microcomputer system introducedpreviously. A description of the steps from writing the assembly code to theexecution are provided.

Chapter 3 goes into greater detail on processor instructions, specifically forthe DMC8 and subprogram management mechanisms, while Chapter 4 de-velops the subject of interfacing with input/output devices both in terms ofsynchronization and data transfer.

All the chapters come with detailed examples and exercises with solutionsto help students understand microprocessors system architecture and theirown programming techniques. These skills are key to improving computerdesigners’ and programmers’ understanding of what software applications cando in relation to the characteristics of the underlying hardware.

Chapter 5 deals with implementation on programmable components such asFPGAs of systems based on the processor presented in the textbook, creatingprototypes to check one’s own design on FPGA boards supported by theDeeds environment and FPGA company-produced development tools. This isa process of experimentation which is a good ending to this book and bringsthe reader through the different phases of application design, so that theymay check what they have learned over the previous chapters on a physicalsystem.

This book will certainly be a useful aid for those teaching introductory ap-plied microcontroller architecture courses. It provides students with detailed,practical knowledge on how to create and design these devices, while enablingthem to set up workshops where they can carry out projects on their own.

Foreword of Prof. Donatella Sciuto

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There is a good balance between theory and practice in the book, whichprovides students with tools related to content and methodology on the onehand, and requires them to apply them on the other. If theory allows usto apply an abstract analysis to a problem from the right distance, practicebrings us close to concrete scientific data. They go hand in hand.

This is a trend that will generally be more and more present in technicalengineering, which is open to a theoretical-creative approach in robustly au-tomated environments. This is a step toward an approach that is free fromthe recursive mental processes that we have learned to delegate to machines.

This will make a difference in the educational and professional experience ofengineers who must develop technologies, each component of which followsan ethical approach and truly sustainable developmental principles that servesocial needs.

Foreword of Prof. Donatella Sciuto

Preface of the Authors

This textbook is the natural successor to “Introduction to Digital SystemsDesign”, by the same authors1, which is a recommended reading.

In this book in fact, the authors offer the most open and general approachto microprocessor systems design and programming. By starting from thesimplest examples and ending with medium-complexity problems, readers willacquire the theoretical-practical bases to enable them to later extend theirprogramming knowledge to other types of microprocessors.

With this guiding aim, the text provides a brief reference on general computerconcepts, then dives into the subject of “how to design” a processor using aninitial “problem-solving” approach, based on knowledge of logic networks.

Starting from a simple design idea, we will build a computing network fromscratch and develop it step by step into a small processor with limited, basicfeatures, which can be programmed to perform simple tasks.

This process teaches students not only the basic architectural elements foundin all microprocessors, but also how to program them. First, programs will bewritten in “machine language” and then, with the help of mnemonic code, in“assembly language”. The resulting basic computing network will be able totake decisions, a feature at the root of all microprocessors.

At the end of Chapter 1, interested students can use the large amount ofmaterial developed to continue working independently on processor design.

After the basic concepts are introduced in Chapter 1, the aim and perspectivechange as of Chapter 2. Here we deal with a complete microcomputer, not interms of a logic-gate-by-logic-gate analysis of the processor’s architecture, asin Chapter 1, but on a slightly more abstract level.

1 G.Donzellini, L.Oneto, D.Ponta, and D.Anguita, “Introduction to Digital SystemsDesign”, Springer, ©2019, ISBN 978-3-319-92803-6.

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The focal point is the functional aspects of the microprocessor and the ele-ments connected to it. There is a particular focus on its set of instructions andtheir relationship with the system components that the programmer shouldmanage directly.

The explanation takes on two perspectives, often simultaneously. The first isthat of systems engineers, who use their electronics skills to treat micropro-cessors as components (as supplied by the producer) to integrate them intoa more complex system. The second is that of programmers who use theircomputer science and electronics skills to fulfill the required specifications,while making the most of the hardware available.

Chapter 3 deals in detail with microprocessor instructions from a program-mer’s perspective, and adds numerous examples to fully understand their be-haviour. Subjects like “call and return” instructions for manage subprograms,“delay loops” and other programming techniques common in microprocessorsystems.

Chapter 4 deals with so-called “interrupts”. This technique, which is used inall types of microprocessors, enables the interruption of a program’s normalexecution flow, and the execution of another if the system components directlycommand it.

Thus, we will see how to interface a microprocessor system with other devices,paying special attention to the way two or more systems interact by usingparallel and serial connections.

In some cases, we will use input/output components expressly designed forour purposes. This way, students will be well positioned to understand thebasic concepts without spending too much time on commercial components,which while highly configurable, are often very complex, hard to deal withand ill-adapted for educational use.

In Chapter 5, the focus shifts to tests and trials on real systems. Technologyhas made a wide array of programmable components called FPGA2 avail-able. There are also myriad prototype boards based on them called “FPGAboards.” These days, we can discard the idea of a system made of prefab-ricated components connected together since re-programmable hardware isavailable.

FPGA components have made it possible to quickly produce project proto-types, thus saving time and production costs. On one single FPGA chip, wecan build a system including a microprocessor, memory and any accessorydevice we would like (within the limits imposed by the FPGA hardware).

Aside from the theoretical elements, this book offers a large number of ex-amples and exercises with solutions to help students hone and solidify their

2 Field Programmable Gate Array

Preface of the Authors

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understanding. They can derive great educational benefits from using theDeeds simulation tool3 (Digital Electronics Education and Design Suite), de-veloped by one of the authors, Giuliano Donzellini, to support Engineeringand Computer Science students in their learning and lab work.

The close connection with Deeds is a strong point that renders this bookunique in that schematics, programs and exercises, from the simplest to themost complex, were created with Deeds and are immediately available onlinefor simulation. Deeds covers all the main facets of digital systems projects,including combination and sequential networks, finite state machines, user-defined components and especially microprocessor systems suitable for “as-sembly language” programmable “embedded” applications.

The environment supports a microprocessor created for educational purposes,the DMC8. In devising the DMC8 the creators used a technically and histor-ically relevant 8-bit microprocessor as a model, the Z80-CPU by Zilog, butit also has a compatibility mode with the earlier I8080 by Intel. The DMC8maintains much of the architecture of the Z80-CPU and the I8080 but itsstructure is simplified and a few elements have been added to bring it closerto more recent microprocessors. The DMC8 can be programmed by using theassembly language of either of the processors it derives from.

Deeds was developed with an educational and semi-professional purpose inmind so it needed to be very user-friendly while at the same time usable forcomplex projects. The main differences between Deeds and a professional sim-ulator are the simple, direct interface and the vast collection of educationaland project materials. Deeds is a continuously evolving, “living” system; up-dates are periodically available to improve the existing tools and to add newones. The same is true of the educational materials.

The transition toward FPGA devices happens because one can export anentire Deeds-created and -simulated project into a professional tool and thenactually test it on the hardware. Deeds makes it possible to avoid the complex-ity of the whole process, which is normally inevitable in a specific professionalsoftware. Thus access to these devices is immediate and intuitive.

3 https://www.digitalelectronicsdeeds.com

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Teaching Objectives

Based on the authors’ experience, the whole book including the Deeds projectexercises and simulations can be used in an introductory microprocessor sys-tems course.

Below is a schema of the contents of each chapter. Subjects that could beomitted without sacrificing course continuity are commented with notes initalics :

1. Introduction to programmable computing networks

→ A general introduction to microprocessors

The next five sections of the chapter can be omitted if the course ismainly on programming:

→ Design of a programmable computing network→ Sequencing, microinstructions and microprograms→ Jumps, loops and decisions→ Input and output ports→ Constants, variables and read/write memory

2. A system based on the DMC8 microprocessor

→ The DMC8 microprocessor→ Bus signals and timing→ Input/output and memory subsystems→ Introduction to Deeds-McE

3. Programming the DMC8

→ Introduction to assembly language programming→ Addressing modes→ Types of instructions→ Subprograms and the Stack area→ Programming examples

4. Interfacing with external devices

→ Managing communication with external devices→ Hardware-supported handshake→ Polling

If the course does not deal with interrupts, the next four sections inthe chapter can be omitted.

→ Interrupt techniques→ Using vectored interrupts→ Interrupt timers→ Examples of programming and interfacing

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5. Microprocessor systems on FPGA

If the course does not include laboratory activities, or does not dealwith FPGAs, the entire chapter may be omitted.

→ Introduction to FPGAs→ The architecture of FPGA components→ FPGA development tools→ The FPGA boards used in the examples→ Microprocessor system prototypes on FPGA→ Project examples

How to Use the Book

The strong connection between this book and the Deeds environment shouldencourage the reader to use it along with the simulation tools to actively testout the concepts and procedures in the textbook examples.

Another benefit is that readers get solutions to all the system design andprogramming exercises. Learning by doing helps students progressively buildtheir analytical and organizational skills, which is the aim.

Preface of the Authors

Digital Contents of the Book

This textbook alternates between theory and practice (examples, exercisesand solutions). All the examples and exercises were created with the Deedssimulator, which is available at this address:

https://www.digitalelectronicsdeeds.com

The site describes the simulator and gives instructions on how to downloadand use it (using Windows or other operating systems with the appropriatevirtual machines). The simulator is to be used locally so it does not requireconstant internet connection.

The site also has accessory material, Deeds schematics and programs, relatedto all the figures and examples in the book. Finally, the site offers all thematerials needed to do the exercises and test the solutions with Deeds.

The site is set up with the same chapter, section and subsection titles as thetextbook itself, so it is easy to use. In the future, the site will host any updates,corrections or improvements that will be made to the book.

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Contents

Foreword of Prof. Donatella Sciuto . . . . . . . . . . . . . . . . . . . . . . . . . . VII

Preface of the Authors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XI

Digital Contents of the Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XVII

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XIX

1 Introduction to programmable computing networks . . . . . . . . 11.1 A general introduction to microprocessors . . . . . . . . . . . . . . . . . . 1

1.1.1 A brief history of microprocessors . . . . . . . . . . . . . . . . . . . 21.1.2 Types of microcomputers . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.1.3 Microcomputers and systems . . . . . . . . . . . . . . . . . . . . . . . 31.1.4 The basic structure of a generic computer . . . . . . . . . . . . 41.1.5 The common bus connection . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2 Design of a programmable computing network . . . . . . . . . . . . . . 91.2.1 The design specification: a dedicated computing network 9

1.2.1.1 Combinational solution . . . . . . . . . . . . . . . . . . . . . 91.2.1.2 Sequential solution . . . . . . . . . . . . . . . . . . . . . . . . . 111.2.1.3 The sequencer algorithm . . . . . . . . . . . . . . . . . . . . 151.2.1.4 Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

1.2.2 Counter and ROM memory based sequencer . . . . . . . . . . 161.2.3 Extending computing possibilities . . . . . . . . . . . . . . . . . . . 191.2.4 ALU-based computing networks . . . . . . . . . . . . . . . . . . . . . 22

1.2.4.1 Another computing example . . . . . . . . . . . . . . . . 231.2.5 The “instructions” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251.2.6 “Program”, “programming” and other important terms 29

1.3 Sequencing, microinstructions and microprograms . . . . . . . . . . . 301.3.1 A more compact sequencer . . . . . . . . . . . . . . . . . . . . . . . . . 301.3.2 The microprogrammed sequencer . . . . . . . . . . . . . . . . . . . . 32

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1.3.3 The microprogrammed sequencer and the computingnetwork . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

1.3.4 How it works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361.3.5 Executing a sequence of instructions . . . . . . . . . . . . . . . . . 391.3.6 Executing the first instruction during start up . . . . . . . . 401.3.7 The “instruction pipeline” . . . . . . . . . . . . . . . . . . . . . . . . . . 411.3.8 Defining microprograms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411.3.9 Rewriting the program of the average of four operands . 44

1.4 Jumps, loops and decisions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471.4.1 Loops and jump instructions . . . . . . . . . . . . . . . . . . . . . . . . 471.4.2 Decisions and conditional jump instructions . . . . . . . . . . 511.4.3 The FLAG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521.4.4 Controlling jump conditions . . . . . . . . . . . . . . . . . . . . . . . . 531.4.5 Example: How to use conditional jumps . . . . . . . . . . . . . . 58

1.5 Input and output ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 611.5.1 Input ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 611.5.2 Output ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 621.5.3 How to use ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

1.5.3.1 Generating a periodic triangular waveform . . . . 631.5.3.2 Generating a periodic trapezoidal waveform . . . 651.5.3.3 Generating signals with the PWM technique . . 67

1.6 Constants, variables and read/write memory . . . . . . . . . . . . . . . . 701.6.1 Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 701.6.2 Immediate addressing instructions . . . . . . . . . . . . . . . . . . . 731.6.3 Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 741.6.4 Read/write memory (RAM) . . . . . . . . . . . . . . . . . . . . . . . . 751.6.5 RAM read/write instructions . . . . . . . . . . . . . . . . . . . . . . . 751.6.6 The RAM and the processor . . . . . . . . . . . . . . . . . . . . . . . . 761.6.7 Instructions with direct addressing . . . . . . . . . . . . . . . . . . 791.6.8 Use of the Mp8E network: examples . . . . . . . . . . . . . . . . . 80

1.6.8.1 Calculating a logical expression . . . . . . . . . . . . . . 801.6.8.2 Calculation of a mathematical expression . . . . . 811.6.8.3 Generating the samples of a sinusoidal wave . . . 83

1.6.9 Final considerations on the processor developed here . . . 851.7 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

1.7.1 Dedicated computing networks . . . . . . . . . . . . . . . . . . . . . . 871.7.2 Programmable computing networks . . . . . . . . . . . . . . . . . . 871.7.3 Microprogramming new instructions . . . . . . . . . . . . . . . . . 91

1.8 Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 961.8.1 Dedicated computing networks . . . . . . . . . . . . . . . . . . . . . . 961.8.2 Programmable computing networks . . . . . . . . . . . . . . . . . . 1001.8.3 Microprogramming new instructions . . . . . . . . . . . . . . . . . 107

Contents XXI

2 A system based on the DMC8 microprocessor . . . . . . . . . . . . . 1152.1 The DMC8 microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

2.1.1 The internal architecture of the DMC8 processor . . . . . . 1172.1.2 Memory system structure . . . . . . . . . . . . . . . . . . . . . . . . . . 1192.1.3 Bus parts and RAM and ROM memory management . . 1202.1.4 Input/output ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1212.1.5 DMC8 connection lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1232.1.6 DMC8 processor programming model . . . . . . . . . . . . . . . . 1262.1.7 The internal elements of DMC8 processor architecture . 1282.1.8 The sequencer and instruction execution . . . . . . . . . . . . . 1312.1.9 An initial example of programming . . . . . . . . . . . . . . . . . . 1322.1.10 An example of instruction execution . . . . . . . . . . . . . . . . . 134

2.2 Bus signals and timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1372.2.1 The clock, synchronization and initialization of the

system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1372.2.2 The physical behavior of the bus . . . . . . . . . . . . . . . . . . . . 1382.2.3 Clock cycles, machine cycles and instruction cycles . . . . 1392.2.4 The fetch cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1402.2.5 Read/write memory access cycles . . . . . . . . . . . . . . . . . . . . 1412.2.6 Input/output access cycles . . . . . . . . . . . . . . . . . . . . . . . . . . 1432.2.7 Inactive cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

2.3 Input/output and memory subsystems . . . . . . . . . . . . . . . . . . . . . 1472.3.1 Memory subsystems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1472.3.2 The Input/Output subsystem . . . . . . . . . . . . . . . . . . . . . . . 152

2.3.2.1 Parallel output ports . . . . . . . . . . . . . . . . . . . . . . . 1522.3.2.2 Parallel input ports . . . . . . . . . . . . . . . . . . . . . . . . 1552.3.2.3 Specificities of output ports . . . . . . . . . . . . . . . . . 1582.3.2.4 The I/O Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1582.3.2.5 Port address spaces . . . . . . . . . . . . . . . . . . . . . . . . 159

2.4 Introduction to Deeds-McE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1602.4.1 The microcomputer components of the Deeds-DcS . . . . . 160

2.4.1.1 The “DMC8 Microcomputer” . . . . . . . . . . . . . . . 1602.4.1.2 The “DMC8 Enhanced Microcomputer” . . . . . . 162

2.4.2 Developing a program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1652.4.2.1 Writing source code . . . . . . . . . . . . . . . . . . . . . . . . 1652.4.2.2 Translating source code into machine code . . . . 1672.4.2.3 Emulation and program verification . . . . . . . . . . 167

2.4.3 Configuring the microcomputer component . . . . . . . . . . . 1742.5 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

2.5.1 Memory systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1752.5.2 Parallel input/output ports . . . . . . . . . . . . . . . . . . . . . . . . . 178

2.6 Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1822.6.1 Memory systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1822.6.2 Parallel input/output ports . . . . . . . . . . . . . . . . . . . . . . . . 185

XXII Contents

3 Programming the DMC8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1893.1 Introduction to assembly language programming . . . . . . . . . . . . 189

3.1.1 Programming languages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1893.1.1.1 Languages at a “high level” of abstraction . . . . 1903.1.1.2 Languages at a “low level” of abstraction . . . . . 1903.1.1.3 From the source code to machine code that is

executable in the system . . . . . . . . . . . . . . . . . . . . 1913.1.2 DMC8 assembly language . . . . . . . . . . . . . . . . . . . . . . . . . . 192

3.1.2.1 A sample program written in assembly DMC8 . 1923.1.3 Constants and variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1933.1.4 The EQU directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1943.1.5 The ORG directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1953.1.6 The DB and DW directives . . . . . . . . . . . . . . . . . . . . . . . . . 196

3.2 Addressing modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2033.2.1 IMMEDIATE addressing mode (8-bit data) . . . . . . . . . . . 2043.2.2 EXTENDED IMMEDIATE addressing mode (16-bit

data) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2043.2.3 DIRECT addressing mode . . . . . . . . . . . . . . . . . . . . . . . . . . 205

3.2.3.1 DIRECT addressing mode (8-bit data) . . . . . . . 2053.2.3.2 Direct addressing mode (16-bit data) . . . . . . . . . 205

3.2.4 REGISTER INDIRECT addressing mode . . . . . . . . . . . . 2063.2.5 INDEXED INDIRECT addressing mode . . . . . . . . . . . . . 2073.2.6 REGISTER addressing mode . . . . . . . . . . . . . . . . . . . . . . . 2083.2.7 IMPLIED addressing mode . . . . . . . . . . . . . . . . . . . . . . . . . 2093.2.8 BIT addressing mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2093.2.9 MODIFIED addressing mode . . . . . . . . . . . . . . . . . . . . . . . 210

3.3 Types of instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2113.3.1 Data transfer instructions . . . . . . . . . . . . . . . . . . . . . . . . . . 211

3.3.1.1 Data transfer instructions (8-bit) . . . . . . . . . . . . 2113.3.1.2 Data transfer instructions (16-bit) . . . . . . . . . . . 212

3.3.2 Arithmetic and logic instructions . . . . . . . . . . . . . . . . . . . . 2133.3.2.1 Arithmetic instructions (8-bit data) . . . . . . . . . . 2143.3.2.2 16-bit arithmetic instructions . . . . . . . . . . . . . . . . 2193.3.2.3 Logic instructions . . . . . . . . . . . . . . . . . . . . . . . . . . 2223.3.2.4 Increment and decrement instructions (8-bit) . . 2253.3.2.5 Increment and decrement instructions (16-bit) . 225

3.3.3 Rotate and shift instructions . . . . . . . . . . . . . . . . . . . . . . . . 2273.3.4 Bit manipulation instructions . . . . . . . . . . . . . . . . . . . . . . . 2313.3.5 Jump instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233

3.3.5.1 Unconditional jumps . . . . . . . . . . . . . . . . . . . . . . . 2333.3.5.2 Conditional jumps . . . . . . . . . . . . . . . . . . . . . . . . . 2353.3.5.3 Indirect jumps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2353.3.5.4 Delay loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238

3.3.6 CPU control instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . 2443.3.7 Input/output instructions . . . . . . . . . . . . . . . . . . . . . . . . . . 245

Contents XXIII

3.3.8 Subprogram call and return instructions . . . . . . . . . . . . . . 2463.4 Subprograms and the Stack area . . . . . . . . . . . . . . . . . . . . . . . . . . 247

3.4.1 The Stack and the Stack Pointer . . . . . . . . . . . . . . . . . . . . 2473.4.2 Subprograms and call and return instructions . . . . . . . . . 252

3.5 Programming examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2623.5.1 Emulation of combinational logic . . . . . . . . . . . . . . . . . . . . 262

3.5.1.1 The NOT gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2623.5.1.2 The two-input AND gate . . . . . . . . . . . . . . . . . . . 2633.5.1.3 The two-input multiplexer . . . . . . . . . . . . . . . . . . 2653.5.1.4 The 3-8 decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . 267

3.5.2 Calculating a polynomial . . . . . . . . . . . . . . . . . . . . . . . . . . . 2723.5.3 Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2753.5.4 Finite state machines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277

3.6 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2803.6.1 Emulation of digital components . . . . . . . . . . . . . . . . . . . . 2803.6.2 Arithmetic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2833.6.3 Reusable modules and functions . . . . . . . . . . . . . . . . . . . . . 284

3.7 Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2883.7.1 Emulation of digital components . . . . . . . . . . . . . . . . . . . . 2883.7.2 Arithmetic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2983.7.3 Reusable modules and functions . . . . . . . . . . . . . . . . . . . . . 307

4 Interfacing with external devices . . . . . . . . . . . . . . . . . . . . . . . . . . 3214.1 Managing communication with external devices . . . . . . . . . . . . . 321

4.1.1 The unidirectional handshake . . . . . . . . . . . . . . . . . . . . . . . 3244.1.2 The bidirectional handshake . . . . . . . . . . . . . . . . . . . . . . . . 3294.1.3 More complex handshake types . . . . . . . . . . . . . . . . . . . . . 332

4.2 Hardware-supported handshake . . . . . . . . . . . . . . . . . . . . . . . . . . . 3334.2.1 Example of a parallel interface with hardware handshake334

4.3 Polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3374.4 Interrupt techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 341

4.4.1 Enabling and disabling interrupts . . . . . . . . . . . . . . . . . . . 3424.4.2 Interrupt mechanisms in detail . . . . . . . . . . . . . . . . . . . . . . 3434.4.3 Example of an interface with an interrupt request . . . . . 347

4.5 Using vectored interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3504.5.1 Considerations on recognition and priority . . . . . . . . . . . . 3524.5.2 Extending to a higher number of devices . . . . . . . . . . . . . 3524.5.3 Example of handling vectored interrupts . . . . . . . . . . . . . 353

4.6 Interrupt timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3554.6.1 A specialized timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3564.6.2 Example of a timer interrupt: blinking lights . . . . . . . . . . 3584.6.3 Timers and concurrent program execution . . . . . . . . . . . . 362

4.7 Examples of programming and interfacing . . . . . . . . . . . . . . . . . . 3634.7.1 Pulse generator (at system reset) . . . . . . . . . . . . . . . . . . . . 3634.7.2 Finite State Machines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365

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4.7.3 Sinusoidal waveform generator . . . . . . . . . . . . . . . . . . . . . . 3714.7.4 Dual sinusoidal waveform generator . . . . . . . . . . . . . . . . . . 3764.7.5 Object counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3794.7.6 Sensor evaluation in parallel . . . . . . . . . . . . . . . . . . . . . . . . 3844.7.7 Push-button interface for a video game . . . . . . . . . . . . . . . 3894.7.8 Asynchronous serial communication . . . . . . . . . . . . . . . . . . 394

4.8 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4054.8.1 Interrupt techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405

4.9 Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4154.9.1 Interrupt techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415

5 Microprocessor systems on FPGA . . . . . . . . . . . . . . . . . . . . . . . . . 4395.1 Introduction to FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 439

5.1.1 Creation of prototypes with FPGA . . . . . . . . . . . . . . . . . . 4405.1.2 Some examples of FPGA boards . . . . . . . . . . . . . . . . . . . . 442

5.2 The architecture of FPGA components . . . . . . . . . . . . . . . . . . . . . 4455.2.1 Logic blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4475.2.2 JTAG programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4485.2.3 Devices for programming FPGAs . . . . . . . . . . . . . . . . . . . . 449

5.3 FPGA development tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4505.4 The FPGA boards used in the examples . . . . . . . . . . . . . . . . . . . . 453

5.4.1 The DE2 board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4535.4.2 The DE0-CV board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4555.4.3 The EP2C5 board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457

5.5 Microprocessor system prototypes on FPGA . . . . . . . . . . . . . . . . 4585.5.1 The steps to take . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4585.5.2 A system to implement on FPGA: An example . . . . . . . . 4595.5.3 Implementing the network on an FPGA board . . . . . . . . 4605.5.4 Settings for the DE2 board . . . . . . . . . . . . . . . . . . . . . . . . . 4625.5.5 Settings for the DE0-CV board . . . . . . . . . . . . . . . . . . . . . 4655.5.6 Settings for the EP2C5 board . . . . . . . . . . . . . . . . . . . . . . . 4685.5.7 Converting the Deeds project into VHDL . . . . . . . . . . . . . 4745.5.8 Programming the FPGA board . . . . . . . . . . . . . . . . . . . . . 475

5.6 Project examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4775.6.1 Light dimmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 478

5.6.1.1 The system (Version 1) . . . . . . . . . . . . . . . . . . . . . 4785.6.1.2 The system (Version 2) . . . . . . . . . . . . . . . . . . . . . 4825.6.1.3 Implementation on FPGA . . . . . . . . . . . . . . . . . . 485

5.6.2 LED gadget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4875.6.2.1 The system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4875.6.2.2 Implementation on FPGA . . . . . . . . . . . . . . . . . . 492

5.6.3 Special sound effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4945.6.3.1 The system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4945.6.3.2 Implementation on FPGA . . . . . . . . . . . . . . . . . . 498

5.6.4 Music box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 501

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5.6.4.1 The system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5025.6.4.2 Implementation on FPGA . . . . . . . . . . . . . . . . . . 514

5.6.5 Stepper motor control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5165.6.5.1 The system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5215.6.5.2 Implementation on FPGA . . . . . . . . . . . . . . . . . . 523

5.6.6 Using a liquid crystal display (LCD) . . . . . . . . . . . . . . . . . 5275.6.6.1 The system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5345.6.6.2 Implementation on FPGA . . . . . . . . . . . . . . . . . . 540

5.6.7 LCD stopwatch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5445.6.7.1 The system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5445.6.7.2 Implementation on FPGA . . . . . . . . . . . . . . . . . . 551

A Memories and busses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555A.1 ROM memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555

A.1.1 A bit of history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555A.1.2 Operating principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 558A.1.3 Internal architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 561

A.2 RAM memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 565A.2.1 Operating principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 566A.2.2 Internal architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567

A.3 Bidirectional bus connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 574A.3.1 Tri-state buffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575A.3.2 Tri-state buffers and busses . . . . . . . . . . . . . . . . . . . . . . . . . 577A.3.3 Tri-state memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 583

B Programmable computing networks: Schematics and tables 585B.1 The Mp8A computing network . . . . . . . . . . . . . . . . . . . . . . . . . . . . 585

B.1.1 Table of instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 585B.1.2 The schematic of the Mp8A computing network . . . . . . . 587

B.2 The Mp8B computing network . . . . . . . . . . . . . . . . . . . . . . . . . . . . 588B.2.1 Table of instructions and the correlated microprograms 588B.2.2 The schematic of the Mp8B computing network . . . . . . . 589

B.3 The Mp8C computing network . . . . . . . . . . . . . . . . . . . . . . . . . . . . 590B.3.1 Table of instructions and the correlated microprograms 590B.3.2 The schematic of the Mp8C computing network . . . . . . . 592

B.4 The Mp8D computing network . . . . . . . . . . . . . . . . . . . . . . . . . . . . 593B.4.1 Table of instructions and the correlated microprograms 593B.4.2 The schematic of the Mp8D computing network . . . . . . . 595

B.5 The Mp8E computing network . . . . . . . . . . . . . . . . . . . . . . . . . . . . 596B.5.1 Table of instructions and the correlated microprograms 596B.5.2 The schematic of the Mp8E computing network . . . . . . . 598

XXVI Contents

C DMC8 instruction set tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 599C.1 Data transfer instructions (8-bit) . . . . . . . . . . . . . . . . . . . . . . . . . . 600C.2 Data transfer instructions (16-bit) . . . . . . . . . . . . . . . . . . . . . . . . . 601C.3 Arithmetic and logic instructions (8-bit) . . . . . . . . . . . . . . . . . . . . 603C.4 Arithmetic instructions (16-bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . 606C.5 Rotate and shift instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 607C.6 Bit manipulation instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 610C.7 Jump instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 611C.8 Subprogram call and return instructions . . . . . . . . . . . . . . . . . . . . 612C.9 Input/output instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 613C.10 CPU control instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 614